ns_as.1 4.2 KB

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  1. .TH NS_ASS VI
  2. .ad
  3. .SH NAME
  4. ns_as \- National Semiconductor 16032 assembler/linker
  5. .SH SYNOPSIS
  6. \&..../lib/ns/as [options] argument ...
  7. .SH DESCRIPTION
  8. The assembler for the National Semiconductor 16032 is based
  9. on the universal assembler \fIuni_ass\fP(VI).
  10. The mnemonics for the instructions are taken from the NS-16000
  11. Programmers Reference Manual.
  12. The syntax of the instruction operands is similar to the syntax used
  13. in that manual,
  14. although the meaning is sometimes quite different.
  15. The cross assembler issued by National Semiconductor
  16. associates a type (sb,..) with each symbol
  17. and automatically generates sb offset mode for symbols of type sb.
  18. This assembler does not record the types,
  19. each symbol simply produces an untyped value.
  20. .sp 1
  21. The possible operands are:
  22. .IP "general registers
  23. These are called r0, r1, r2, r3, r4, r5, r6 and r7.
  24. The symbol REG is used to indicate use of any of these 8 registers
  25. in other operands.
  26. .IP "floating point registers
  27. These are called f0, f1, f2, f3, f4, f5, f6 and f7.
  28. .IP "dedicated registers
  29. All types of dedicated registers can be used with the appropriate instructions.
  30. Examples: sb, fp, intbase, ptb1.
  31. .IP expr(REG)
  32. register relative
  33. .IP expr(fp)
  34. frame pointer relative
  35. .IP expr(sb)
  36. static base relative
  37. .IP expr(sp)
  38. stack pointer relative
  39. .IP expr(pc)
  40. program counter relative,
  41. the expression indicates a location in memory from which the current value
  42. of '.' is subtracted by the assembler.
  43. E.g. "movw label(pc),r0; label: .word ..." moves the contents of the word
  44. at \fIlabel\fP to r0.
  45. .IP expr(expr(fb))
  46. .IP expr(expr(sb))
  47. .IP expr(expr(sp))
  48. memory relative
  49. .IP @expr
  50. absolute
  51. .IP external(expr)+expr
  52. The external mode is provided, although this assembler
  53. does not build a module table.
  54. .IP tos
  55. top of stack.
  56. .PD 0
  57. .sp 1
  58. .PP
  59. Usage of the scaled index operands is allowed.
  60. .br
  61. The convention used to indicate offset length by appending :B, :W or :D
  62. to offsets is not implemented.
  63. The assembler tries to find out the minimal size needed for any constant
  64. in an operand of the instruction placed in the text segment.
  65. Offsets in instructions outside \fI.text\fP are always four bytes.
  66. .PP
  67. All special operands, e.g. register list, configuration list, have
  68. the same format as in the Programmers Reference Manual.
  69. .PP
  70. Whenever possible the assembler automatically uses the short(quick) opcodes for
  71. jsr(jsb), jump(br), add(addq), cmp(cmpq) and mov(movq).
  72. .SH BUGS
  73. The data types floating and packed-decimal are not supported.
  74. .br
  75. Initialization of floating-point numbers is not possible.
  76. .br
  77. The mnemonics of the slave processor instructions are poorly documented,
  78. the format of the NS-16032S-6 data sheet is used.
  79. .br
  80. The documentation gave contradictory information on the format
  81. of a few instructions.
  82. .IP -
  83. Three different schemes are presented for the encoding
  84. of the last operand of the block instructions.
  85. .IP -
  86. Two different values are specified for
  87. the encoding of the msr register in smr and lmr instructions.
  88. .IP -
  89. Two different possibilities are given for the encoding of
  90. the instructions movsu and movus.
  91. .SH EXAMPLE
  92. .nf
  93. .ta 12n 20n 28n 36n
  94. 00000000 0E0B02 setcfg [ m ]
  95. label:
  96. 00000003 EC3E lprb psr,r7
  97. 00000005 2D37 sprw intbase,r6
  98. 00000007 EA7C br label
  99. 00000009 02803B bsr rout1
  100. 0000000C 228044 cxp rout1
  101. 0000000F 1204 ret 4
  102. 00000011 4204 rett 4
  103. 00000013 328044 rxp rout1
  104. 00000016 1E0300 rdval r0
  105. 00000019 163028 scsr r5
  106. 0000001C 3F32 shid r6
  107. 0000001E 7F0B bispsrd r1
  108. 00000020 7C17 caseb r2
  109. 00000022 7FA806 cxpd @6
  110. 00000025 021F jsr @rout1
  111. 00000027 BEB529 absf f5,f6
  112. 0000002A EE0538 movusw r7,r0
  113. 0000002D 3E40A101 movbl 1,f5
  114. 00000031 CE440003 cmpmb r0,r1,4
  115. 00000035 CE4F0800 extsd r1,r1,0,1
  116. 00000039 62A0 save [ r5, r7 ]
  117. 0000003B 1E0B00 lmr bpr0,r0
  118. 0000003E 0E8C04 skpst w
  119. 00000041 CC0042 acbb 1,r0,label
  120. 00000044 B2 rout1: wait
  121. 00000045 7F950C0B adjspd 11(12(sb))
  122. 00000049 7CA50D adjspb 13
  123. 0000004C 7DB50102 adjspw external(1)+2
  124. 00000050 7FBD adjspd tos
  125. 00000052 7CED860807 adjspb 7(8(fp))[r6:w]
  126. .fi
  127. .SH "SEE ALSO"
  128. uni_ass(VI)
  129. .br
  130. NS 16000 Programmers Reference Manual. Publ. no. 420306565-001PB
  131. .br
  132. NS16032S-6, NS16032S-4 High Performance Microprocessors, november 1982
  133. .br
  134. publ. no. 420306619-002A.
  135. .PD 0
  136. .SH AUTHOR
  137. Ed Keizer, Vrije Universiteit