6809_as.1 4.7 KB

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  1. .\" $Header$
  2. .TH 6809_AS 1
  3. .ad
  4. .SH NAME
  5. 6809_as \- assembler for 6809
  6. .SH SYNOPSIS
  7. /usr/em/lib/6809_as [options] argument ...
  8. .SH DESCRIPTION
  9. This assembler is made with the general framework
  10. described in \fIuni_ass\fP(6).
  11. .SH SYNTAX
  12. .IP registers
  13. The 6809 contains four 8-bit registers registers:
  14. two accumulators (a and b),
  15. a direct page register (dp),
  16. and a condition code register (cc),
  17. and five 16-bit registers:
  18. two index registers (x and y),
  19. a user an a hardware stack pointer (u resp. s),
  20. and a program counter (pc).
  21. The index registers and the stack pointers are indexable.
  22. Accumulators a and b can be concatenated to form
  23. the double accumulator d,
  24. of which a is the high and b is the low byte.
  25. An instruction that refers to accumulator a
  26. has an "a" as last character.
  27. In the same way a "b" means that the instruction
  28. uses b as accumulator.
  29. .IP "pseudo instructions"
  30. The 6809 assembler recognizes one additional instruction
  31. that is not translated into a machine instruction: setdp.
  32. It expects an expression as argument.
  33. This is used for efficient address encoding of some addressing
  34. mode (see below).
  35. .IP "addressing modes"
  36. .nf
  37. .ta 8n 16n 24n 32n 40n 48n
  38. syntax meaning (name)
  39. reg The operand of the instruction is in \fIreg\fP.
  40. reglist \fIreglist\fP is a either list of registers, seperated
  41. by ','s, or the word "all". It encodes in a register
  42. save mask, where "all" means all registers, that can
  43. be used by the push-pull instructions pshs, pshu,
  44. puls, and pulu.
  45. <expr The one-byte value of \fIexpr\fP is an address within
  46. a 256-byte page. The particular page in use is
  47. indicated by the contents of dp, so \fIexpr\fP is the
  48. low byte of the effective address of the operand,
  49. and dp the high byte. (direct)
  50. >expr The two-byte value of \fIexpr\fP is the exact memory
  51. address. Not that this mode always requires one
  52. byte more than "<expr". (extended)
  53. expr The value of \fIexpr\fP is an address.
  54. Except for long branches, this value is examined
  55. first to see if a short encoding is possible.
  56. When the instruction is a short branch, the value
  57. is checked to see if the address is not too remote,
  58. because in that case this branch is automatically
  59. replaced by a long branch. When the instruction is
  60. not a branch, the high byte of the value is compared
  61. with the value of the argument of the last setdp
  62. pseudo. If they are equal, this mode is replaced by
  63. "<expr", else by ">expr".
  64. (relative for branch-instructions)
  65. #expr The value of \fIexpr\fP is one- or two-byte immediate
  66. data. (immediate)
  67. (expr) The value of \fIexpr\fP is a pointer to the address
  68. of the operand. (indirect)
  69. expr, reg The value of \fIexpr\fP added to the contents of \fIreg\fP
  70. (which must be a 16-bit register) yields the
  71. effective address of the operand.
  72. (constant-offset indexed)
  73. , ireg The contents of \fIireg\fP (which must be indexable)
  74. yields the effective address of the operand.
  75. (constant-offset indexed)
  76. (expr, reg) The value of \fIexpr\fP added to the contents of \fIreg\fP
  77. (which must be a 16-bit register) yields a pointer
  78. to the effective address of the operand.
  79. (constant-offset indexed indirect)
  80. (, ireg) The contents of \fIireg\fP (which must be indexable)
  81. yields a pointer to the effective address of the
  82. operand. (constant-offset indexed indirect)
  83. ac, ireg The contents of \fIac\fP (which must be an accumulator)
  84. added to the contents of \fIireg\fP (which must be
  85. indexable) yields the effective address of the
  86. operand. (accumulator indexed)
  87. (ac, ireg) The contents of \fIac\fP (which must be an accumulator)
  88. added to the contents of \fIireg\fP (which must be
  89. indexable) yields a pointer to the effective address
  90. of the operand. (accumulator indexed indirect)
  91. ,ireg+
  92. ,ireg++ The contents of \fIireg\fP (which must be indexable) is
  93. used as effective address of the operand. After that
  94. it is incremented by 1 (+) or 2 (++).
  95. (auto-increment)
  96. (,ireg++) The contents of \fIireg\fP (which must be indexable) is
  97. used as a pointer to the effective address of the
  98. operand. After that it is incremented by 2.
  99. (auto-increment indirect)
  100. ,-ireg
  101. ,--ireg \fIireg\fP (which must be indexable) is decremented
  102. by 1 (-) or 2 (--). After that, its contents is used
  103. as effective address of the operand.
  104. (auto-decrement)
  105. (,--ireg) \fIireg\fP (which must be indexable) is decremented by 2.
  106. After that, its contents is used as a pointer to the
  107. effective address of the operand.
  108. (auto-decrement indirect)
  109. .fi
  110. .SH "SEE ALSO"
  111. uni_ass(6),
  112. ack(1),
  113. .br
  114. MC6809 preliminary programming manual, Motorola Inc., First Edition, 1979
  115. .SH EXAMPLE
  116. An example of 6809 assembly code.
  117. .nf
  118. .ta 8n 16n 24n 32n 40n 48n
  119. contby = 80
  120. compgo: lda #contby
  121. ldx #table - 2 !start of table
  122. clrb
  123. co1: addb #2
  124. lsra
  125. bcc co1
  126. jmp (b, x) !accumulator offset indirect
  127. .fi