6805_as.1 2.7 KB

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  1. .\" $Header$
  2. .TH 6805_AS 1
  3. .ad
  4. .SH NAME
  5. 6805_as \- assembler for Motorola 6805
  6. .SH SYNOPSIS
  7. /usr/em/lib/6805_as [options] argument ...
  8. .SH DESCRIPTION
  9. This assembler is made with the general framework
  10. described in \fIuni_ass\fP(6).
  11. .SH SYNTAX
  12. .IP registers
  13. The 6805 has an accumulator register A and an index register X. An
  14. instruction (from the read-modify-write group) that references the
  15. A-register has an "a" suffixed to the mnemonic. In a similar way
  16. the X-register, apart from indexing operations, is addressed with
  17. an "x" suffix, i.e. "lsra" and "negx".
  18. .IP "addressing modes"
  19. The assembler automatically selects the shortest opcode if
  20. appropriate and possible. Thus "sub 10" will use the direct
  21. addressing mode whereas "neg 0,x" will use indexed (no offset) mode.
  22. There are sick constructions where the assembler can't find out
  23. the shortest form in time. In those cases the longest form is used.
  24. .br
  25. Branches are handled in much the same way. If a branch is out of
  26. range it is replaced by a reversed condition branch, followed by
  27. a jump, automatically.
  28. .sp
  29. .nf
  30. .ta 8n 16n 24n 32n 40n 48n
  31. syntax meaning (name)
  32. #expr a one byte value (immediate)
  33. <expr 1-byte zero page address. Allowed in
  34. the register/memory and read-modify-
  35. write instruction groups. (direct)
  36. >expr 2-byte address. Allowed in the register
  37. memory group. (extended)
  38. expr 1-byte address if appropriate, 2-byte
  39. in other cases. (auto-direct/extended)
  40. ,x indexed with zero offset. (indexed)
  41. <expr,x indexed with 8 bit offset. (indexed-1)
  42. >expr,x indexed with 16 bit offset. (indexed-2)
  43. expr,x indexed with the shortest possible off-
  44. set. (auto indexed)
  45. bit,expr bit number and direct address.
  46. (bit set/clear)
  47. bit,expr,tag bit number, direct address and branch
  48. tag. Automatically changed to reversed
  49. condition branch and jump if appropri-
  50. ate. (bit test and branch)
  51. tag branch tag. Converted to reversed con-
  52. dition branch and jump if appropriate.
  53. (branch)
  54. .fi
  55. .IP "PSEUDO INSTRUCTIONS"
  56. .dram use the zero page ram/io segment.
  57. .dprom use the zero page (ep)rom segment.
  58. .cmos assemble cmos version instructions.
  59. .SH "SEE ALSO"
  60. uni_ass(6),
  61. ack(1),
  62. .br
  63. M6805 HMOS, M146805 CMOS family, Motorola,
  64. Prentice-Hall, Inc., 1983, (ISBN 0-13-541375-3).
  65. .SH EXAMPLE
  66. An example of Motorola 6805 assembly code.
  67. .sp 2
  68. .nf
  69. .ta 8n 16n 32n 40n 48n 56n 64n
  70. .dram
  71. one: .space 1 ! a-port
  72. .dprom
  73. c1: .byte 1
  74. .text
  75. start: ldx #c1 ! load address of c1
  76. txa
  77. sta one
  78. add c1 ! add one
  79. brset 1,one,whoop ! jif bit one of aport
  80. bset 1,one ! set it now
  81. .data
  82. .ascii "unused string"
  83. .text
  84. whoop: nop
  85. .org 0xff8
  86. .word start ! set vector address
  87. .text
  88. nop ! resume code
  89. .fi
  90. .SH AUTHOR
  91. Written by Gijs Mos.
  92. Not a member of the ACK group.
  93. .SH BUGS
  94. The assembler has not been well tested.