dvi.s 2.9 KB

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  1. .define .dvi
  2. .sect .text
  3. .sect .rom
  4. .sect .data
  5. .sect .bss
  6. ! signed long divide
  7. !-----------------------------------------------------------------------------
  8. ! rewritten by Kai-Uwe Bloem (i5110401@dbstu1.bitnet) for speed.
  9. ! #1 01/12/90 initial revision. Minor reduce of shift operations.
  10. ! #2 03/07/90 use 68000 divu instruction whereever possible. This change
  11. ! makes #1 superflous. (derived from my GNU division routine)
  12. !-----------------------------------------------------------------------------
  13. ! Some common cases can be handled in a special, much faster way :
  14. ! 1) divisor = 0
  15. ! => cause trap, then return to user. Result is undefined
  16. ! 2) dividend < divisor
  17. ! => quotient = 0, remainder = dividend
  18. ! 3) divisor < 0x10000 ( i.e. divisor is only 16 bits wide )
  19. ! => quotient and remainder can be calculated quite fast by repeated
  20. ! application of 68000 divu operations (ca. 400 cycles)
  21. ! 4) otherwise (due to #2, #3 dividend, divisor both wider then 16 bits)
  22. ! => do slow division by shift and subtract
  23. !-----------------------------------------------------------------------------
  24. ! register usage:
  25. ! : d0 divisor
  26. ! d1 dividend
  27. ! exit : d1 quotient
  28. ! d2 remainder
  29. .sect .text
  30. .dvi:
  31. move.l (sp)+,a1 ! return address
  32. move.l (sp)+,d0 ! divisor
  33. move.l (sp)+,d2 ! dividend
  34. move.l d3,a0 ! save d3
  35. move.l d4,-(sp) ! save result sign register
  36. clr.l d4
  37. tst.l d2
  38. bpl 0f ! dividend is negative ?
  39. neg.l d2 ! yes - negate
  40. not.l d4 ! and note negation in d4
  41. 0:
  42. tst.l d0
  43. bpl 0f ! divisor is negative ?
  44. neg.l d0 ! yes - negate
  45. not.w d4 ! note negation
  46. 0:
  47. clr.l d1 ! prepare quotient
  48. ! === case 1: divisor = 0
  49. tst.l d0 ! divisor = 0 ?
  50. beq 9f ! yes - divide by zero trap
  51. ! === case 2: dividend < divisor
  52. cmp.l d0,d2 ! dividend < divisor ?
  53. bcs 8f ! yes - division already finished
  54. ! === case 3: divisor <= 0x0ffff
  55. cmp.l #0x0ffff,d0 ! is divisor only 16 bits wide ?
  56. bhi 2f
  57. move.w d2,d3 ! save dividend.l
  58. clr.w d2 ! prepare dividend.h for divu operation
  59. swap d2
  60. beq 0f ! dividend.h is all zero, no divu necessary
  61. divu d0,d2
  62. 0: move.w d2,d1 ! save quotient.h
  63. swap d1
  64. move.w d3,d2 ! divide dividend.l
  65. divu d0,d2 ! (d2.h = remainder of prev divu)
  66. move.w d2,d1 ! save qoutient.l
  67. clr.w d2 ! get remainder
  68. swap d2
  69. bra 8f
  70. ! === case 4: divisor and dividend both > 0x0ffff
  71. 2:
  72. move #32-1,d3 ! loop count
  73. 4:
  74. lsl.l #1,d2 ! shift dividend ...
  75. roxl.l #1,d1 ! ... into d1
  76. cmp.l d0,d1 ! compare with divisor
  77. bcs 5f
  78. sub.l d0,d1 ! bigger, subtract divisor
  79. add #1,d2 ! note subtraction in result
  80. 5:
  81. dbra d3,4b
  82. exg d1,d2 ! get results in the correct registers
  83. 8:
  84. tst.w d4 ! quotient < 0 ?
  85. bpl 0f
  86. neg.l d1 ! yes - negate
  87. 0: tst.l d4 ! remainder < 0 ?
  88. bpl 0f
  89. neg.l d2
  90. 0: move.l (sp)+,d4 ! restore d4
  91. move.l a0,d3 ! restore d3
  92. jmp (a1)
  93. EIDIVZ = 6
  94. 9: move.w #EIDIVZ,-(sp)
  95. jsr .trp