ncg.doc 85 KB

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  1. .\" $Id$
  2. .RP
  3. .ND
  4. .TL
  5. The table driven code generator
  6. .br
  7. from the
  8. .br
  9. Amsterdam Compiler Kit
  10. .br
  11. Second Revised Edition
  12. .AU
  13. Hans van Staveren
  14. .AI
  15. Dept. of Mathematics and Computer Science
  16. Vrije Universiteit
  17. Amsterdam, The Netherlands
  18. .AB
  19. The Amsterdam Compiler Kit is a collection of tools
  20. designed to help automate the process of compiler building.
  21. Part of it is a table driven code generator,
  22. called
  23. .I cg ,
  24. and a program to check and translate machine description
  25. tables called
  26. .I cgg .
  27. This document provides a description of the internal workings of
  28. .I cg ,
  29. and a description of syntax and semantics of the driving table.
  30. This is required reading for those wishing to write a new table.
  31. .AE
  32. .NH 1
  33. Introduction
  34. .PP
  35. Part of the Amsterdam Compiler Kit is a code generator system consisting
  36. of a code generator generator (\fIcgg\fP for short) and some machine
  37. independent C code.
  38. .I Cgg
  39. reads a machine description table and creates two files,
  40. tables.h and tables.c.
  41. These are then used together with other C code to produce
  42. a code generator for the machine at hand.
  43. .PP
  44. This in turn reads compact EM code and produces
  45. assembly code.
  46. The remainder of this document will first broadly describe
  47. the working of the code generator,
  48. then the machine table will be described after which
  49. some light is shed onto
  50. the internal workings of the code generator.
  51. .PP
  52. The reader is assumed to have at least a vague notion about the
  53. semantics of the intermediary EM code.
  54. Someone wishing to write a table for a new machine
  55. should be thoroughly acquainted with EM code
  56. and the assembly code of the machine at hand.
  57. .NH 1
  58. What has changed since version 1 ?
  59. .PP
  60. This section can be skipped by anyone not familiar with the first version.
  61. It is not needed to understand the current version.
  62. .PP
  63. This paper describes the second version of the code generator system.
  64. Although the code generator itself is for the main part unchanged,
  65. the table format has been drastically redesigned and the opportunities
  66. to make faulty tables are reduced.
  67. The format is now aesthaticly more pleasing (according to \fIme\fP that is),
  68. mainly because the previous version was designed for one line code rules,
  69. which did not work out that way.
  70. .PP
  71. The `SCRATCH' property is now automatically generated by
  72. .I cgg ,
  73. .I erase
  74. and
  75. .I setcc
  76. calls and their ilk are now no longer needed
  77. (read: can no longer be forgotten)
  78. and all this because the table now
  79. .I knows
  80. what the machine instructions look like and what arguments they
  81. destroy.
  82. .PP
  83. Checks are now made for register types, so it is no longer possible
  84. to generate a `regind2' token with a floating point register as a base.
  85. In general, if the instructions of the machine are correctly defined,
  86. it is no longer possible to generate code that does not assemble,
  87. which of course does not mean that it is not possible to generate
  88. assembly code that does not do what was intended!
  89. .PP
  90. Checks are made now for missing moves, tests, coercions, etc.
  91. There is a form of procedure call now to reduce table size:
  92. it is no longer necessary to write the code for conditional
  93. instructions six times.
  94. .PP
  95. The inreg() pseudo-function returns other results!!
  96. .NH 1
  97. Global overview of the workings of the code generator.
  98. .PP
  99. The code generator or
  100. .I cg
  101. tries to generate good code by simulating the stack
  102. of the compiled program and delaying emission of code as long
  103. as possible.
  104. It also keeps track of register contents, which enables it to
  105. eliminate redundant moves, and tries to eliminate redundant tests
  106. by keeping information about condition code status,
  107. if applicable for the machine.
  108. .PP
  109. .I Cg
  110. maintains a `fake stack' containing `tokens' that are built
  111. by executing the pseudo code contained in the code rules given
  112. by the table writer.
  113. One can think of the fake stack as a logical extension of the real
  114. stack the compiled program will have when run.
  115. Alternatively one can think of the real stack as an infinite extension
  116. at the bottom of the fake stack.
  117. Both ways, the concatenation of the real stack and the fake stack
  118. will be the stack as it would have been on a real EM machine (see figure).
  119. .TS
  120. center;
  121. cw(3.5c) cw(3c) cw(3.5c)
  122. cw(3.5c) cw(3c) cw(3.5c)
  123. |cw(3.5c)| cw(3c) |cw(3.5c)| .
  124. EM machine target machine
  125. real stack
  126. stack
  127. grows
  128. EM stack \s+2\(br\s0
  129. \s+2\(br\s0
  130. \s+2\(br\s0 _
  131. \s+2\(br\s0
  132. \s+2\(da\s0
  133. fake stack
  134. _ _
  135. .T&
  136. ci s s.
  137. Relation between EM stack, real stack and fake stack.
  138. .TE
  139. During code generation tokens will be kept on the fake stack as long
  140. as possible but when they are moved to the real stack,
  141. by generating code for the push,
  142. all tokens above\v'-.25m'\(dg\v'.25m'
  143. .FS
  144. \(dg in this document the stack is assumed to grow downwards,
  145. although the top of the stack will mean the first element that will
  146. be popped.
  147. .FE
  148. the pushed tokens will be pushed also,
  149. so the fake stack will not contain holes.
  150. .PP
  151. The information about the machine that
  152. .I cg
  153. needs has to be given in a machine description table,
  154. with as a major part a list of code rules telling
  155. .I cg
  156. what to do when certain EM-instructions occur
  157. with certain tokens on the fake stack.
  158. Not all possible fake stack possibilities have to be given of course,
  159. there is a possibility for providing rewriting rules, or
  160. .I coercions
  161. as they are called in this document.
  162. .PP
  163. The main loop of
  164. .I cg
  165. is:
  166. .IP 1)
  167. find a pattern of EM instructions starting at the current one to
  168. generate code for.
  169. This pattern will usually be of length one but longer patterns can be used.
  170. Process any pseudo-instructions found.
  171. .IP 2)
  172. Select one of the possibly many stack patterns that go with this
  173. EM pattern on the basis of heuristics, look ahead or both.
  174. The cost fields provided in the token definitions and
  175. instruction definitions are used
  176. to compute costs during look ahead.
  177. .IP 3)
  178. Force the current fake stack contents to match the pattern.
  179. This may involve
  180. copying tokens to registers, making dummy transformations, e.g. to
  181. transform a `local' into an `indexed from register' or might even
  182. cause the move of the complete fake stack contents to the real stack
  183. and then back into registers if no suitable coercions
  184. were provided by the table writer.
  185. .IP 4)
  186. Execute the pseudocode associated with the code rule just selected,
  187. this may cause registers to be allocated,
  188. code to be emitted etc..
  189. .IP 5)
  190. Put tokens onto the fake stack to reflect the result of the operation.
  191. .IP 6)
  192. Insert some EM instructions into the stream;
  193. this is possible but not common.
  194. .IP 7)
  195. Account for the cost.
  196. The cost is kept in a (space, time) vector and look ahead decisions
  197. are based on a linear combination of these.
  198. The code generator calls on itself recursively during look ahead,
  199. and the recursive incarnations return the costs they made.
  200. The costs the top-level code generator makes is of course irrelevant.
  201. .PP
  202. The table that drives
  203. .I cg
  204. is not read in every time,
  205. but instead is used at compile time
  206. of
  207. .I cg
  208. to set parameters and to load pseudocode tables.
  209. A program called
  210. .I cgg
  211. reads the table and produces large lists of numbers that are
  212. compiled together with machine independent code to produce
  213. a code generator for the machine at hand.
  214. .PP
  215. Part of the information needed is not easily expressed in this table
  216. format and must be supplied in two separate files,
  217. mach.h and mach.c.
  218. Their contents are described later in this document.
  219. .NH 1
  220. Register variables
  221. .PP
  222. If the machine has more than enough registers to generate code with,
  223. it is possible to reserve some of them for use as register variables.
  224. If it has not, this section may be skipped and any references
  225. to register variables in the rest of this document may be ignored.
  226. .PP
  227. The front ends generate messages to the back ends telling them which
  228. local variables could go into registers.
  229. The information given is the offset of the local, its size and type
  230. and a scoring number, roughly the number of times it occurs.
  231. .PP
  232. The decision which variable to put in which register is taken by the
  233. machine independent part of
  234. .I cg
  235. with the help of a scoring function provided by the table writer in mach.c.
  236. The types of variables known are
  237. .IP reg_any 12
  238. Just a variable of some integer type.
  239. Nothing special known about it.
  240. .IP reg_float
  241. A floating point variable.
  242. .IP reg_loop
  243. A loop control variable.
  244. .IP reg_pointer
  245. A pointer variable.
  246. Usually they are better candidates to put in registers.
  247. .PP
  248. If register variables are used,
  249. more functions must be supplied in mach.c.
  250. These functions are explained later.
  251. .NH 1
  252. Description of the machine table
  253. .PP
  254. The machine description table consists of the
  255. concatenation of the following sections:
  256. .IP 1)
  257. Constant definitions
  258. .IP 2)
  259. Property definitions
  260. .IP 3)
  261. Register definitions
  262. .IP 4)
  263. Token definitions
  264. .IP 5)
  265. Set definitions
  266. .IP 6)
  267. Instruction definitions
  268. .IP 7)
  269. Move definitions
  270. .IP 8)
  271. Test definitions
  272. .IP 9)
  273. Stack definitions
  274. .IP 10)
  275. Coercions
  276. .IP 11)
  277. Code rules
  278. .PP
  279. This is the order in the table
  280. but the descriptions in this document will use a slightly different
  281. order.
  282. All sections except the first start with an uppercase header word.
  283. Examples may be given in early stages that use knowledge that is explained
  284. in a later stage.
  285. If something is not clear the first time, please read on.
  286. All will clear up in a couple of pages.
  287. .PP
  288. Input is in free format, white space and newlines may be used
  289. at will to improve legibility.
  290. Identifiers used in the table have the same syntax as C identifiers,
  291. upper and lower case considered different, all characters significant.
  292. Here is a list of reserved words; all of these are unavailable as identifiers.
  293. .TS
  294. box;
  295. l l l l l.
  296. ADDR STACKINGRULES gen proc test
  297. COERCIONS TESTS highw reg_any to
  298. INSTRUCTIONS TIMEFACTOR inreg reg_float topeltsize
  299. INT TOKENS is_rom reg_loop ufit
  300. MOVES call kills reg_pointer uses
  301. PATTERNS cost lab regvar with
  302. PROPERTIES defined labeldef return yields
  303. REGISTERS exact leaving reusing
  304. SETS example loww rom
  305. SIZEFACTOR fallthrough move samesign
  306. STACK from pat sfit
  307. .TE
  308. C style comments are accepted.
  309. .DS
  310. /* this is a comment */
  311. .DE
  312. If the standard constant facility is not enough the C-preprocessor can
  313. be used to enhance the table format.
  314. .PP
  315. Integers in the table have the normal C-style syntax.
  316. Decimal by default, octal when preceded by a 0
  317. and hexadecimal when preceded by 0x.
  318. .NH 2
  319. Constant section
  320. .PP
  321. In the first part of the table some constants can be defined,
  322. most with the syntax
  323. .DS
  324. NAME=value
  325. .DE
  326. value being an integer or string.
  327. Three constants must be defined here:
  328. .IP EM_WSIZE 14
  329. Number of bytes in a machine word.
  330. This is the number of bytes
  331. a \fBloc\fP instruction will put on the stack.
  332. .IP EM_PSIZE
  333. Number of bytes in a pointer.
  334. This is the number of bytes
  335. a \fBlal\fP instruction will put on the stack.
  336. .IP EM_BSIZE
  337. Number of bytes in the hole between AB and LB.
  338. If the calling sequence just saves PC and LB this
  339. size will be twice the pointersize.
  340. .PP
  341. EM_WSIZE and EM_PSIZE are checked when a program is compiled
  342. with the resulting code generator.
  343. EM_BSIZE is used by
  344. .I cg
  345. to add to the offset of instructions dealing with locals
  346. having positive offsets,
  347. i.e. parameters.
  348. .PP
  349. Other constants can be defined here to be used as mnemonics
  350. later in the table.
  351. .PP
  352. Optional is the definition of a printformat for integers in the code file.
  353. This is given as
  354. .DS
  355. FORMAT = string
  356. .DE
  357. The string must be a valid printf(III) format,
  358. and defaults to "%ld".
  359. For example on the PDP-11 one can use
  360. .DS
  361. FORMAT= "0%lo"
  362. .DE
  363. to satisfy the old UNIX assembler that reads octal unless followed by
  364. a period, and the ACK assembler that follows C conventions.
  365. .PP
  366. Tables under control of source code control systems like
  367. .I sccs
  368. or
  369. .I rcs
  370. can put their id-string here, for example
  371. .DS
  372. rcsid="$\&Header$"
  373. .DE
  374. These strings, like all strings in the table, will eventually
  375. end up in the binary code generator produced.
  376. .PP
  377. Optionally one can give the factors with which the size and time
  378. parts of the cost vector have to be multiplied to ensure they have the
  379. same order of magnitude.
  380. This can be done as
  381. .DS
  382. SIZEFACTOR = C\d3\u/C\d4\u
  383. .sp
  384. TIMEFACTOR = C\d1\u/C\d2\u
  385. .DE
  386. Above numbers must be read as rational numbers.
  387. Defaults are 1/1 for both of them.
  388. These constants set the default size/time tradeoff in the code generator,
  389. so if TIMEFACTOR and SIZEFACTOR are both 1 the code generator will choose
  390. at random between two code sequences where one has
  391. cost (10,4) and the other has cost (8,6).
  392. See also the description of the cost field below.
  393. .NH 2
  394. Property definition
  395. .PP
  396. This part of the table defines the list of properties that can be used
  397. to differentiate between register classes.
  398. It consists of a list of user-defined
  399. identifiers optionally followed by the size
  400. of the property in parentheses, default EM_WSIZE.
  401. Example for the PDP-11:
  402. .TS
  403. l l.
  404. PROPERTIES /* The header word for this section */
  405. GENREG /* All PDP registers */
  406. REG /* Normal registers (allocatable) */
  407. ODDREG /* All odd registers (allocatable) */
  408. REGPAIR(4) /* Register pairs for division */
  409. FLTREG(4) /* Floating point registers */
  410. DBLREG(8) /* Same, double precision */
  411. GENFREG(4) /* generic floating point */
  412. GENDREG(8) /* Same, double precision */
  413. FLTREGPAIR(8) /* register pair for modf */
  414. DBLREGPAIR(16) /* Same, double precision */
  415. LOCALBASE /* Guess what */
  416. STACKPOINTER
  417. PROGRAMCOUNTER
  418. .TE
  419. Registers are allocated by asking for a property,
  420. so if for some reason in later parts of the table
  421. one particular register must be allocated it
  422. has to have a unique property.
  423. .NH 2
  424. Register definition
  425. .PP
  426. The next part of the tables describes the various registers of the
  427. machine and defines identifiers
  428. to be used in later parts of the tables.
  429. Syntax:
  430. .DS
  431. <register definitions> : REGISTERS <list of definitions>
  432. <definition> : <registerlist> ':' <propertylist> <optional regvar> '.'
  433. <register> : ident [ '(' string ')' ] [ '=' ident [ '+' ident ] ]
  434. .DE
  435. Example for the PDP-11:
  436. .TS
  437. l l.
  438. REGISTERS
  439. r0,r2,r4 : GENREG,REG.
  440. r1,r3 : GENREG,REG,ODDREG.
  441. r01("r0")=r0+r1 : REGPAIR.
  442. fr0("r0"),fr1("r1"),fr2("r2"),fr3("r3") : GENFREG,FLTREG.
  443. dr0("r0")=fr0,dr1("r1")=fr1,
  444. dr2("r2")=fr2,dr3("r3")=fr3 : GENDREG,DBLREG.
  445. fr01("r0")=fr0+fr1,fr23("r2")=fr2+fr3 : FLTREGPAIR.
  446. dr01("r0")=dr0+dr1,dr23("r2")=dr2+dr3 : DBLREGPAIR.
  447. lb("r5") : GENREG,LOCALBASE.
  448. sp : GENREG,STACKPOINTER.
  449. pc : GENREG,PROGRAMCOUNTER.
  450. .TE
  451. .PP
  452. The names in the left hand lists are names of registers as used
  453. in the table.
  454. They can optionally be followed by a string in parentheses,
  455. their name as far as the assembler is concerned.
  456. The default assembler name is the same as the table name.
  457. A name can also be followed by
  458. .DS
  459. = othername
  460. .DE
  461. or
  462. .DS
  463. = othername + othername
  464. .DE
  465. which says that the register is composed of the parts
  466. after the '=' sign.
  467. The identifiers at the right hand side of the lists are
  468. names of properties.
  469. The end of each register definition is a period.
  470. .PP
  471. It might seem wise to list every property of a register,
  472. so one might give r0 the extra property MFPTREG named after the not
  473. too well known MFPT instruction on newer PDP-11 types,
  474. but this is not a good idea,
  475. especially since no use can be made of that instruction anyway.
  476. Every extra property means the register set is more unorthogonal
  477. and
  478. .I cg
  479. execution time is influenced by that,
  480. because it has to take into account a larger set of registers
  481. that are not equivalent.
  482. So try to keep the number of different register classes to a minimum.
  483. When faced with the choice between two possible code rules
  484. for a nonfrequent EM sequence,
  485. one being elegant but requiring an extra property,
  486. and the other less elegant,
  487. elegance should probably loose.
  488. .PP
  489. Tables that implement register variables must mark registers to be used
  490. for variable storage here by following the list of properties by one
  491. of the following:
  492. .DS
  493. regvar \fIor\fP regvar(reg_any)
  494. regvar(reg_loop)
  495. regvar(reg_pointer)
  496. regvar(reg_float)
  497. .DE
  498. meaning they are candidates for that type of variable.
  499. All register variables of one type must be of the same size,
  500. and they may have no subregisters.
  501. Such registers are not available for normal code generation.
  502. .NH 2
  503. Stack token definition
  504. .PP
  505. The next part describes all possible tokens that can reside on
  506. the fake stack during code generation.
  507. Attributes of a token are described as a C struct declaration;
  508. this is followed by the size of the token in bytes,
  509. optionally followed by the cost of the token when used as an addressing mode
  510. and the format to be used on output.
  511. .PP
  512. In general, when writing a table, it is not wise to try
  513. to think of all necessary tokens in advance.
  514. While writing the necessity or advisability for some token
  515. will be seen and it can then be added together with the
  516. stacking rules and coercions needed.
  517. .PP
  518. Tokens should usually be declared for every addressing mode
  519. of the machine at hand and for every size directly usable in
  520. a machine instruction.
  521. Example for the PDP-11 (incomplete):
  522. .TS
  523. l l.
  524. TOKENS
  525. const2 = { INT num; } 2 cost(2,300) "$" num .
  526. addr_local = { INT ind; } 2 .
  527. addr_external = { ADDR off; } 2 "$" off.
  528. regdef2 = { GENREG reg; } 2 "*" reg.
  529. regind2 = { GENREG reg; ADDR off; } 2 off "(" reg ")" .
  530. reginddef2 = { GENREG reg; ADDR off; } 2 "*" off "(" reg ")" .
  531. regconst2 = { GENREG reg; ADDR off; } 2 .
  532. relative2 = { ADDR off; } 2 off .
  533. reldef2 = { ADDR off; } 2 "*" off.
  534. .TE
  535. .PP
  536. Types allowed in the struct are ADDR, INT and all register properties.
  537. The type ADDR means a string and an integer,
  538. which is output as string+integer,
  539. and arithmetic on mixed ADDR and INT is possible.
  540. This is the right mode for anything that can be an
  541. assembler address expression.
  542. The type of the register in the token is strict.
  543. At any assignment of an expression of type register to a token attribute
  544. of type register
  545. .I cgg
  546. will check if the set of possible results from the expression is a subset
  547. of the set of permissible values for the token attribute.
  548. .PP
  549. The cost-field is made up by the word
  550. .I cost
  551. followed by two numbers in parentheses, the size and timecosts
  552. of this token when output in the code file.
  553. If omitted, zero cost is assumed.
  554. While generating code,
  555. .I cg
  556. keeps track of a linear combination of these costs together
  557. with the costs of the instructions itself which we will see later.
  558. The coefficients of this linear combination are influenced
  559. by two things:
  560. .IP 1)
  561. The SIZEFACTOR and TIMEFACTOR constants,
  562. as mentioned above.
  563. .IP 2)
  564. A run time option to
  565. .I cg
  566. that can adjust the time/space tradeoff to all positions
  567. from 100% time to 100% space.
  568. .LP
  569. By supplying different code rules in certain situations
  570. it is possible to get a code generator that can adjust its
  571. code to the need of the moment.
  572. This is probably most useful with small machines,
  573. experience has shown that on the larger micro's and mini's
  574. the difference between time-optimal and space-optimal code
  575. is often small.
  576. .PP
  577. The printformat consists of a list of strings intermixed with
  578. attributes from the token.
  579. Strings are output literally, attributes are printed according
  580. to their type and value.
  581. Tokens without a printformat should never be output,
  582. and
  583. .I cgg
  584. checks for this.
  585. .PP
  586. Notice that tokens need not correspond to addressing modes;
  587. the regconst2 token listed above,
  588. meaning the sum of the contents of the register and the constant,
  589. has no corresponding addressing mode on the PDP-11,
  590. but is included so that a sequence of add constant, load indirect,
  591. can be handled efficiently.
  592. This regconst2 token is needed as part of the path
  593. .DS
  594. REG -> regconst2 -> regind2
  595. .DE
  596. of which the first and the last "exist" and the middle is needed
  597. only as an intermediate step.
  598. .PP
  599. Tokens with name `LOCAL' or `DLOCAL' are a special case when
  600. register variables are used, this is explained further in the
  601. section on token descriptions.
  602. .NH 2
  603. Sets
  604. .PP
  605. Usually machines have certain collections of addressing modes that
  606. can be used with certain instructions.
  607. The stack patterns in the table are lists of these collections
  608. and since it is cumbersome to write out these long lists
  609. every time, there is a section here to give names to these
  610. collections.
  611. Please note that it is not forbidden to write out a set
  612. in the remainder of the table,
  613. but for clarity it is usually better not to.
  614. .LP
  615. Example for the PDP-11 (incomplete):
  616. .TS
  617. l l.
  618. SETS
  619. src2 = GENREG + regdef2 + regind2 + reginddef2 + relative2 +
  620. \h'\w'= 'u'reldef2 + addr_external + const2 + LOCAL + ILOCAL +
  621. \h'\w'= 'u'autodec + autoinc .
  622. dst2 = src2 - ( const2 + addr_external ) .
  623. xsrc2 = src2 + ftoint .
  624. src1 = regdef1 + regind1 + reginddef1 + relative1 + reldef1 .
  625. dst1 = src1 .
  626. src1or2 = src1 + src2 .
  627. src4 = relative4 + regdef4 + DLOCAL + regind4 .
  628. dst4 = src4 .
  629. .TE
  630. Permissible in the set construction are all the usual set operators, i.e.
  631. .IP +
  632. set union
  633. .IP -
  634. set difference
  635. .IP *
  636. set intersection
  637. .PP
  638. Normal operator priorities apply, and parentheses can be
  639. used.
  640. Every token identifier is also a set identifier
  641. denoting the singleton collection of tokens containing
  642. just itself.
  643. Every register property as defined above is also a set
  644. matching all registers with that property.
  645. The standard set identifier ALL denotes the collection of
  646. all tokens.
  647. .NH 2
  648. Instruction definitions
  649. .PP
  650. In the next part of the table the instructions for the machine
  651. are declared together with information about their operands.
  652. Example for the PDP-11(very incomplete):
  653. .DS
  654. .ta 8 16 24 32 40 48 56 64
  655. INSTRUCTIONS
  656. /* default cost */
  657. cost(2,600)
  658. /* Normal instructions */
  659. adc dst2:rw:cc .
  660. add src2:ro,dst2:rw:cc cost(2,450).
  661. ash src2:ro,REG:rw:cc .
  662. ashc src2:ro,REGPAIR+ODDREG:rw .
  663. asl dst2:rw:cc .
  664. asr dst2:rw:cc .
  665. bhis "bcc" label .
  666. /* floating point instructions */
  667. movf "ldf" fsrc,freg .
  668. movf "stf" freg,fdst .
  669. .DE
  670. As the examples show an instruction definition consists of the name
  671. of the instruction,
  672. optionally followed by an assembler mnemonic in
  673. quotes-default is the name itself-and then
  674. a list of operands,
  675. optionally followed by the cost and then a period.
  676. If the cost is omitted the cost just after the word
  677. INSTRUCTIONS is assumed,
  678. if that is also omitted the cost is zero.
  679. The cost must be known by
  680. .I cg
  681. of course if it has multiple
  682. code generation paths to choose from.
  683. .PP
  684. For each operand we have the set of possible token values,
  685. followed by a qualifier that can be
  686. .IP :ro
  687. signifies that this operand is read only,
  688. so it can be replaced by a register with the same contents
  689. if available.
  690. .IP :rw
  691. signifies that the operand is read-write
  692. .IP :wo
  693. signifies that the operand is write only.
  694. .IP :cc
  695. says that after the instruction is finished, the condition codes
  696. are set to this operand.
  697. If none of the operands have the :cc qualifier set,
  698. .I cg
  699. will assume that condition codes were unaffected
  700. (but see below).
  701. .PP
  702. The first three qualifiers are of course mutually exclusive.
  703. The :ro qualifier does not cause any special action in the current
  704. implementation, and the :wo and :rw qualifiers are treated equal.
  705. It must be recommended however to be precise in the specifications,
  706. since later enhancements to the code generator might use them.
  707. .PP
  708. As the last examples show it is not necessary to give one definition
  709. for an instruction.
  710. There are machines that have very unorthogonal instruction sets,
  711. in fact most of them do,
  712. and it is possible to declare each possible combination
  713. of operands.
  714. The
  715. .I cgg
  716. program will check all uses of the instruction to find out which
  717. one was meant.
  718. .PP
  719. Although not in the PDP-11 example above there is a possibility
  720. to describe instructions that have side effects to registers not
  721. in the operand list.
  722. The only thing possible is to say that the instruction is destructive
  723. to some registers or the condition codes, by following the operand list
  724. with the word
  725. .I kills
  726. and a list of the things destroyed.
  727. Example for some hypothetic accumulator machine:
  728. .DS
  729. add source2:ro kills ACCU :cc .
  730. .DE
  731. .PP
  732. The cost fields in the definitions for tokens and instructions
  733. are added together when generating code.
  734. It depends on the machine at hand whether the costs are orthogonal
  735. enough to make use of both these costs,
  736. in extreme cases every combination of instructions and operands
  737. can be given in this section,
  738. all with their own costs.
  739. .NH 2
  740. Expressions
  741. .PP
  742. Throughout the rest of the table expressions can be used in some
  743. places.
  744. This section will give the syntax and semantics of expressions.
  745. There are four types of expressions: integer, address, register and undefined.
  746. Really the type register is nonexistent as such,
  747. for each register expression
  748. .I cgg
  749. keeps a set of possible values,
  750. and this set can be seen as the real type.
  751. .PP
  752. Type checking is performed by
  753. .I cgg .
  754. An operator with at least one undefined operand returns undefined except
  755. for the defined() function mentioned below.
  756. An undefined expression is interpreted as FALSE when it is needed
  757. as a truth value.
  758. It is the responsibility of the table writer to ensure no undefined
  759. expressions are ever used as initialisers for token attributes.
  760. This is unfortunately almost impossible to check for
  761. .I cgg
  762. so be careful.
  763. .LP
  764. Basic terms in an expression are
  765. .IP number 16
  766. A number is a constant of type integer.
  767. Also usable is an identifier defined to a number in the constant
  768. definition section.
  769. .IP """string"""
  770. A string within double quotes is a constant of type address.
  771. All the normal C style escapes may be used within the string.
  772. Also usable is an identifier defined to a string in the constant
  773. definition section.
  774. .IP [0-9][bf]
  775. This must be read as a grep-pattern.
  776. It evaluates to a string that is the label name for the
  777. temporary label meant.
  778. More about this in the section on code rules.
  779. .IP REGIDENT
  780. The name of a register is a constant of type register.
  781. .IP $\fIi\fP
  782. A dollarsign followed by a number is the representation of the argument
  783. of EM instruction \fI\fP.
  784. The type of the operand is dependent on the instruction,
  785. sometimes it is integer,
  786. sometimes it is address.
  787. It is undefined when the instruction has no operand.
  788. Instructions with type-letter w can occur without an operand.
  789. This can be checked in the code rule with the defined() pseudo function.
  790. .br
  791. If it is unimaginable for the operand of the instruction ever to be
  792. something different from a plain integer, the type is integer,
  793. otherwise it is address.
  794. .br
  795. Those who want to know it exactly, the integer instruction types
  796. are the instructions marked with the
  797. type-letters c,f,l,n,o,s,r,w,z in the EM manual.
  798. .br
  799. .I Cg
  800. makes all necessary conversions,
  801. like adding EM_BSIZE to positive arguments of instructions
  802. dealing with locals,
  803. prepending underlines to global names,
  804. converting code labels into a unique representation etc.
  805. Details about this can be found in the section about
  806. machine dependent C code.
  807. .IP %1
  808. This in general means the token mentioned first in the
  809. stack pattern.
  810. When used inside an expression the token must be a simple register.
  811. Type of this is register.
  812. .IP %1.off
  813. This means attribute "off" of the first stack pattern token.
  814. Type is the same as that of attribute "off".
  815. To use this expression implies a check that all tokens
  816. in the set used have the same attribute in the same place.
  817. .IP %off
  818. This means attribute "off" in the `current' token.
  819. This can only be used when no confusion is possible about which token
  820. was meant, eg. in the optional boolean expressions following token sets
  821. in the move and test rules, in coercions or in the kills section inside
  822. the code rules.
  823. Same check as above.
  824. .IP %1.1
  825. This is the first subregister of the first token.
  826. Previous comments apply.
  827. .IP %b
  828. A percent sign followed by a lowercase letter
  829. stands for an allocated register.
  830. This is the second allocated register.
  831. .IP %a.2
  832. The second subregister of the first allocated register.
  833. .PP
  834. All normal C operators apply to integers,
  835. the + operator on addresses behaves as one would expect
  836. and the only operators allowed on register expressions
  837. are == and != .
  838. Furthermore there are some special `functions':
  839. .IP defined(e) 16
  840. Returns 1 if expression
  841. .I e
  842. is defined, 0 otherwise.
  843. .IP samesign(e1,e2)
  844. Returns 1 if integer expression
  845. .I e1
  846. and
  847. .I e2
  848. have the same sign.
  849. .IP sfit(e1,e2)
  850. Returns 1 if integer expression
  851. .I e1
  852. fits as a signed integer
  853. into a field of
  854. .I e2
  855. bits, 0 otherwise.
  856. .IP ufit(e1,e2)
  857. Same as above but now for unsigned
  858. .I e1 .
  859. .IP rom($a,n)
  860. Integer expression giving word
  861. .I n
  862. from the \fBrom\fP descriptor
  863. pointed at by EM instruction
  864. number
  865. .I a
  866. in the EM-pattern.
  867. Undefined if that descriptor does not exist.
  868. .IP is_rom($a)
  869. Integer expression indicating whether EM instruction number
  870. .I a
  871. in the EM-pattern refers to ROM. This may be useful for generating
  872. position-independent code with the ROM in read-only memory.
  873. .I Is_rom
  874. enables one to see the difference between ROM references and other data
  875. references.
  876. .IP loww($a)
  877. Returns the lower half of the argument of EM instruction number
  878. .I a .
  879. This is used to split the arguments of a \fBldc\fP instruction.
  880. .IP highw($a)
  881. Same for upper half.
  882. .LP
  883. The next two `functions' are only needed in a table that
  884. implements register variables.
  885. .IP inreg(e) 16
  886. Returns the status of the local variable with offset
  887. .I e
  888. from the localbase.
  889. Value is an integer,
  890. negative if the local was not allowed as a register
  891. variable,
  892. zero if it was allowed but not assigned to a register,
  893. and the type of the register if it was assigned to a register.
  894. This makes it possible to write
  895. .DS
  896. inreg($1)==reg_pointer
  897. .DE
  898. and similar things.
  899. .IP regvar(e,t)
  900. Type of this is register.
  901. It returns the register the local with offset
  902. .I e
  903. is assigned to.
  904. The table writer guarantees the register is one of type
  905. .I t ,
  906. with
  907. .I t
  908. one of reg_any, reg_loop, reg_pointer or reg_float.
  909. If
  910. .I t
  911. is omitted reg_any is assumed.
  912. Undefined if inreg(\fIe\fP)<=0 .
  913. .LP
  914. The next two `functions' are only needed in a table that
  915. uses the top element size information.
  916. .IP topeltsize($a) 16
  917. Returns the size of the element on top of the EM-stack at the label
  918. identified by $a. This can be used to put the top of the stack in a
  919. register at the moment of an unconditional jump. At an unconditional jump,
  920. the size of the top-element will always look 0.
  921. .IP fallthrough($a)
  922. Returns 1 if the label identified by $a can be reached via fallthrough, 0
  923. otherwise.
  924. .NH 2
  925. Token descriptions
  926. .PP
  927. Throughout the rest of the table tokens must be described,
  928. be it as operands of instructions or as stack-replacements.
  929. In all those cases we will speak about a token description.
  930. The possibilities for these will be described here.
  931. .PP
  932. All expressions of type register are token descriptions.
  933. The construct %1 means the token matched first in the stack pattern.
  934. All other token descriptions are those that are built on the spot.
  935. They look like this:
  936. .DS
  937. { <tokenname> , <list of token attribute initializing expressions> }
  938. .DE
  939. All expressions are type-checked by
  940. .I cgg ,
  941. and the number of initializers is also checked.
  942. .PP
  943. A special case of the last token descriptions occurs when
  944. the token name is `LOCAL' or `DLOCAL' and the table uses register
  945. variables. The first token attribute then must be of type integer and
  946. the token description is automagically replaced by the register chosen
  947. if the LOCAL (wordsize) or DLOCAL (twice the wordsize) was assigned
  948. to a register.
  949. .NH 2
  950. Code rules
  951. .PP
  952. The largest section of the tables consists of the code generation rules.
  953. They specify EM patterns, stack patterns, code to be generated etc.
  954. Broadly the syntax is
  955. .DS L
  956. code rule : EM-part code-part
  957. EM-part : EM-pattern | procedure-heading
  958. code-part : code-description | procedure-call
  959. code-description : stackpattern kills allocates generates yields leaving
  960. .DE
  961. Ignoring the "procedure"-part for now, the description for the EM-pattern
  962. and the code-description follows.
  963. Almost everything here is optional, the minimum code rule
  964. is:
  965. .DS
  966. pat nop
  967. .DE
  968. that will simply throw away
  969. .I nop
  970. instructions.
  971. .NH 3
  972. The EM pattern
  973. .PP
  974. The EM pattern consists of a list of EM mnemonics
  975. preceded by the word
  976. .I pat
  977. optionally followed by a boolean expression.
  978. Examples:
  979. .DS
  980. pat \fBloe\fP
  981. .DE
  982. will match a single \fBloe\fP instruction,
  983. .DS
  984. pat \fBloc\fP \fBloc\fP \fBcif\fP $1==2 && $2==8
  985. .DE
  986. is a pattern that will match
  987. .DS
  988. \fBloc\fP 2
  989. \fBloc\fP 8
  990. \fBcif\fP
  991. .DE
  992. and
  993. .DS
  994. pat \fBlol\fP \fBinc\fP \fBstl\fP $1==$3
  995. .DE
  996. will match for example
  997. .DS
  998. .ta 10m 20m 30m 40m 50m 60m
  999. \fBlol\fP 6 \fBlol\fP -2 \fBlol\fP 4
  1000. \fBinc\fP \fBinc\fP but \fInot\fP \fBinc\fP
  1001. \fBstl\fP 6 \fBstl\fP -2 \fBstl\fP -4
  1002. .DE
  1003. A missing boolean expression evaluates to TRUE.
  1004. .PP
  1005. The code generator will match the longest EM pattern on every occasion,
  1006. if two patterns of the same length match the first in the table will be chosen,
  1007. while all patterns of length greater than or equal to three are considered
  1008. to be of the same length.
  1009. This rule of three is an unfortunate implementation dependent restriction,
  1010. but patterns longer than three EM instructions are luckily not needed
  1011. too often.
  1012. .PP
  1013. The EM mnemonic may also be the pseudo-instruction \fBlab\fP, which matches
  1014. a label. Its argument can be used in testing on topeltsize and
  1015. fallthrough. When this pattern is specified, the label should be defined
  1016. explicitly with a
  1017. .I labeldef
  1018. statement.
  1019. .PP
  1020. Following the EM-pattern there may be more than one code
  1021. rule,
  1022. .I cg
  1023. will choose using heuristics and the cost
  1024. information provided with the instruction and token
  1025. definitions.
  1026. Owing to parsing reasons of the table, the word
  1027. .I with
  1028. (see below)
  1029. is mandatory when there are more code rules attached to one
  1030. EM-pattern.
  1031. The stack pattern may be empty however.
  1032. .NH 3
  1033. The stack pattern
  1034. .PP
  1035. The optional stack pattern is a list of token sets preceded by the word
  1036. .I with .
  1037. The token sets are usually represented by set identifiers for clarity.
  1038. No boolean expression is allowed here.
  1039. The first expression is the one that matches the top of the stack.
  1040. .PP
  1041. If the pattern is followed by the word STACK
  1042. it only matches if there is nothing
  1043. else on the fake stack,
  1044. and the code generator will stack everything not matched at the start
  1045. of the rule.
  1046. .PP
  1047. The pattern can be preceded with the word
  1048. .I exact
  1049. following the
  1050. .I with
  1051. that tells the code generator not to try to coerce to the pattern
  1052. but only to use it when it is already present on the fake stack.
  1053. There are two reasons for this construction,
  1054. correctness and speed.
  1055. It is needed for correctness when the pattern contains a register
  1056. that is not transparent when data is moved through it.
  1057. .LP
  1058. Example: on the PDP-11 the shortest code for
  1059. .DS
  1060. \fBlae\fP a
  1061. \fBloi\fP 8
  1062. \fBlae\fP b
  1063. \fBsti\fP 8
  1064. .DE
  1065. is
  1066. .DS
  1067. movf _a,fr0
  1068. movf fr0,_b
  1069. .DE
  1070. if the floating point processor is in double
  1071. precision mode and fr0 is free.
  1072. Unfortunately this is not correct since a trap can occur on certain
  1073. kinds of data.
  1074. This could happen if there was a stack pattern for \fBsti\fP\ 8
  1075. like this:
  1076. .DS
  1077. with DBLREG
  1078. .DE
  1079. The code generator would then find that coercing the 8-byte global _a
  1080. to a floating point register and then storing it to _b was the cheapest,
  1081. if the space/time knob was turned far enough to space.
  1082. This can be prevented by changing the stack pattern to
  1083. .DS
  1084. with exact DBLREG
  1085. .DE
  1086. It is unfortunate that the type information is no longer present,
  1087. since if _a really is a floating point number the move could be
  1088. made without error.
  1089. .PP
  1090. The second reason for the
  1091. .I exact
  1092. construct is speed.
  1093. When the code generator has a long list of possible stack patterns
  1094. for one EM pattern it can waste much time trying to find coercions
  1095. to all of them, while the mere presence of such a long list
  1096. indicates that the table writer has given many special cases.
  1097. Prepending all the special cases by
  1098. .I exact
  1099. will stop the code generator from trying to find things
  1100. that either cannot be done,
  1101. or are too expensive anyway.
  1102. .PP
  1103. So in general it is wise to prepend all stack patterns that
  1104. cannot be made by coercions with
  1105. .I exact .
  1106. .PP
  1107. Using both
  1108. .I exact
  1109. and STACK in the stack pattern has the effect that the rule will
  1110. only be taken if there is nothing else on the fake stack.
  1111. .NH 3
  1112. The kills part
  1113. .PP
  1114. The optional kills part describes certain tokens
  1115. that should neither remain on
  1116. the fake stack, nor remembered as contents of registers.
  1117. This is usually only required with store operations.
  1118. The entire fake stack, except for the part matched in the stack pattern,
  1119. is searched for tokens matching the expression and they are copied
  1120. to the real stack.
  1121. Every register that contains the token is marked as empty.
  1122. .PP
  1123. Syntax is
  1124. .DS
  1125. kills <list of things to kill separated by commas>
  1126. thing to kill : token set optionally followed by boolean expression
  1127. .DE
  1128. Example:
  1129. .DS
  1130. kills regind2 %reg != lb || %off == $1
  1131. .DE
  1132. is a kills part used for example in the \fBinl\fP or \fBstl\fP code rule.
  1133. It removes all register offsetted tokens where the register is not the
  1134. localbase plus the local in which the store is done.
  1135. The necessity for this can be seen from the following example:
  1136. .DS
  1137. \fBlol\fP 4
  1138. \fBinl\fP 4
  1139. \fBstl\fP 6
  1140. .DE
  1141. Without a proper kills part in the rule for \fBinl\fP code would
  1142. be generated as here
  1143. .DS
  1144. inc 4(r5)
  1145. mov 4(r5),6(r5)
  1146. .DE
  1147. so local 6 would be given the new value of local 4 instead of the old
  1148. as the EM code prescribed.
  1149. .PP
  1150. When generating code for an EM-instruction like
  1151. .B sti
  1152. it is necessary to write a line in the table like
  1153. .DS
  1154. kills all_except_constant_or_register
  1155. .DE
  1156. where the long identifier is a set containing all tokens
  1157. that can be the destination of some random indirect store.
  1158. These indirect stores are the main reason to prevent this
  1159. .I kills
  1160. line to be deduced automatically by
  1161. .I cgg .
  1162. .PP
  1163. When generating something like a branch instruction it
  1164. might be needed to empty the fake stack completely.
  1165. This can of course be done with
  1166. .DS
  1167. kills ALL
  1168. .DE
  1169. or by ending the stack pattern with the word STACK,
  1170. if the stack pattern does not start with
  1171. .I exact .
  1172. The latter does not erase the contents of registers.
  1173. .PP
  1174. It is unfortunate that this part is still present in the table
  1175. but it is too much for now to let the
  1176. .I cgg
  1177. program discover what rules ruin what kind of tokens.
  1178. Maybe some day .....
  1179. .NH 3
  1180. The allocates part
  1181. .PP
  1182. The optional register allocation part describes the registers needed.
  1183. Syntax is
  1184. .DS
  1185. uses <list of use elements separated by commas>
  1186. .DE
  1187. where itemlist is a list of three kinds of things:
  1188. .IP 1)
  1189. .I reusing
  1190. < a token description >, for example %1.
  1191. .br
  1192. This will instruct the code generator that all registers
  1193. contained in this token can be reused if they are not used
  1194. in another token on the fakestack,
  1195. so that they are available for allocation in this
  1196. .I uses
  1197. line
  1198. if they were only used in that token.
  1199. See example below.
  1200. .IP 2)
  1201. a register property.
  1202. .br
  1203. This will allocate a register with that property,
  1204. that is marked as empty at this point.
  1205. Look ahead can be performed if there is more than one register available.
  1206. .IP 3)
  1207. a register property with initialization.
  1208. .br
  1209. This will allocate the register as in 2) but will also
  1210. initialize it.
  1211. This eases the task of the code generator because it can
  1212. find a register already filled with the right value
  1213. if it exists.
  1214. .LP
  1215. Examples:
  1216. .DS
  1217. uses ODDREG
  1218. .DE
  1219. will allocate an odd register, while
  1220. .DS
  1221. uses REG={regind2,lb,$1}
  1222. .DE
  1223. will allocate a register while simultaneously filling it with
  1224. the asked value.
  1225. .br
  1226. Inside the coercion from xsrc2 to REG in the PDP-11 table
  1227. the following line can be found.
  1228. .DS
  1229. uses reusing %1, REG=%1
  1230. .DE
  1231. This tells the code generator that registers contained in %1 can be used
  1232. again and asks to fill the register allocated with %1.
  1233. So if %1={regind2,r3,"4"} and r3 is not in use elsewhere on the fake stack
  1234. the following code might be generated.
  1235. .DS
  1236. mov 4(r3),r3
  1237. .DE
  1238. In the rest of the line the registers allocated can be named by
  1239. %a and %b.1,%b.2, i.e. with lower case letters
  1240. in order of allocation.
  1241. .NH 3
  1242. The generates part
  1243. .PP
  1244. Code to be generated, also optionally, is specified as
  1245. the word
  1246. .I gen
  1247. followed by a list of items of the following kind:
  1248. .IP 1)
  1249. An instruction name followed by a comma-separated
  1250. list of token descriptions.
  1251. .I Cgg
  1252. will search the instruction definitions for the machine to find a suitable
  1253. instruction.
  1254. At code generation time the assembler name of the
  1255. instruction will be output followed by a space,
  1256. followed by a comma separated list of tokens.
  1257. .br
  1258. In the table an instruction without operands must be
  1259. followed by a period.
  1260. The author of
  1261. .I cgg
  1262. could not get
  1263. .I yacc
  1264. to accept his syntax without it.
  1265. Sorry about this.
  1266. .IP 2)
  1267. a
  1268. .I move
  1269. call.
  1270. This has the following syntax:
  1271. .DS
  1272. move <token description>,<token description>
  1273. .DE
  1274. Moves are handled specially since that enables the code generator
  1275. to keep track of register contents.
  1276. Example:
  1277. .DS
  1278. move r3,{regind2,lb,$1}
  1279. .DE
  1280. will generate code to move r3 to $1(r5) except when
  1281. r3 already was a copy of $1(r5).
  1282. Then the code will be omitted.
  1283. The rules describing how to move things to each other
  1284. can be found in the move definitions section described below.
  1285. .IP 3)
  1286. For machines that have condition codes,
  1287. which alas most of them do,
  1288. there are provisions to remember condition code settings
  1289. and prevent needless testing.
  1290. To set the condition code to a token put in the code the following call:
  1291. .DS
  1292. test <token description>
  1293. .DE
  1294. This will generate a test if the condition codes
  1295. were not already set to that token.
  1296. The rules describing how to test things
  1297. can be found in the test definitions section described below.
  1298. See also the :cc qualifier that can be used at instruction
  1299. definition time.
  1300. .IP 4)
  1301. The
  1302. .I return
  1303. statement.
  1304. Only used when register variables are in use.
  1305. This statement causes a call to the machine dependent
  1306. C-routine
  1307. .I regreturn .
  1308. Explanation of this must wait for the description of the
  1309. file mach.c below.
  1310. .IP 5)
  1311. The
  1312. .I labeldef
  1313. statement. Its only argument should be that of the
  1314. .I lab
  1315. pseudo-instruction. This is needed to generate local labels when the
  1316. top element size information is used. It takes the form
  1317. .DS
  1318. labeldef $i
  1319. .DE
  1320. .IP 6)
  1321. A temporary label of the form <digit>: may be placed here.
  1322. Expressions of the form [0-9][bf] in this code rule
  1323. generate the same string as is used for this label.
  1324. The code generator system could probably easily be changed
  1325. to make this work for assemblers that do not support this
  1326. type of label by generating unique labels itself.
  1327. Implementation of this is not contemplated at the moment.
  1328. .NH 3
  1329. Stack replacement
  1330. .PP
  1331. The optional stack replacement is a possibly empty list
  1332. of tokens to be pushed onto the fake stack.
  1333. It start with the word
  1334. .I yields ,
  1335. and is followed by a list of token descriptions.
  1336. .PP
  1337. All tokens matched by the stack pattern at the beginning of the code rule
  1338. are first removed and their registers deallocated.
  1339. Items are pushed in the order of appearance.
  1340. This means that the last item will be on the top of the
  1341. stack after the push.
  1342. So if the stack pattern contained two sets
  1343. and they must be pushed back unchanged,
  1344. they have to be specified as stack replacement
  1345. .DS
  1346. yields %2 %1
  1347. .DE
  1348. and not the other way around.
  1349. This is known to cause errors in tables so watch out for
  1350. this!
  1351. .NH 3
  1352. EM replacement
  1353. .PP
  1354. In exceptional cases it might be useful to leave part of an EM-pattern
  1355. undone.
  1356. For example, a \fBsdl\fP instruction might
  1357. be split into two \fBstl\fP instructions
  1358. when there is no 4-byte quantity on the stack.
  1359. The EM replacement part allows
  1360. one to express this.
  1361. It is activated by the word
  1362. .I leaving .
  1363. .LP
  1364. Example:
  1365. .DS
  1366. leaving \fBstl\fP $1 \fBstl\fP $1+2
  1367. .DE
  1368. The instructions are inserted in the stream so that they can match
  1369. the first part of a pattern in the next step.
  1370. Note that since the code generator traverses the EM instructions in a strict
  1371. linear fashion,
  1372. it is impossible to let the EM replacement match later parts of a pattern.
  1373. So if there is a pattern
  1374. .DS
  1375. \fBloc\fP \fBstl\fP $1==0
  1376. .DE
  1377. and the input is
  1378. .DS
  1379. \fBloc\fP 0 \fBsdl\fP 4
  1380. .DE
  1381. the \fBloc\fP\ 0 will be processed first,
  1382. then the \fBsdl\fP might be split into two \fBstl\fP's but the pattern
  1383. cannot match now.
  1384. .NH 3
  1385. Examples
  1386. .PP
  1387. A list of examples for the PDP-11 is given here.
  1388. Far from being complete it gives examples of most kinds
  1389. of instructions.
  1390. .DS
  1391. .ta 7.5c
  1392. pat loc yields {const2, $1}
  1393. pat ldc yields {const2, loww($1)} {const2, highw($1)}
  1394. .DE
  1395. These simple patterns just push one or more tokens onto the fake stack.
  1396. .DS
  1397. .ta 7.5c
  1398. pat lof
  1399. with REG yields {regind2,%1,$1}
  1400. with exact regconst2 yields {regind2,%1.reg,$1+%1.off}
  1401. with exact addr_external yields {relative2,$1+%1.off}
  1402. with exact addr_local yields {LOCAL, %1.ind + $1,2}
  1403. .DE
  1404. This pattern shows the possibility to do different things
  1405. depending on the fake stack contents,
  1406. there are some rules for some specific cases plus a general rule,
  1407. not preceded by
  1408. .I exact
  1409. that can always be taken after a coercion,
  1410. if necessary.
  1411. .DS
  1412. .ta 7.5c
  1413. pat lxl $1>3
  1414. uses REG={LOCAL, SL, 2}, REG={const2,$1-1}
  1415. gen 1:
  1416. move {regind2,%a, SL},%a
  1417. sob %b,{label,1b} yields %a
  1418. .DE
  1419. This rule shows register allocation with initialisation,
  1420. and the use of a temporary label.
  1421. The constant SL used here is defined to be the offset from lb
  1422. of the static link,
  1423. that is pushed by the Pascal compiler as the last argument of
  1424. a function.
  1425. .DS
  1426. .ta 7.5c
  1427. pat stf
  1428. with regconst2 xsrc2
  1429. kills allexeptcon
  1430. gen move %2,{regind2,%1.reg,$1+%1.off}
  1431. with addr_external xsrc2
  1432. kills allexeptcon
  1433. gen move %2,{relative2,$1+%1.off}
  1434. .DE
  1435. This rule shows the use of a
  1436. .I kills
  1437. part in a store instruction.
  1438. The set allexeptcon contains all tokens that can be the destination
  1439. of an indirect store.
  1440. .DS
  1441. .ta 7.5c
  1442. pat sde
  1443. with exact FLTREG
  1444. kills posextern
  1445. gen move %1,{relative4,$1}
  1446. with exact ftolong
  1447. kills posextern
  1448. gen setl.
  1449. movfi %1.reg,{relative4,$1}
  1450. seti.
  1451. with src2 src2
  1452. kills posextern
  1453. gen move %1, {relative2, $1 }
  1454. move %2, {relative2, $1+2}
  1455. .DE
  1456. The rule for
  1457. .B sde
  1458. shows the use of the
  1459. .I exact
  1460. clause in both qualities,
  1461. the first is for correctness,
  1462. the second for efficiency.
  1463. The third rule is taken by default,
  1464. resulting in two separate stores,
  1465. nothing better exists on the PDP-11.
  1466. .DS
  1467. .ta 7.5c
  1468. pat sbi $1==2
  1469. with src2 REG
  1470. gen sub %1,%2 yields %2
  1471. with exact REG src2-REG
  1472. gen sub %2,%1
  1473. neg %1 yields %1
  1474. .DE
  1475. This rule for
  1476. .I sbi
  1477. has a normal first part,
  1478. and a hand optimized special case as its second part.
  1479. .DS
  1480. .ta 7.5c
  1481. pat mli $1==2
  1482. with ODDREG src2
  1483. gen mul %2,%1 yields %1
  1484. with src2 ODDREG
  1485. gen mul %1,%2 yields %2
  1486. .DE
  1487. This shows the general property for rules with commutative
  1488. operators,
  1489. heuristics or look ahead will have to decide which rule is the best.
  1490. .DS
  1491. .ta 7.5c
  1492. pat loc sli $1==1 && $2==2
  1493. with REG
  1494. gen asl %1 yields %1
  1495. .DE
  1496. A simple rule involving a longer EM-pattern,
  1497. to make use of a specialized instruction available.
  1498. .DS
  1499. .ta 7.5c
  1500. pat loc loc cii $1==1 && $2==2
  1501. with src1or2
  1502. uses reusing %1,REG
  1503. gen movb %1,%a yields %a
  1504. .DE
  1505. A somewhat more complicated example of the same.
  1506. Note the
  1507. .I reusing
  1508. clause.
  1509. .DS
  1510. .ta 7.5c
  1511. pat loc loc loc cii $1>=0 && $2==2 && $3==4
  1512. leaving loc $1 loc 0
  1513. .DE
  1514. Shows a trivial example of EM-replacement.
  1515. This is a rule that could be done by the
  1516. peephole optimizer,
  1517. if word order in longs was defined in EM.
  1518. On a `big-endian' machine the two replacement
  1519. instructions would be the other way around.
  1520. .DS
  1521. .ta 7.5c
  1522. pat and $1==2
  1523. with const2 REG
  1524. gen bic {const2,~%1.num},%2 yields %2
  1525. with REG const2
  1526. gen bic {const2,~%2.num},%1 yields %1
  1527. with REG REG
  1528. gen com %1
  1529. bic %1,%2 yields %2
  1530. .DE
  1531. Shows the way to handle the absence
  1532. of an
  1533. .I and -instruction.
  1534. .DS
  1535. .ta 7.5c
  1536. pat set $1==2
  1537. with REG
  1538. uses REG={const2,1}
  1539. gen ash %1,%a yields %a
  1540. .DE
  1541. Shows the building of a word-size set.
  1542. .DS
  1543. .ta 7.5c
  1544. pat lae aar $2==2 && rom($1,3)==1 && rom($1,1)==0
  1545. leaving adi 2
  1546. pat lae aar $2==2 && rom($1,3)==1 && rom($1,1)!=0
  1547. leaving adi 2 adp 0-rom($1,1)
  1548. .DE
  1549. Two rules showing the use of the rom pseudo function,
  1550. and some array optimalisation.
  1551. .DS
  1552. .ta 7.5c
  1553. pat bra
  1554. with STACK
  1555. gen jbr {label, $1}
  1556. .DE
  1557. A simple jump.
  1558. The stack pattern guarantees that everything will be stacked
  1559. before the jump is taken.
  1560. .DS
  1561. pat lab topeltsize($1)==2 && !fallthrough($1)
  1562. gen labeldef $1 yields r0
  1563. pat lab topeltsize($1)==2 && fallthrough($1)
  1564. with src2
  1565. gen move %1,r0
  1566. labeldef $1 yields r0
  1567. pat lab topeltsize($1)!=2
  1568. with STACK
  1569. kills all
  1570. gen labeldef $1
  1571. pat bra topeltsize($1)==2
  1572. with src2 STACK
  1573. gen move %1,d0
  1574. jbr {label, $1}
  1575. pat bra topeltsize($1)!=2
  1576. with STACK
  1577. gen jbr {label, $1}
  1578. .DE
  1579. The combination of these patterns make sure that the top of the EM-stack will
  1580. be in register r0 whenever necessary. The top element size mechanism will
  1581. also show a size of 0 whenever a conditional branch to a label
  1582. occurs. This saves a lot of patterns and hardly decreases performance.
  1583. When the same register is used to return function results, this can save
  1584. many moves to and from the stack.
  1585. .DS
  1586. .ta 7.5c
  1587. pat cal
  1588. with STACK
  1589. gen jsr pc,{label, $1}
  1590. .DE
  1591. A simple call.
  1592. Same comments as previous rule.
  1593. .DS
  1594. .ta 7.5c
  1595. pat lfr $1==2 yields r0
  1596. pat lfr $1==4 yields r1 r0
  1597. .DE
  1598. Shows the return area conventions of the PDP-11 table.
  1599. At this point a reminder:
  1600. the
  1601. .B asp
  1602. instruction, and some other instructions must leave
  1603. the function return area intact.
  1604. See the defining document for EM for exact information.
  1605. .DS
  1606. .ta 7.5c
  1607. pat ret $1==0
  1608. with STACK
  1609. gen mov lb,sp
  1610. rts pc
  1611. .DE
  1612. This shows a rule for
  1613. .B ret
  1614. in a table not using register variables.
  1615. In a table with register variables the
  1616. .I gen
  1617. part would just contain
  1618. .I return .
  1619. .DS
  1620. .ta 7.5c
  1621. pat blm
  1622. with REG REG
  1623. uses REG={const2,$1/2}
  1624. gen 1:
  1625. mov {autoinc,%2},{autoinc,%1}
  1626. sob %a,{label,1b}
  1627. .DE
  1628. This rule for
  1629. .B blm
  1630. already uses three registers of the same type.
  1631. .I Cgg
  1632. contains code to check all rules
  1633. to see if they can be applied from an empty fakestack.
  1634. It uses the marriage thesis from Hall,
  1635. a thesis from combinatorial mathematics,
  1636. to accomplish this.
  1637. .DS
  1638. .ta 7.5c
  1639. pat exg $1==2
  1640. with src2 src2 yields %1 %2
  1641. .DE
  1642. This rule shows the exchanging of two elements on the fake stack.
  1643. .NH 2
  1644. Code rules using procedures
  1645. .PP
  1646. To start this section it must be admitted at once that the
  1647. word procedure is chosen here mainly for its advertising
  1648. value.
  1649. It more resembles a glorified goto but this of course can
  1650. not be admitted in the glossy brochures.
  1651. This document will continue to use the word
  1652. procedure.
  1653. .PP
  1654. The need for procedures was felt after the first version of
  1655. the code generator system was made,
  1656. mainly because of conditional instructions.
  1657. Often the code sequences for
  1658. .B tlt ,
  1659. .B tle ,
  1660. .B teq ,
  1661. .B tne ,
  1662. .B tge
  1663. and
  1664. .B tgt
  1665. were identical apart from one opcode in the code rule.
  1666. The code sequence had to be written out six times however.
  1667. Not only did this increase the table size and bore the
  1668. table writer, it also led to errors when changing the table
  1669. since it happened now and then that five out of six
  1670. rules were changed.
  1671. .PP
  1672. In general the procedures in this table format are used to
  1673. keep one copy instead of six of the code rules for all
  1674. sorts of conditionals and one out of two for things like
  1675. increment/decrement.
  1676. .PP
  1677. And now the syntax, first the procedure definition,
  1678. which must indeed be defined before the call because
  1679. .I cgg
  1680. is one-pass.
  1681. The procedure heading replaces the EM-pattern in a code rule
  1682. and looks like this:
  1683. .DS
  1684. proc <identifier> <optional example>
  1685. .DE
  1686. The identifier is used in later calls and the example must
  1687. be used if expressions like $1 are used in the code rule.
  1688. .DS
  1689. <optional example> : example <list of EM-instructions>
  1690. .DE
  1691. so an example looks just like an EM-pattern, but without
  1692. the optional boolean expression.
  1693. The example is needed to know the types of $1 expressions.
  1694. The current version of
  1695. .I cgg
  1696. does not check correctness of the example, so be careful.
  1697. .PP
  1698. A procedure is called with string-parameters,
  1699. that are assembler opcodes.
  1700. They can be accessed by appending the string `[<number>]'
  1701. to a table opcode, where <number> is the parameter number.
  1702. The string `*' can be used as an equivalent for `[1]'.
  1703. Just in case this is not clear, here is an example for
  1704. a procedure to increment/decrement a register.
  1705. .DS
  1706. .ta 7.5c
  1707. incop REG:rw:cc . /* in the INSTRUCTIONS part of course */
  1708. proc incdec
  1709. with REG
  1710. gen incop* %1 yields %1
  1711. .DE
  1712. The procedure is called with parameter "inc" or "dec".
  1713. .PP
  1714. The procedure call is given instead of the code-part of the
  1715. code rule and looks like this
  1716. .DS
  1717. call <identifier> '(' <comma-separated list of strings> ')'
  1718. .DE
  1719. which leads to the following large example:
  1720. .DS
  1721. .ta 7.5c
  1722. proc bxx example beq
  1723. with src2 src2 STACK
  1724. gen cmp %2,%1
  1725. jxx* {label, $1}
  1726. pat blt call bxx("jlt")
  1727. pat ble call bxx("jle")
  1728. pat beq call bxx("jeq")
  1729. pat bne call bxx("jne")
  1730. pat bgt call bxx("jgt")
  1731. pat bge call bxx("jge")
  1732. .DE
  1733. .NH 2
  1734. Move definitions
  1735. .PP
  1736. We now jump back to near the beginning of the table
  1737. where the move definitions are found.
  1738. The move definitions directly follow the instruction
  1739. definitions.
  1740. .PP
  1741. In certain cases a move is called for,
  1742. either explicitly when a
  1743. .I move
  1744. instruction is used in a code rule,
  1745. or implicitly in a register initialization.
  1746. The different code rules possible to move data from one
  1747. spot to another are described here.
  1748. Example for the PDP-11:
  1749. .DS
  1750. .ta 8 16 24 32 40 48 56 64
  1751. MOVES
  1752. from const2 %num==0 to dst2
  1753. gen clr %2
  1754. from src2 to dst2
  1755. gen mov %1,%2
  1756. from FLTREG to longf4-FLTREG
  1757. gen movfo %1,%2
  1758. from longf4-FLTREG to FLTREG
  1759. gen movof %1,%2
  1760. .DE
  1761. The example shows that the syntax is just
  1762. .DS
  1763. from <source> to <destination> gen <list of instructions>
  1764. .DE
  1765. Source and destination are a token set, optionally followed by
  1766. a boolean expression.
  1767. The code generator will take the first move that matches,
  1768. whenever a move is necessary.
  1769. .I Cgg
  1770. checks whether all moves called for in the table are present.
  1771. .NH 2
  1772. Test definitions
  1773. .PP
  1774. This part describes the instructions necessary to set the condition codes
  1775. to a certain token.
  1776. These rules are needed when the
  1777. .I test
  1778. instruction is used in code rules.
  1779. Example for the PDP-11:
  1780. .DS
  1781. .ta 8 16 24 32 40 48 56 64
  1782. TESTS
  1783. to test src2
  1784. gen tst %1
  1785. .DE
  1786. So syntax is just
  1787. .DS
  1788. to test <source> gen <instruction list>
  1789. .DE
  1790. Source is the same thing as in the move definition.
  1791. .I Cgg
  1792. checks whether all tests called for in the table are present.
  1793. .NH 2
  1794. Some explanation about the rules behind coercions
  1795. .PP
  1796. A central part in code generation is taken by the
  1797. .I coercions .
  1798. It is the responsibility of the table writer to provide
  1799. all necessary coercions so that code generation can continue.
  1800. The minimal set of coercions are
  1801. the coercions to unstack every token expression,
  1802. in combination with the rules to stack every token.
  1803. It should not be possible to smuggle a table through
  1804. .I cgg
  1805. without these basic set available.
  1806. .PP
  1807. If these are present the code generator can always make the necessary
  1808. transformations by stacking and unstacking.
  1809. Of course for code quality it is usually best to provide extra coercions
  1810. to prevent this stacking to take place.
  1811. .I Cg
  1812. discriminates three types of coercions:
  1813. .IP 1)
  1814. Unstacking coercions.
  1815. This category can use the
  1816. .I uses
  1817. clause in its code.
  1818. .IP 2)
  1819. Splitting coercions, these are the coercions that split
  1820. larger tokens into smaller ones.
  1821. .IP 3)
  1822. Transforming coercions, these are the coercions that transform
  1823. a token into another of the same size.
  1824. This category can use the
  1825. .I uses
  1826. clause in its code.
  1827. .PP
  1828. When a stack configuration does not match the stack pattern
  1829. .I coercions
  1830. are searched for in the following order:
  1831. .IP 1)
  1832. First tokens are split if necessary to get their sizes right.
  1833. .IP 2)
  1834. Then transforming coercions are found that will make the pattern match.
  1835. .IP 3)
  1836. Finally if the stack pattern is longer than the fake stack contents
  1837. unstacking coercions will be used to fill up the pattern.
  1838. .PP
  1839. At any point, when coercions are missing so code generation could not
  1840. continue, the offending tokens are stacked.
  1841. .NH 2
  1842. Stack definitions
  1843. .PP
  1844. The next part of the table defines the stacking rules for the machine.
  1845. Each token that may reside on the fake stack must have a rule attached
  1846. to put it on the real stack.
  1847. Example for the PDP-11:
  1848. .DS
  1849. .ta 8 16 24 32 40 48 56 64
  1850. STACKINGRULES
  1851. from const2 %num==0 to STACK
  1852. gen clr {autodec,sp}
  1853. from src2 to STACK
  1854. gen mov %1,{autodec,sp}
  1855. from regconst2 to STACK
  1856. gen mov %1.reg,{autodec,sp}
  1857. add {addr_external, %1.off},{regdef2,sp}
  1858. from DBLREG to STACK
  1859. gen movf %1,{autodec,sp}
  1860. from FLTREG to STACK
  1861. gen movfo %1,{autodec,sp}
  1862. from regind8 to STACK
  1863. uses REG
  1864. gen move %1.reg,%a
  1865. add {addr_external, 8+%1.off},%a
  1866. mov {autodec, %a},{autodec,sp}
  1867. mov {autodec, %a},{autodec,sp}
  1868. mov {autodec, %a},{autodec,sp}
  1869. mov {autodec, %a},{autodec,sp}
  1870. .DE
  1871. .PP
  1872. These examples should be self-explanatory, except maybe for the last one.
  1873. It is possible inside a stacking-rule to use a register.
  1874. Since however the stacking might also take place at a moment
  1875. when no registers are free, it is mandatory that for each token
  1876. there is one stackingrule that does not use a register.
  1877. The code generator uses the first rule possible.
  1878. .NH 2
  1879. Coercions
  1880. .PP
  1881. The next part of the table defines the coercions that are possible
  1882. on the defined tokens.
  1883. Example for the PDP-11:
  1884. .DS
  1885. .ta 7.5c
  1886. COERCIONS
  1887. from STACK
  1888. uses REG
  1889. gen mov {autoinc,sp},%a yields %a
  1890. from STACK
  1891. uses DBLREG
  1892. gen movf {autoinc,sp},%a yields %a
  1893. from STACK
  1894. uses REGPAIR
  1895. gen mov {autoinc,sp},%a.1
  1896. mov {autoinc,sp},%a.2 yields %a
  1897. .DE
  1898. These three coercions just deliver a certain type
  1899. of register by popping it from the real stack.
  1900. .DS
  1901. .ta 7.5c
  1902. from LOCAL yields {regind2,lb,%1.ind}
  1903. from DLOCAL yields {regind4,lb,%1.ind}
  1904. from REG yields {regconst2, %1, 0}
  1905. .DE
  1906. These three are zero-cost rewriting rules.
  1907. .DS
  1908. .ta 7.5c
  1909. from regconst2 %1.off==1
  1910. uses reusing %1,REG=%1.reg
  1911. gen inc %a yields %a
  1912. from regconst2
  1913. uses reusing %1,REG=%1.reg
  1914. gen add {addr_external, %1.off},%a yields %a
  1915. from addr_local
  1916. uses REG
  1917. gen mov lb,%a
  1918. add {const2, %1.ind},%a yields %a
  1919. .DE
  1920. The last three are three different cases of the coercion
  1921. register+constant to register.
  1922. Only in the last case is it always necessary to allocate
  1923. an extra register,
  1924. since arithmetic on the localbase is unthinkable.
  1925. .DS
  1926. .ta 7.5c
  1927. from xsrc2
  1928. uses reusing %1, REG=%1 yields %a
  1929. from longf4
  1930. uses FLTREG=%1 yields %a
  1931. from double8
  1932. uses DBLREG=%1 yields %a
  1933. from src1
  1934. uses REG={const2,0}
  1935. gen bisb %1,%a yields %a
  1936. .DE
  1937. These examples show the coercion of different
  1938. tokens to a register of the needed type.
  1939. The last one shows the trouble needed on a PDP-11 to
  1940. ensure bytes are not sign-extended.
  1941. In EM it is defined that the result of a \fBloi\fP\ 1
  1942. instruction is an integer in the range 0..255.
  1943. .DS
  1944. .ta 7.5c
  1945. from REGPAIR yields %1.2 %1.1
  1946. from regind4 yields {regind2,%1.reg,2+%1.off}
  1947. {regind2,%1.reg,%1.off}
  1948. from relative4 yields {relative2,2+%1.off}
  1949. {relative2,%1.off}
  1950. .DE
  1951. The last examples are splitting rules.
  1952. .PP
  1953. The examples show that
  1954. all coercions change one token on the fake stack into one or more others,
  1955. possibly generating code.
  1956. The STACK token is supposed to be on the fake stack when it is
  1957. really empty, and can only be changed into one other token.
  1958. .NH 1
  1959. The files mach.h and mach.c
  1960. .PP
  1961. The table writer must also supply two files containing
  1962. machine dependent declarations and C code.
  1963. These files are mach.h and mach.c.
  1964. .NH 2
  1965. Types in the code generator
  1966. .PP
  1967. Three different types of integer coexist in the code generator
  1968. and their range depends on the machine at hand.
  1969. They are defined depending on the Target EM_WSIZE, or TEM_WSIZE,
  1970. and TEM_PSIZE.
  1971. The type 'int' is used for things like counters that won't require
  1972. more than 16 bits precision.
  1973. The type 'word' is used among others to assemble datawords and
  1974. is of type 'long'.
  1975. The type 'full' is used for addresses and is of type 'long' if
  1976. TEM_WSIZE>2 or TEM_PSIZE>2.
  1977. .PP
  1978. In macro and function definitions in later paragraphs implicit typing
  1979. will be used for parameters, that is parameters starting with an 's'
  1980. will be of type string, and the letters 'i','w','f' will stand for
  1981. int, word and full respectively.
  1982. .NH 2
  1983. Global variables to work with
  1984. .PP
  1985. Some global variables are present in the code generator
  1986. that can be manipulated by the routines in mach.h and mach.c.
  1987. .LP
  1988. The declarations are:
  1989. .DS L
  1990. .ta 20
  1991. FILE *codefile; /* code is emitted on this stream */
  1992. word part_word; /* words to be output are put together here */
  1993. int part_size; /* number of bytes already put in part_word */
  1994. char str[]; /* Last string read in */
  1995. long argval; /* Last int read and kept */
  1996. .DE
  1997. .NH 2
  1998. Macros in mach.h
  1999. .PP
  2000. In the file mach.h a collection of macros is defined that have
  2001. to do with formatting of assembly code for the machine at hand.
  2002. Some of these macros can of course be left undefined in which case the
  2003. macro calls are left in the source and will be treated as
  2004. function calls.
  2005. These functions can then be defined in \fImach.c\fR.
  2006. .PP
  2007. The macros to be defined are:
  2008. .IP ex_ap(s) 16
  2009. Must print the magic incantations that will mark the symbol \fI\fR
  2010. to be exported to other modules.
  2011. This is the translation of the EM \fBexa\fP and \fBexp\fP instructions.
  2012. .IP in_ap(s)
  2013. Same to import the symbol.
  2014. Translation of \fBina\fP and \fBinp\fP.
  2015. .IP newplb(s)
  2016. Must print the definition of procedure label \fIs\fR.
  2017. If left undefined the newilb() macro is used instead.
  2018. .IP newilb(s)
  2019. Must print the definition of instruction label \fIs\fR.
  2020. .IP newdlb(s)
  2021. Must print the definition of data label \fIs\fR.
  2022. .IP dlbdlb(s1,s2)
  2023. Must define data label
  2024. .I s1
  2025. to be equal to
  2026. .I s2 .
  2027. .IP newlbss(s,f)
  2028. Must declare a piece of memory initialized to BSS_INIT(see below)
  2029. of length
  2030. .I f
  2031. and with label
  2032. .I s .
  2033. .IP cst_fmt
  2034. Format to be used when converting constant arguments of
  2035. EM instructions to string.
  2036. Argument to be formatted will be 'full'.
  2037. .IP off_fmt
  2038. Format to be used for integer part of label+constant,
  2039. argument will be 'full'.
  2040. .IP fmt_ilb(ip,il,s)
  2041. Must use the numbers
  2042. .I ip
  2043. and
  2044. .I il
  2045. that are a procedure number
  2046. and a label number respectively and copy a string to
  2047. .I s
  2048. that must be unique for that combination.
  2049. This procedure is optional, if it is not given ilb_fmt
  2050. must be defined as below.
  2051. .IP ilb_fmt
  2052. Format to be used for creation of unique instruction labels.
  2053. Arguments will be a unique procedure number (int) and the label
  2054. number (int).
  2055. .IP dlb_fmt
  2056. Format to be used for printing numeric data labels.
  2057. Argument will be 'int'.
  2058. .IP hol_fmt
  2059. Format to be used for generation of labels for
  2060. space generated by a
  2061. .B hol
  2062. pseudo.
  2063. Argument will be 'int'.
  2064. .IP hol_off
  2065. Format to be used for printing of the address of an element in
  2066. .B hol
  2067. space.
  2068. Arguments will be the offset in the
  2069. .B hol
  2070. block (word) and the number of the
  2071. .B hol
  2072. (int).
  2073. .IP con_cst(w)
  2074. Must generate output that will assemble into one machine word.
  2075. .IP con_ilb(s)
  2076. Must generate output that will put the address of the instruction label
  2077. into the datastream.
  2078. .IP con_dlb(s)
  2079. Must generate output that will put the address of the data label
  2080. into the datastream.
  2081. .IP fmt_id(sf,st)
  2082. Must take the string in
  2083. .I sf
  2084. that is a nonnumeric global label, and transform it into a copy made to
  2085. .I st
  2086. that will not collide with reserved assembler words and system labels.
  2087. This procedure is optional, if it is not given the id_first macro is used
  2088. as defined below.
  2089. .IP id_first
  2090. Must be a character.
  2091. This is prepended to all nonnumeric global labels if their length
  2092. is shorter than the maximum allowed(currently 8) or if they already
  2093. start with that character.
  2094. This is to avoid conflicts of user labels with system labels.
  2095. .IP BSS_INIT
  2096. Must be a constant.
  2097. This is the value filled in all the words not initialized explicitly.
  2098. This is loader and system dependent.
  2099. If omitted no initialization is assumed.
  2100. .NH 3
  2101. Example mach.h for the PDP-11
  2102. .DS L
  2103. .ta 4c
  2104. #define ex_ap(y) fprintf(codefile,"\et.globl %s\en",y)
  2105. #define in_ap(y) /* nothing */
  2106. #define newplb(x) fprintf(codefile,"%s:\en",x)
  2107. #define newilb(x) fprintf(codefile,"%s:\en",x)
  2108. #define newdlb(x) fprintf(codefile,"%s:\en",x)
  2109. #define dlbdlb(x,y) fprintf(codefile,"%s=%s\en",x,y)
  2110. #define newlbss(l,x) fprintf(codefile,"%s:.=.+%d.\en",l,x);
  2111. #define cst_fmt "$%d."
  2112. #define off_fmt "%d."
  2113. #define ilb_fmt "I%x_%x"
  2114. #define dlb_fmt "_%d"
  2115. #define hol_fmt "hol%d"
  2116. #define hol_off "%ld.+hol%d"
  2117. #define con_cst(x) fprintf(codefile,"%ld.\en",x)
  2118. #define con_ilb(x) fprintf(codefile,"%s\en",x)
  2119. #define con_dlb(x) fprintf(codefile,"%s\en",x)
  2120. #define id_first '_'
  2121. #define BSS_INIT 0
  2122. .DE
  2123. .NH 2
  2124. Functions in mach.c
  2125. .PP
  2126. In mach.c some functions must be supplied,
  2127. mostly manipulating data resulting from pseudoinstructions.
  2128. The specifications are given here,
  2129. implicit typing of parameters as above.
  2130. .IP -
  2131. con_part(isz,word)
  2132. .br
  2133. This function must manipulate the globals
  2134. part_word and part_size to append the isz bytes
  2135. contained in word to the output stream.
  2136. If part_word is full, i.e. part_size==TEM_WSIZE
  2137. the function part_flush() may be called to empty the buffer.
  2138. This is the function that must go through the trouble of
  2139. doing byte order in words correct.
  2140. .IP -
  2141. con_mult(w_size)
  2142. .br
  2143. This function must take the string str[] and create an integer
  2144. from the string of size w_size and generate code to assemble global
  2145. data for that integer.
  2146. Only the sizes for which arithmetic is implemented need be
  2147. handled,
  2148. so if 200-byte integer division is not implemented,
  2149. 200-byte integer global data don't have to be implemented.
  2150. Here one must take care of word order in long integers.
  2151. .IP -
  2152. con_float()
  2153. .br
  2154. This function must generate code to assemble a floating
  2155. point number of which the size is contained in argval
  2156. and the ASCII representation in str[].
  2157. .IP -
  2158. prolog(f_nlocals)
  2159. .br
  2160. This function is called at the start of every procedure.
  2161. Function prolog code must be generated,
  2162. and room made for local variables for a total of f_nlocals bytes.
  2163. .IP -
  2164. mes(w_mesno)
  2165. .br
  2166. This function is called when a
  2167. .B mes
  2168. pseudo is seen that is not handled by the machine independent part.
  2169. The example below shows all one probably have to know about that.
  2170. .IP -
  2171. segname[]
  2172. .br
  2173. This is not a function,
  2174. but an array of four strings.
  2175. These strings are put out whenever the code generator
  2176. switches segments.
  2177. Segments are SEGTXT, SEGCON, SEGROM and SEGBSS in that order.
  2178. .PP
  2179. If register variables are used in a table, the program
  2180. .I cgg
  2181. will define the word REGVARS during compilation of the sources.
  2182. So the following functions described here should be bracketed
  2183. by #ifdef REGVARS and #endif.
  2184. .IP -
  2185. regscore(off,size,typ,freq,totyp) long off;
  2186. .br
  2187. This function should assign a score to a register variable,
  2188. the score should preferably be the estimated number of bytes
  2189. gained when it is put in a register.
  2190. Off and size are the offset and size of the variable,
  2191. typ is the type, that is reg_any, reg_pointer, reg_loop or reg_float.
  2192. Freq is the count of static occurrences, and totyp
  2193. is the type of the register it is planned to go into.
  2194. .br
  2195. Keep in mind that the gain should be net, that is the cost for
  2196. register save/restore sequences and the cost of initialisation
  2197. in the case of parameters should already be included.
  2198. .IP -
  2199. i_regsave()
  2200. .br
  2201. This function is called at the start of a procedure, just before
  2202. register saves are done.
  2203. It can be used to initialise some variables if needed.
  2204. .IP -
  2205. f_regsave()
  2206. .br
  2207. This function is called at end of the register save sequence.
  2208. It can be used to do the real saving if multiple register move
  2209. instructions are available.
  2210. .IP -
  2211. regsave(regstr,off,size) char *regstr; long off;
  2212. .br
  2213. Should either do the real saving or set up a table to have
  2214. it done by f_regsave.
  2215. Note that initialisation of parameters should also be done,
  2216. or planned here.
  2217. .IP -
  2218. regreturn()
  2219. .br
  2220. Should restore saved registers and return.
  2221. The function result is already in the function return area by now.
  2222. .NH 3
  2223. Example mach.c for the PDP-11
  2224. .PP
  2225. As an example of the sort of code expected,
  2226. the mach.c for the PDP-11 is presented here.
  2227. .DS L
  2228. .ta 0.5i 1i 1.5i 2i 2.5i 3i 3.5i 4i 4.5i
  2229. /*
  2230. * machine dependent back end routines for the PDP-11
  2231. */
  2232. con_part(sz,w) register sz; word w; {
  2233. while (part_size % sz)
  2234. part_size++;
  2235. if (part_size == 2)
  2236. part_flush();
  2237. if (sz == 1) {
  2238. w &= 0xFF;
  2239. if (part_size)
  2240. w <<= 8;
  2241. part_word |= w;
  2242. } else {
  2243. assert(sz == 2);
  2244. part_word = w;
  2245. }
  2246. part_size += sz;
  2247. }
  2248. con_mult(sz) word sz; {
  2249. long l;
  2250. if (sz != 4)
  2251. fatal("bad icon/ucon size");
  2252. l = atol(str);
  2253. fprintf(codefile,"\et%o;%o\en",(int)(l>>16),(int)l);
  2254. }
  2255. con_float() {
  2256. double f;
  2257. register short *p,i;
  2258. /*
  2259. * This code is correct only when the code generator is
  2260. * run on a PDP-11 or VAX-11 since it assumes native
  2261. * floating point format is PDP-11 format.
  2262. */
  2263. if (argval != 4 && argval != 8)
  2264. fatal("bad fcon size");
  2265. f = atof(str);
  2266. p = (short *) &f;
  2267. i = *p++;
  2268. if (argval == 8) {
  2269. fprintf(codefile,"\et%o;%o;",i,*p++);
  2270. i = *p++;
  2271. }
  2272. fprintf(codefile,"\et%o;%o\en",i,*p++);
  2273. }
  2274. #ifdef REGVARS
  2275. char Rstring[10];
  2276. full lbytes;
  2277. struct regadm {
  2278. char *ra_str;
  2279. long ra_off;
  2280. } regadm[2];
  2281. int n_regvars;
  2282. regscore(off,size,typ,score,totyp) long off; {
  2283. /*
  2284. * This function is full of magic constants.
  2285. * They are a result of experimentation.
  2286. */
  2287. if (size != 2)
  2288. return(-1);
  2289. score -= 1; /* allow for save/restore */
  2290. if (off>=0)
  2291. score -= 2;
  2292. if (typ==reg_pointer)
  2293. score *= 17;
  2294. else if (typ==reg_loop)
  2295. score = 10*score+50; /* Guestimate */
  2296. else
  2297. score *= 10;
  2298. return(score); /* 10 * estimated # of words of profit */
  2299. }
  2300. i_regsave() {
  2301. Rstring[0] = 0;
  2302. n_regvars=0;
  2303. }
  2304. f_regsave() {
  2305. register i;
  2306. if (n_regvars==0 || lbytes==0) {
  2307. fprintf(codefile,"mov r5,-(sp)\enmov sp,r5\en");
  2308. if (lbytes == 2)
  2309. fprintf(codefile,"tst -(sp)\en");
  2310. else if (lbytes!=0)
  2311. fprintf(codefile,"sub $0%o,sp\en",lbytes);
  2312. for (i=0;i<n_regvars;i++)
  2313. fprintf(codefile,"mov %s,-(sp)\en",regadm[i].ra_str);
  2314. } else {
  2315. if (lbytes>6) {
  2316. fprintf(codefile,"mov $0%o,r0\en",lbytes);
  2317. fprintf(codefile,"jsr r5,PR%s\en",Rstring);
  2318. } else {
  2319. fprintf(codefile,"jsr r5,PR%d%s\en",lbytes,Rstring);
  2320. }
  2321. }
  2322. for (i=0;i<n_regvars;i++)
  2323. if (regadm[i].ra_off>=0)
  2324. fprintf(codefile,"mov 0%lo(r5),%s\en",regadm[i].ra_off,
  2325. regadm[i].ra_str);
  2326. }
  2327. regsave(regstr,off,size) char *regstr; long off; {
  2328. fprintf(codefile,"/ Local %ld into %s\en",off,regstr);
  2329. strcat(Rstring,regstr);
  2330. regadm[n_regvars].ra_str = regstr;
  2331. regadm[n_regvars].ra_off = off;
  2332. n_regvars++;
  2333. }
  2334. regreturn() {
  2335. fprintf(codefile,"jmp RT%s\en",Rstring);
  2336. }
  2337. #endif
  2338. prolog(nlocals) full nlocals; {
  2339. #ifndef REGVARS
  2340. fprintf(codefile,"mov r5,-(sp)\enmov sp,r5\en");
  2341. if (nlocals == 0)
  2342. return;
  2343. if (nlocals == 2)
  2344. fprintf(codefile,"tst -(sp)\en");
  2345. else
  2346. fprintf(codefile,"sub $0%o,sp\en",nlocals);
  2347. #else
  2348. lbytes = nlocals;
  2349. #endif
  2350. }
  2351. mes(type) word type; {
  2352. int argt ;
  2353. switch ( (int)type ) {
  2354. case ms_ext :
  2355. for (;;) {
  2356. switch ( argt=getarg(
  2357. ptyp(sp_cend)|ptyp(sp_pnam)|sym_ptyp) ) {
  2358. case sp_cend :
  2359. return ;
  2360. default:
  2361. strarg(argt) ;
  2362. fprintf(codefile,".globl %s\en",argstr) ;
  2363. break ;
  2364. }
  2365. }
  2366. default :
  2367. while ( getarg(any_ptyp) != sp_cend ) ;
  2368. break ;
  2369. }
  2370. }
  2371. char *segname[] = {
  2372. ".text", /* SEGTXT */
  2373. ".data", /* SEGCON */
  2374. ".data", /* SEGROM */
  2375. ".bss" /* SEGBSS */
  2376. };
  2377. .DE
  2378. .NH 1
  2379. Internal workings of the code generator.
  2380. .NH 2
  2381. Description of tables.c and tables.h contents
  2382. .PP
  2383. In this section the intermediate files will be described
  2384. that are produced by
  2385. .I cgg
  2386. and compiled with machine independent code to produce a code generator.
  2387. .NH 3
  2388. Tables.c
  2389. .PP
  2390. Tables.c contains a large number of initialized array's of all sorts.
  2391. Description of each follows:
  2392. .br
  2393. .in 1i
  2394. .ti -0.5i
  2395. byte coderules[]
  2396. .br
  2397. Pseudo code interpreted by the code generator.
  2398. Always starts with some opcode followed by operands depending
  2399. on the opcode.
  2400. Some of the opcodes have an argument encoded in the upper three
  2401. bits of the opcode byte.
  2402. Integers in this table are between 0 and 32767 and have a one byte
  2403. encoding if between 0 and 127.
  2404. .ti -0.5i
  2405. char wrd_fmt[]
  2406. .br
  2407. The format used for output of words.
  2408. .ti -0.5i
  2409. char stregclass[]
  2410. .br
  2411. Number of computed static register class per register.
  2412. Two registers are in the same class if they have the same properties
  2413. and don't share a common subregister.
  2414. .ti -0.5i
  2415. struct reginfo machregs[]
  2416. .br
  2417. Info per register.
  2418. Initialized with representation string, size,
  2419. members of the register and set of registers affected when this
  2420. one is changed.
  2421. Also contains room for run time information,
  2422. like contents and reference count.
  2423. .ti -0.5i
  2424. tkdef_t tokens[]
  2425. .br
  2426. Information per tokentype.
  2427. Initialized with size, cost, type of operands and formatstring.
  2428. .ti -0.5i
  2429. node_t enodes[]
  2430. .br
  2431. List of triples representing expressions for the code generator.
  2432. .ti -0.5i
  2433. string codestrings[]
  2434. .br
  2435. List of strings.
  2436. All strings are put in a list and checked for duplication,
  2437. so only one copy per string will reside here.
  2438. .ti -0.5i
  2439. set_t machsets[]
  2440. .br
  2441. List of token expression sets.
  2442. Bit 0 of the set is used for the SCRATCH property of registers,
  2443. bit 1 upto NREG are for the corresponding registers
  2444. and bit NREG+1 upto the end are for corresponding tokens.
  2445. .ti -0.5i
  2446. inst_t tokeninstances[]
  2447. .br
  2448. List of descriptions for building tokens.
  2449. Contains type of rule for building one,
  2450. plus operands depending on the type.
  2451. .ti -0.5i
  2452. move_t moves[]
  2453. .br
  2454. List of move rules.
  2455. Contains token expressions for source and destination
  2456. plus index for code rule.
  2457. .ti -0.5i
  2458. test_t tests[]
  2459. .br
  2460. List of test rules.
  2461. Contains token expressions for source
  2462. plus index for code rule.
  2463. .ti -0.5i
  2464. byte pattern[]
  2465. .br
  2466. EM patterns.
  2467. This is structured internally as chains of patterns,
  2468. each chain pointed at by pathash[].
  2469. After each pattern the list of possible code rules is given.
  2470. .ti -0.5i
  2471. int pathash[256]
  2472. .br
  2473. Indices into pattern[] for all patterns with a certain low order
  2474. byte of the hashing function.
  2475. .ti -0.5i
  2476. c1_t c1coercs[]
  2477. .br
  2478. List of rules to stack tokens.
  2479. Contains token expressions,
  2480. register needed,
  2481. cost
  2482. and code rule.
  2483. .ti -0.5i
  2484. c2_t c2coercs[]
  2485. .br
  2486. List of splitting coercions.
  2487. Token expressions,
  2488. split factor,
  2489. replacements
  2490. and code rule.
  2491. .ti -0.5i
  2492. c3_t c3coercs[]
  2493. .br
  2494. List of one to one coercions.
  2495. Token expressions,
  2496. register needed,
  2497. replacement
  2498. and code rule.
  2499. .ti -0.5i
  2500. struct reginfo **reglist[]
  2501. .br
  2502. List of lists of pointers to register information.
  2503. For every property the list is here
  2504. to find the registers corresponding to it.
  2505. .in 0
  2506. .NH 3
  2507. tables.h
  2508. .PP
  2509. In tables.h various derived constants for the tables are
  2510. given.
  2511. They are then used to determine array sizes in the actual code generator,
  2512. plus loop termination in some cases.
  2513. .NH 2
  2514. Other important data structures
  2515. .PP
  2516. During code generation some other data structures are used
  2517. and here is a short description of some of the important ones.
  2518. .PP
  2519. Tokens are kept in the code generator as a struct consisting of
  2520. one integer
  2521. .I t_token
  2522. which is -1 if the token is a register,
  2523. and the number of the token otherwise,
  2524. plus an array of
  2525. .I TOKENSIZE
  2526. unions
  2527. .I t_att
  2528. of which the first is the register number in case of a register.
  2529. .PP
  2530. The fakestack is an array of these tokens,
  2531. there is a global variable
  2532. .I stackheight .
  2533. .PP
  2534. The results of expressions are kept in a struct
  2535. .I result
  2536. with elements
  2537. .I e_typ ,
  2538. giving the type of the expression:
  2539. .I EV_INT ,
  2540. .I EV_REG
  2541. or
  2542. .I EV_ADDR ,
  2543. and a union
  2544. .I e_v
  2545. which contains the real result.
  2546. .NH 2
  2547. A tour through the sources
  2548. .NH 3
  2549. codegen.c
  2550. .PP
  2551. The file codegen.c contains one large function consisting
  2552. of one giant switch statement.
  2553. It is the interpreter for the code generator pseudo code
  2554. as contained in code rules[].
  2555. This function can call itself recursively when doing look ahead.
  2556. Arguments are:
  2557. .IP codep 10
  2558. Pointer into code rules, pseudo program counter.
  2559. .IP ply
  2560. Number of EM pattern look ahead allowed.
  2561. .IP toplevel
  2562. Boolean telling whether this is the toplevel codegen() or
  2563. a deeper incarnation.
  2564. .IP costlimit
  2565. A cutoff value to limit searches.
  2566. If the cost crosses costlimit the incarnation can terminate.
  2567. .IP forced
  2568. A register number if nonzero.
  2569. This is used inside coercions to force the allocate() call to allocate
  2570. a register determined by earlier look ahead.
  2571. .PP
  2572. The instructions inplemented in the switch:
  2573. .NH 4
  2574. DO_DLINE
  2575. .PP
  2576. Prints debugging information if the code generator runs in debug mode.
  2577. This information is only generated if
  2578. .I cgg
  2579. was called with the -d flag.
  2580. .NH 4
  2581. DO_NEXTEM
  2582. .PP
  2583. Matches the next EM pattern and does look ahead if necessary to find the best
  2584. code rule associated with this pattern.
  2585. Heuristics are used to determine best code rule when possible.
  2586. This is done by calling the distance() function.
  2587. It can also handle the procedure mechanism.
  2588. .NH 4
  2589. DO_COERC
  2590. .PP
  2591. This sets the code generator in the state to do a from stack coercion.
  2592. .NH 4
  2593. DO_XMATCH
  2594. .PP
  2595. This is done when a match no longer has to be checked.
  2596. Used when the nocoercions: trick is used in the table.
  2597. .NH 4
  2598. DO_MATCH
  2599. .PP
  2600. This is the big one inside this function.
  2601. It has the task to transform the contents of the current
  2602. fake stack to match the pattern given after it.
  2603. .PP
  2604. Since the code generator does not know combining coercions,
  2605. i.e. there is no way to make a big token out of two smaller ones,
  2606. the first thing done is to stack every token that is too small.
  2607. After that all tokens too big are split if possible to the right size.
  2608. .PP
  2609. Next the coercions are sought that would transform tokens in place to
  2610. the right one, plus the coercions that would pop tokens of the stack.
  2611. Each of those might need a register, so a list of registers is generated
  2612. and at the end of looking for coercions the function
  2613. .I tuples()
  2614. is called to generate the list of all possible \fIn\fP-tuples,
  2615. where
  2616. .I n
  2617. equals the number of registers needed.
  2618. .PP
  2619. Look ahead is now performed if the number of tuples is greater than one.
  2620. If no possibility is found within the costlimit,
  2621. the fake stack is made smaller by pushing the bottom token,
  2622. and this process is repeated until either a way is found or
  2623. the fake stack is completely empty and there is still no way
  2624. to make the match.
  2625. .PP
  2626. If there is a way the corresponding coercions are executed
  2627. and the code is finished.
  2628. .NH 4
  2629. DO_REMOVE
  2630. .PP
  2631. Here the kills clause is executed, all tokens matched by the
  2632. token expression plus boolean expression are pushed.
  2633. In the current implementation there is no attempt to move those
  2634. tokens to registers, but that is a possible future extension.
  2635. .NH 4
  2636. DO_DEALLOCATE
  2637. .PP
  2638. This one temporarily decrements by one the reference count of all registers
  2639. contained in the token given as argument.
  2640. .NH 4
  2641. DO_REALLOCATE
  2642. .PP
  2643. Here all temporary deallocates are made undone.
  2644. .NH 4
  2645. DO_ALLOCATE
  2646. .PP
  2647. This is the part that allocates a register and decides which one to use.
  2648. If the
  2649. .I forced
  2650. argument was given its task is simple,
  2651. otherwise some work must be done.
  2652. First the list of possible registers is scanned,
  2653. all free registers noted and it is noted whether any of those
  2654. registers is already
  2655. containing the initialization.
  2656. If no registers are available some fakestack token is stacked and the
  2657. process is repeated.
  2658. .PP
  2659. After that if an exact match was found,
  2660. the list of registers is reduced to one register matching exactly
  2661. out of every register class.
  2662. Now look ahead is performed if necessary and the register chosen.
  2663. If an initialization was given the corresponding move is performed,
  2664. otherwise the register is marked empty.
  2665. .NH 4
  2666. DO_INSTR
  2667. .PP
  2668. This prints an instruction and its operands.
  2669. Only done on toplevel.
  2670. .NH 4
  2671. DO_MOVE
  2672. .PP
  2673. Calls the move() function in the code generator to implement the move
  2674. instruction in the table.
  2675. .NH 4
  2676. DO_TEST
  2677. .PP
  2678. Calls the test() function in the code generator to implement the test
  2679. instruction in the table.
  2680. .NH 4
  2681. DO_ERASE
  2682. .PP
  2683. Marks the register that is its argument as empty.
  2684. .NH 4
  2685. DO_TOKREPLACE
  2686. .PP
  2687. This is the token replacement part.
  2688. It is also called if there is no token replacement because it has
  2689. some other functions as well.
  2690. .PP
  2691. First the tokens that will be pushed on the fake stack are computed
  2692. and stored in a temporary array.
  2693. Then the tokens that were matched in this rule are popped
  2694. and their embedded registers have their reference count
  2695. decremented.
  2696. After that the replacement tokens are pushed.
  2697. .PP
  2698. Finally all registers allocated in this rule have their reference count
  2699. decremented.
  2700. If they were not pushed on the fake stack they will be available again
  2701. in the next code rule.
  2702. .NH 4
  2703. DO_EMREPLACE
  2704. .PP
  2705. Places replacement EM instructions back into the instruction stream.
  2706. .NH 4
  2707. DO_COST
  2708. .PP
  2709. Accounts for cost as given in the code rule.
  2710. .NH 4
  2711. DO_RETURN
  2712. .PP
  2713. Returns from this level of codegen().
  2714. Is used at the end of coercions,
  2715. move rules etc..
  2716. .NH 4
  2717. DO_LABDEF
  2718. .PP
  2719. This prints a label when the top element size mechanism is used. Only done on
  2720. toplevel.
  2721. .NH 3
  2722. compute.c
  2723. .PP
  2724. This module computes the various expressions as given
  2725. in the enodes[] array.
  2726. Nothing very special happens here,
  2727. it is just a recursive function computing leaves
  2728. of expressions and applying the operator.
  2729. .NH 3
  2730. equiv.c
  2731. .PP
  2732. In this module the tuples() function is implemented.
  2733. It is given the number of registers needed and
  2734. a list of register lists and it constructs a list of tuples
  2735. where the \fIn\fP'th register comes from the \fIn\fP'th list.
  2736. Before the list is constructed however
  2737. the dynamic register classes are computed.
  2738. Two registers are in the same dynamic class if they are in the
  2739. same static class and their contents is the same.
  2740. .PP
  2741. After that the permute() recursive function is called to
  2742. generate the list of tuples.
  2743. After construction a generated tuple is added to the list
  2744. if it is not already pairwise in the same class
  2745. or if the register relations are not the same,
  2746. i.e. if the first and second register share a common
  2747. subregister in one tuple and not in the other they are considered different.
  2748. .NH 3
  2749. fillem.c
  2750. .PP
  2751. This is the routine that does the reading of EM instructions
  2752. and the handling of pseudos.
  2753. The mach.c module provided by the table writer is included
  2754. at the end of this module.
  2755. The routine fillemlines() is called by nextem() at toplevel
  2756. to make sure there are enough instruction to match.
  2757. It fills the EM instruction buffer up to 5 places from the end to
  2758. keep room for EM replacement instructions,
  2759. or up to a pseudo.
  2760. .PP
  2761. The dopseudo() function performs the function of the pseudo last
  2762. encountered.
  2763. If the pseudo is a
  2764. .B rom
  2765. the corresponding label is saved with the contents of the
  2766. .B rom
  2767. to be available to the code generator later.
  2768. The rest of the routines are small service routines for either
  2769. input or data output.
  2770. .NH 3
  2771. gencode.c
  2772. .PP
  2773. This module contains routines called by codegen() to generate the real
  2774. code to the codefile.
  2775. The function genstr() gets a string as argument and copies it to codefile.
  2776. The prtoken() function interprets the tokenformat as given in
  2777. the tokens[] array.
  2778. .NH 3
  2779. glosym.c
  2780. .PP
  2781. This module maintains a list of global symbols that have a
  2782. .B rom
  2783. pseudo associated.
  2784. There are functions to enter a symbol and to find a symbol.
  2785. .NH 3
  2786. label.c
  2787. .PP
  2788. This module contains routines to handle the top element size messages.
  2789. .NH 3
  2790. main.c
  2791. .PP
  2792. Main routine of the code generator.
  2793. Processes arguments and flags.
  2794. Flags available are:
  2795. .IP -d
  2796. Sets debug mode if the code generator was not compiled with
  2797. the NDEBUG macro defined.
  2798. The flag can be followed by a digit specifying the amount of debugging
  2799. wanted,
  2800. and by @labelname giving the start of debugging.
  2801. Debug mode gives very long output on stderr indicating
  2802. all steps of the code generation process including nesting
  2803. of the codegen() function.
  2804. .IP -p\fIn\fP
  2805. Sets the look ahead depth to
  2806. .I n ,
  2807. the
  2808. .I p
  2809. stands for ply,
  2810. a well known word in chess playing programs.
  2811. .IP -w\fIn\fP
  2812. Sets the weight percentage for size in the cost function to
  2813. .I n
  2814. percent.
  2815. Uses Euclides algorithm to simplify rationals.
  2816. .NH 3
  2817. move.c
  2818. .PP
  2819. Function to implement the move instruction in the tables,
  2820. register initialization and the test instruction and associated bookkeeping.
  2821. First tests are made to try to prevent the move from really happening.
  2822. After that, if there is an after that,
  2823. the move rule is found and the code executed.
  2824. .NH 3
  2825. nextem.c
  2826. .PP
  2827. The entry point of this module is nextem().
  2828. It hashes the next three EM instructions,
  2829. and uses the low order byte of the hash
  2830. as an index into the array pathash[],
  2831. to find a chain of patterns in the array
  2832. pattern[],
  2833. that are all tried for a match.
  2834. .PP
  2835. The function trypat() does most of the work
  2836. checking patterns.
  2837. When a pattern is found to match all instructions
  2838. the operands of the instruction are placed into the dollar[] array.
  2839. Then the boolean expression is tried.
  2840. If it matches the function can return,
  2841. leaving the operands still in the dollar[] array,
  2842. so later in the code rule they can still be used.
  2843. .NH 3
  2844. reg.c
  2845. .PP
  2846. Collection of routines to handle registers.
  2847. Reference count routines are here,
  2848. chrefcount() and getrefcount(),
  2849. plus routines to erase a single register or all of them,
  2850. erasereg() and cleanregs().
  2851. .PP
  2852. If NDEBUG hasn't been defined, here is also the routine that checks
  2853. if the reference count kept with the register information is in
  2854. agreement with the number of times it occurs on the fake stack.
  2855. .NH 3
  2856. salloc.c
  2857. .PP
  2858. Module for string allocation and garbage collection.
  2859. Contains entry points myalloc(),
  2860. a routine calling malloc() and checking whether room is left,
  2861. myfree(), just free(),
  2862. popstr() a function called from state.c to free all strings
  2863. made since the last saved status.
  2864. Furthermore there is salloc() which has the size of the string as parameter
  2865. and returns a pointer to the allocated space,
  2866. while keeping a copy of the pointer for garbage allocation purposes.
  2867. .PP
  2868. The function garbage_collect is called from codegen() at toplevel
  2869. every now and then,
  2870. and checks all places where strings may reside to mark strings
  2871. as being in use.
  2872. Strings not in use are returned to the pool of free space.
  2873. .NH 3
  2874. state.c
  2875. .PP
  2876. Set of routines called to save current status and
  2877. restore a previous saved state.
  2878. .NH 3
  2879. subr.c
  2880. .PP
  2881. Random set of leftover routines.
  2882. .NH 4
  2883. match
  2884. .PP
  2885. Computes whether a certain token matches a certain token expression.
  2886. Just computes a bitnumber according to the algorithm explained with
  2887. machsets[],
  2888. and tests the bit and the boolean expression if it is there.
  2889. .NH 4
  2890. instance,cinstance
  2891. .PP
  2892. These two functions compute a token from a description.
  2893. They differ very slight, cinstance() is used to compute
  2894. the result of a coercion in a certain context
  2895. and therefore has more arguments, which it uses instead of
  2896. the global information instance() works on.
  2897. .NH 4
  2898. eqtoken
  2899. .PP
  2900. eqtoken computes whether two tokens can be considered identical.
  2901. Used to check register contents during moves mainly.
  2902. .NH 4
  2903. distance
  2904. .PP
  2905. This is the heuristic function that computes a distance from
  2906. the current fake stack contents to the token pattern in the table.
  2907. It likes exact matches most, then matches where at least the sizes are correct
  2908. and if the sizes are not correct it likes too large sizes more than too
  2909. small, since splitting a token is easier than combining one.
  2910. .NH 4
  2911. split
  2912. .PP
  2913. This function tries to find a splitting coercion
  2914. and executes it immediately when found.
  2915. The fake stack is shuffled thoroughly when this happens,
  2916. so pieces below the token that must be split are saved first.
  2917. .NH 4
  2918. docoerc
  2919. .PP
  2920. This function executes a coercion that was found.
  2921. The same shuffling is done, so the top of the stack is again saved.
  2922. .NH 4
  2923. stackupto
  2924. .PP
  2925. This function gets a pointer into the fake stack and must stack
  2926. every token including the one pointed at up to the bottom of the fake stack.
  2927. The first stacking rule possible is used,
  2928. so rules using registers must come first.
  2929. .NH 4
  2930. findcoerc
  2931. .PP
  2932. Looks for a one to one coercion, if found it returns a pointer
  2933. to it and leaves a list of possible registers to use in the global
  2934. variable curreglist.
  2935. This is used by codegen().
  2936. .NH 3
  2937. var.c
  2938. .PP
  2939. Global variables used by more than one module.
  2940. External definitions are in extern.h.