table 60 KB

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  1. /****************************************************************************
  2. * ACK backend for Acorn Risc Machine *
  3. * First version: A.N.Other, Vrije Universiteit, Amsterdam *
  4. * Completed by: Albert Koelmans, University of Newcastle *
  5. * Register variables by Jonathan Hardwick *
  6. * With help from: Andy Michael and Ceriel Jacobs *
  7. ****************************************************************************/
  8. #define legal(a) ((a&~0xFF)==0||(a&~0x3FC)==0||(a&~0xFF0)==0||\
  9. (a&~0x3FC0)==0||(a&~0xFF00)==0||(a&~0x3FC00)==0||\
  10. (a&~0xFF000)==0||(a&~0x3FC000)==0||(a&~0xFF0000)==0||\
  11. (a&~0x3FC0000)==0||(a&~0xFF00000)==0||(a&~0x3FC00000)==0||\
  12. (a&~0xFF000000)==0||(a&~0xFC000003)==0||(a&~0xF000000F)==0||\
  13. (a&~0xC000003F)==0||(~a&~0xFF)==0)
  14. #define neglegal(a) (((0-a)&~0xFF)==0||((0-a)&~0x3FC)==0||((0-a)&~0xFF0)==0||\
  15. ((0-a)&~0x3FC0)==0||((0-a)&~0xFF00)==0||((0-a)&~0x3FC00)==0||\
  16. ((0-a)&~0xFF000)==0||((0-a)&~0x3FC000)==0||((0-a)&~0xFF0000)==0||\
  17. ((0-a)&~0x3FC0000)==0||((0-a)&~0xFF00000)==0||((0-a)&~0x3FC00000)==0||\
  18. ((0-a)&~0xFF000000)==0||((0-a)&~0xFC000003)==0||((0-a)&~0xF000000F)==0||\
  19. ((0-a)&~0xC000003F)==0||(~(0-a)&~0xFF)==0)
  20. #define illegal(a) !legal(a)
  21. #define minlegal(a) (a < 0) && neglegal(a)
  22. #define minillegal(a) (a < 0) && !neglegal(a)
  23. EM_WSIZE=4
  24. EM_PSIZE=4
  25. EM_BSIZE=8
  26. PROPERTIES
  27. GENREG /* All 16 user registers */
  28. REG /* Allocatable registers */
  29. PCPSR /* PSW and PC */
  30. SREG
  31. STACKPOINTER
  32. LOCALBASE
  33. LINKREGISTER
  34. REGISTERS
  35. R0,R1,R2,R3,R8,R9,R10 :GENREG, REG .
  36. R4,R5,R6,R7 :GENREG regvar(reg_any).
  37. R11 :GENREG, SREG .
  38. SP("R12") :STACKPOINTER .
  39. LB("R13") :LOCALBASE .
  40. LR("R14") :LINKREGISTER .
  41. PC("R15") :PCPSR .
  42. TOKENS
  43. const4 = { INT num; } 4 cost(0,4) "#" num .
  44. fitcon = { INT num; } 4 cost(0,4) "#" num .
  45. lb_local = { INT ind; } 4 "[R13,#" ind "]" .
  46. addr_local = { INT ind; } 4 .
  47. naddr_local = { INT ind; } 4 .
  48. absolute = { ADDR add; } 4 add .
  49. addr_external = { ADDR add; } 4 add .
  50. label = { ADDR add; } 4 add .
  51. autoid = { STACKPOINTER reg; } 4 reg "<" .
  52. regexp = { INT exp;} 4 exp .
  53. register = { GENREG exp;} 4 exp .
  54. imS = { GENREG reg; ADDR S; INT shift;} 4
  55. reg "," S "#" shift .
  56. regS = { GENREG reg; ADDR S; GENREG sreg;} 4
  57. reg "," S " "sreg .
  58. regind = { GENREG reg; } 4
  59. "[" reg "]" .
  60. REGrel = { REG reg; ADDR ind; } 4
  61. "[" reg ",#" ind "]" .
  62. regrel = { GENREG reg; ADDR ind; } 4
  63. "[" reg ",#" ind "]" .
  64. st_regrel = { STACKPOINTER reg; ADDR ind; } 4
  65. "[" reg ",#" ind "]" .
  66. lb_regrel = { LOCALBASE reg; ADDR ind; } 4
  67. "[" reg ",#" ind "]" .
  68. regregrel = { GENREG reg1; GENREG reg2; } 4
  69. "[" reg1 "," reg2 "]" .
  70. st_regregrel = { STACKPOINTER reg1; GENREG reg2; } 4
  71. "[" reg1 "," reg2 "]" .
  72. lb_regregrel = { LOCALBASE reg1; GENREG reg2; } 4
  73. "[" reg1 "," reg2 "]" .
  74. regminregrel = { GENREG reg1; GENREG reg2; } 4
  75. "[" reg1 ",-" reg2 "]" .
  76. regiSregrel = { GENREG reg1; ADDR S; INT shift; GENREG reg2; } 4
  77. "[" reg1 "," reg2 "," S "#" shift "]" .
  78. st_regiSregrel = { STACKPOINTER reg1; ADDR S; INT shift; GENREG reg2; } 4
  79. "[" reg1 "," reg2 "," S "#" shift "]" .
  80. regminiSregrel = { GENREG reg1; ADDR S; INT shift; GENREG reg2; } 4
  81. "[" reg1 ",-" reg2 "," S "#" shift "]" .
  82. regminrSregrel = { GENREG reg1; ADDR S; GENREG sreg; GENREG reg2; } 4
  83. "[" reg1 ",-" reg2 "," S " " sreg "]" .
  84. regrelpi = { GENREG reg; ADDR ind; } 4
  85. "[" reg "],#" ind .
  86. regconst = { GENREG reg; INT ind; } 4
  87. reg ",#" ind .
  88. regplusreg = {GENREG reg1; GENREG reg2;} 4
  89. reg1 "," reg2 .
  90. regplusiSreg = {GENREG reg1; ADDR S; INT shift; GENREG reg2;} 4
  91. reg1 "," reg2 "," S "#" shift .
  92. regplusrSreg = {GENREG reg1; ADDR S; GENREG sreg; GENREG reg2;} 4
  93. reg1 "," reg2 "," S "," sreg .
  94. regminreg = {GENREG reg1; GENREG reg2;} 4
  95. reg1 "," reg2 .
  96. regminiSreg = {GENREG reg1; ADDR S; INT shift; GENREG reg2;} 4
  97. reg1 "," reg2 "," S "#" shift .
  98. regminrSreg = {GENREG reg1; ADDR S; GENREG sreg; GENREG reg2;} 4
  99. reg1 "," reg2 "," S "," sreg .
  100. REGlist1 = {REG reg1; } 4
  101. "{" reg1 "}" .
  102. reglist1 = {GENREG reg1; } 4
  103. "{" reg1 "}" .
  104. lb_reglist1 = {LOCALBASE reg1; } 4
  105. "{" reg1 "}" .
  106. sp_reglist1 = {STACKPOINTER reg1; } 4
  107. "{" reg1 "}" .
  108. reglist2 = {GENREG reg1; GENREG reg2; } 8
  109. "{" reg1 "," reg2 "}" .
  110. lb_pc_reglist2 = {LOCALBASE reg1; PCPSR reg2; } 8
  111. "{" reg1 "," reg2 "}" .
  112. reglist3 = {GENREG reg1; GENREG reg2; GENREG reg3; } 12
  113. "{" reg1 "," reg2 "," reg3 "}" .
  114. reglist4 = {GENREG reg1; GENREG reg2; GENREG reg3; GENREG reg4; } 16
  115. "{" reg1 "," reg2 "," reg3 "," reg4 "}" .
  116. /* the next 5 are not currently used - perhaps later */
  117. regrelwb = { GENREG reg; ADDR ind; } 4 "[" reg ",#" ind "]<" .
  118. regregrelwb = { GENREG reg1; GENREG reg2; } 4 "[" reg1 "," reg2 "]<" .
  119. regiSregrelwb = { GENREG reg1; ADDR S; INT shift; GENREG reg2; } 4
  120. "[" reg1 "," reg2 "," S "#" shift "]<" .
  121. regrSregrelwb = { GENREG reg1; ADDR S; GENREG sreg; GENREG reg2; } 4
  122. "[" reg1 "," reg2 "," S " " sreg "]<" .
  123. regregrelpi = { GENREG reg1; GENREG reg2; } 4 "[" reg1 "]," reg2 .
  124. LOCAL = { INT ind;} 4 ">>> BUG IN LOCAL".
  125. stack = { GENREG r;} 4 "R12<,{" r "}".
  126. /* tokens to put shifts and rotates into opcodes */
  127. reglslcon = {GENREG target; INT shift;} 4 target ",LSL#" shift.
  128. reglsrcon = {GENREG target; INT shift;} 4 target ",LSR#" shift.
  129. regasrcon = {GENREG target; INT shift;} 4 target ",ASR#" shift.
  130. regrorcon = {GENREG target; INT shift;} 4 target ",ROR#" shift.
  131. reglslreg = {GENREG target; GENREG shift;} 4 cost(0,1) target ",LSL " shift.
  132. reglsrreg = {GENREG target; GENREG shift;} 4 cost(0,1) target ",LSR " shift.
  133. regasrreg = {GENREG target; GENREG shift;} 4 cost(0,1) target ",ASR " shift.
  134. regrorreg = {GENREG target; GENREG shift;} 4 cost(0,1) target ",ROR " shift.
  135. regrorregr = {GENREG target; GENREG shift;} 4 cost(0,1) target ",ROR " shift.
  136. SETS
  137. address = absolute + regind + regrel + regrelwb + regregrel +
  138. st_regrel + st_regregrel + st_regiSregrel +
  139. lb_regrel + lb_regregrel +
  140. regiSregrel + regiSregrelwb + regrSregrelwb +
  141. regminregrel + regminiSregrel + regminrSregrel +
  142. regregrelwb + regrelpi + regregrelpi + lb_local .
  143. REGcon = GENREG + imS + regS + fitcon .
  144. reglist = reglist1 + reglist2 + reglist3 + reglist4 +
  145. lb_reglist1 + sp_reglist1 + lb_pc_reglist2 +
  146. regexp + REGlist1 .
  147. constant = fitcon + const4 .
  148. local = lb_local + LOCAL.
  149. regshift = reglslreg + reglsrreg + regasrreg + regrorreg + regrorregr +
  150. reglslcon + reglsrcon + regasrcon + regrorcon.
  151. rhs = GENREG + constant + regshift + LOCAL.
  152. mem4 = regregrel + regrel + lb_local.
  153. extern = addr_external + absolute + label.
  154. all_except_con = mem4 + extern + local.
  155. any_data = all_except_con + rhs.
  156. any_data_except_local = any_data - LOCAL.
  157. posshifts = regplusiSreg+regplusrSreg.
  158. negshifts = regminiSreg+regminrSreg.
  159. shifts = posshifts+negshifts.
  160. INSTRUCTIONS
  161. BAL label cost(4,4) .
  162. BAL_L "BAL.L" label cost(4,4) .
  163. BAL_LEQ "BAL.L.EQ" label cost(4,4) .
  164. BNV label cost(4,4) .
  165. BNE label cost(4,4) .
  166. BEQ label cost(4,4) .
  167. BMI label cost(4,4) .
  168. BGT label cost(4,4) .
  169. BLT label cost(4,4) .
  170. BLE label cost(4,4) .
  171. BGE label cost(4,4) .
  172. LDR REG+LOCALBASE+GENREG+address:wo, address:rw cost(4,4) .
  173. LDR LOCAL+GENREG:rw,
  174. mem4+absolute+addr_external:ro cost(4,4) .
  175. STR GENREG+REG:ro, REGrel+address:rw cost(4,4) .
  176. LDR_B "LDR.B" REG+GENREG:wo, address:rw cost(4,4) .
  177. LDR_B LOCAL:rw, rhs+mem4:ro cost(4,4) .
  178. STR_B "STR.B" GENREG+REG:ro, address:rw cost(4,4) .
  179. LDMFD autoid:rw, reglist:wo cost(4,7) .
  180. STMFD autoid:rw, reglist:ro cost(4,7) .
  181. STMFD stack cost(4,4) .
  182. LDMIA GENREG:rw, reglist:wo cost(4,7) .
  183. ADC REG+GENREG:wo, REG+GENREG:ro, REGcon:ro cost(4,1) .
  184. ADD GENREG+REG:wo, GENREG:ro, REGcon+const4:ro cost(4,1) .
  185. ADD GENREG+STACKPOINTER:wo, GENREG+STACKPOINTER:ro,
  186. STACKPOINTER+REGcon+const4:ro cost(4,1) .
  187. ADD LOCAL+GENREG+REG:wo,
  188. regconst+shifts+regminreg+regplusreg:ro cost(4,1) .
  189. ADD LOCAL+GENREG:rw, LOCALBASE+GENREG+LOCAL:ro,
  190. rhs:ro cost(4,1).
  191. ADD_NE "ADD.NE" GENREG+REG:wo, GENREG:ro, REGcon+const4:ro cost(4,1) .
  192. AND REG+GENREG:wo, GENREG:ro, GENREG+REGcon:ro cost(4,1) .
  193. AND_S "AND.S" GENREG+REG:wo, GENREG:ro, REGcon:ro cost(4,1) .
  194. BIC REG+GENREG:wo, GENREG:ro, REGcon:ro cost(4,1) .
  195. CMN GENREG+REG:ro, REGcon:ro kills :cc cost(4,1) .
  196. CMP REG+GENREG:ro, REGcon:ro kills :cc cost(4,1) .
  197. EOR GENREG+REG:wo, GENREG:ro, GENREG+REGcon:ro cost(4,1) .
  198. EOR_S "EOR.S" REG+GENREG:wo:cc, GENREG:ro, REGcon:ro cost(4,1) .
  199. MOV REG:wo, REGcon+const4:ro cost(4,1) .
  200. MOV REG:rw, LOCAL:ro cost(4,1).
  201. MOV LOCALBASE+PCPSR+STACKPOINTER+GENREG:rw,
  202. REGcon+address+LOCALBASE+PCPSR+
  203. STACKPOINTER+GENREG+LOCAL:ro cost(4,1).
  204. MOV LOCAL+GENREG:rw, GENREG+rhs+register+REG:ro cost(4,1).
  205. MOV LOCALBASE+GENREG:wo, REGcon+const4:ro cost(4,1) .
  206. MOV_MI "MOV.MI" REG+GENREG:wo, REGcon+const4:ro cost(4,1) .
  207. MOV_HI "MOV.HI" GENREG+REG:wo, REGcon+const4:ro cost(4,1) .
  208. MOV_LS "MOV.LS" REG+GENREG:wo, REGcon+const4:ro cost(4,1) .
  209. MOV_LT "MOV.LT" GENREG+REG:wo, REGcon+const4:ro cost(4,1) .
  210. MOV_LE "MOV.LE" REG+GENREG:wo, REGcon+const4:ro cost(4,1) .
  211. MOV_EQ "MOV.EQ" GENREG+REG:wo, REGcon+const4:ro cost(4,1) .
  212. MOV_NE "MOV.NE" REG+GENREG:wo, REGcon+const4:ro cost(4,1) .
  213. MOV_GE "MOV.GE" REG+GENREG:wo, REGcon+const4:ro cost(4,1) .
  214. MOV_GT "MOV.GT" REG+GENREG:wo, REGcon+const4:ro cost(4,1) .
  215. MOV_NV "MOV.NV" GENREG+REG:wo, REGcon+const4:ro cost(4,1) .
  216. MOV_S "MOV.S" GENREG+REG:wo, REGcon+const4+regind:ro
  217. kills :cc cost(4,1) .
  218. MVN LOCAL+GENREG+REG:wo, REGcon:ro cost(4,1) .
  219. ORR REG+GENREG:wo, GENREG:ro, GENREG+REGcon:ro cost(4,1) .
  220. ORR REG+GENREG+LOCAL:wo, imS:ro cost(4,1) .
  221. RSB REG+GENREG+LOCAL:rw, REG+GENREG+LOCAL:ro,
  222. rhs:ro cost(4,1).
  223. RSB GENREG+REG:wo, GENREG:ro, REGcon:ro cost(4,1) .
  224. RSB_S "RSB.S" REG+GENREG:wo:cc, GENREG:ro, REGcon:ro cost(4,1) .
  225. RSC GENREG+REG:wo, GENREG:ro, REGcon:ro cost(4,1) .
  226. SBC REG+GENREG:wo, GENREG:ro, REGcon:ro cost(4,1) .
  227. SUB LOCAL+GENREG:rw,
  228. regconst+shifts+regplusreg+regminreg:ro cost(4,1).
  229. SUB LOCAL:rw, LOCAL:ro, rhs:ro cost(4,1).
  230. SUB LOCAL+REG+GENREG:wo, LOCALBASE+GENREG:ro,
  231. constant+REGcon:ro cost(4,1) .
  232. SUB_S "SUB.S" REG+GENREG:wo:cc, GENREG:ro, REGcon:ro cost(4,1) .
  233. TEQ GENREG+REG:ro, REGcon:ro kills :cc cost(4,1) .
  234. TST REG+GENREG:ro, REGcon:ro kills :cc cost(4,1) .
  235. ADR REG+LINKREGISTER+GENREG:wo,
  236. addr_external+label:ro cost(4,1) .
  237. LABEL "" label kills :cc cost(4,1) .
  238. /* Dummy instructions for ncgg procedures : lxx is logical operator, */
  239. /* mxx is conditional move, bxx is conditional branch, rxx is arith- */
  240. /* metical operator on register variable (LOCAL). */
  241. lxx "lxx : bug in cg" REG:rw, REG:ro, rhs:ro cost(4,1).
  242. mxx "mxx : bug in cg" REG:rw, rhs:ro cost(4,1).
  243. bxx "bxx : bug in cg" addr_external cost(4,4).
  244. rxx "rxx : bug in cg" LOCAL:rw, LOCAL:ro, rhs:ro cost(4,1).
  245. rrx "rrx : bug in cg" LOCAL:rw, LOCAL:ro, LOCAL:ro cost(4,1).
  246. MOVES
  247. from GENREG+STACKPOINTER+LOCALBASE+PCPSR to
  248. GENREG+STACKPOINTER+LOCALBASE+PCPSR
  249. gen MOV %2, %1
  250. from fitcon+GENREG+REG to LOCAL inreg(%ind)==reg_any
  251. gen MOV %2, %1
  252. from LOCAL inreg(%ind)==reg_any to REG+GENREG
  253. gen MOV %2, %1
  254. /* illegal immediate operands */
  255. from const4 minlegal(%num+1) to GENREG+LOCAL
  256. gen MVN %2, {fitcon, 0-%1.num-1}
  257. from const4 (minlegal(%num)) to GENREG+LOCAL
  258. gen MOV %2, {fitcon, 0-%1.num}
  259. RSB %2, %2, {fitcon, 0}
  260. from const4 to GENREG+LOCAL /* general case */
  261. gen MOV %2, { fitcon, %1.num & 0xFF}
  262. ADD %2, %2, { fitcon, %1.num & 0xFF00}
  263. ADD %2, %2, { fitcon, %1.num & 0xFF0000}
  264. ADD %2, %2, { fitcon, %1.num & 0xFF000000}
  265. from regconst (%ind > 0) && legal(%ind) to LOCAL inreg(%ind)==reg_any
  266. gen ADD %2, %1
  267. from regconst minlegal(%ind) to LOCAL inreg(%ind)==reg_any
  268. gen SUB %2, %1.reg, {fitcon, 0-%1.ind}
  269. from lb_local legal(%ind) to GENREG
  270. gen LDR %2, {lb_regrel, LB, %1.ind}
  271. from lb_local to GENREG
  272. gen move {const4, %1.ind}, R11
  273. LDR %2, {lb_regregrel, LB, R11}
  274. from GENREG to lb_local legal(%ind)
  275. gen STR %1, {lb_regrel, LB, %2.ind}
  276. from GENREG to lb_local
  277. gen move {const4, %2.ind}, R11
  278. STR %1, {lb_regregrel, LB, R11}
  279. from GENREG to address
  280. gen STR %1, %2
  281. from address to GENREG+LOCALBASE
  282. gen LDR %2, %1
  283. from GENREG to autoid
  284. gen STMFD %2, {reglist1, %1}
  285. from autoid to GENREG
  286. gen LDMFD %1, {reglist1, %2}
  287. from REGcon to GENREG+LOCALBASE
  288. gen MOV %2, %1
  289. from addr_external to GENREG
  290. gen ADR %2, %1
  291. /* strictly speaking, the following move is impossible.
  292. * what it really means is: move from reg to address!
  293. */
  294. from GENREG to addr_external
  295. gen ADR R11,%2
  296. STR %1,{regind,R11}
  297. TESTS
  298. to test GENREG
  299. gen CMP %1, {fitcon, 0}
  300. STACKINGRULES
  301. from LOCAL to STACK
  302. gen STMFD {stack, regvar(%1.ind)}
  303. from REG to STACK
  304. gen STMFD {autoid, SP}, {REGlist1, %1}
  305. from GENREG to STACK
  306. gen STMFD {autoid, SP}, {reglist1, %1}
  307. from LOCALBASE to STACK
  308. gen STMFD {autoid, SP}, {lb_reglist1, %1}
  309. from STACKPOINTER to STACK
  310. gen STMFD {autoid, SP}, {sp_reglist1, %1}
  311. from REGcon to STACK
  312. gen move %1, R11
  313. STMFD {autoid, SP}, {reglist1, R11}
  314. from const4 to STACK
  315. gen move %1, R11
  316. STMFD {autoid, SP}, {reglist1, R11}
  317. from addr_local legal(%ind) to STACK
  318. gen ADD R11, LB, {fitcon, %1.ind}
  319. STMFD {autoid, SP}, {reglist1, R11}
  320. from addr_local to STACK
  321. gen move {const4, %1.ind}, R11
  322. ADD R11, LB, R11
  323. STMFD {autoid, SP}, {reglist1, R11}
  324. from naddr_local legal(%ind) to STACK
  325. gen SUB R11, LB, {fitcon, %1.ind}
  326. STMFD {autoid, SP}, {reglist1, R11}
  327. from naddr_local to STACK
  328. gen move {const4, %1.ind}, R11
  329. SUB R11, LB, R11
  330. STMFD {autoid, SP}, {reglist1, R11}
  331. from addr_external to STACK
  332. gen ADR R11, %1
  333. STMFD {autoid, SP}, {reglist1, R11}
  334. from regconst (%ind > 0) && legal(%ind) to STACK
  335. gen ADD R11, %1.reg, {fitcon,%1.ind}
  336. STMFD {autoid, SP}, {reglist1, R11}
  337. from regconst to STACK
  338. gen move {const4, %1.ind}, R11
  339. ADD R11, R11, %1.reg
  340. STMFD {autoid, SP}, {reglist1, R11}
  341. from regplusreg to STACK
  342. gen ADD R11, %1.reg1, %1.reg2
  343. STMFD {autoid, SP}, {reglist1, R11}
  344. from regminreg to STACK
  345. gen SUB R11, %1.reg1, %1.reg2
  346. STMFD {autoid, SP}, {reglist1, R11}
  347. from regplusiSreg to STACK
  348. gen ADD R11, %1.reg1, {imS, %1.reg2, %1.S, %1.shift}
  349. STMFD {autoid, SP}, {reglist1, R11}
  350. from regminiSreg to STACK
  351. gen SUB R11, %1.reg1, {imS, %1.reg2, %1.S, %1.shift}
  352. STMFD {autoid, SP}, {reglist1, R11}
  353. from regplusrSreg to STACK
  354. gen ADD R11, %1.reg1, {regS, %1.reg2, %1.S, %1.sreg}
  355. STMFD {autoid, SP}, {reglist1, R11}
  356. from regminrSreg to STACK
  357. gen SUB R11, %1.reg1, {regS, %1.reg2, %1.S, %1.sreg}
  358. STMFD {autoid, SP}, {reglist1, R11}
  359. from address to STACK
  360. gen move %1, R11
  361. STMFD {autoid, SP}, {reglist1, R11}
  362. COERCIONS
  363. from LOCAL
  364. uses GENREG
  365. gen MOV %a, %1 yields %a
  366. from lb_local legal(%ind)
  367. uses GENREG
  368. gen LDR %a, {lb_regrel, LB, %ind} yields %a
  369. from lb_local
  370. uses GENREG
  371. gen move {const4, %ind}, R11
  372. LDR %a, {lb_regregrel, LB, R11} yields %a
  373. from const4 %num < 0
  374. uses GENREG
  375. gen move {const4, 0-%num}, %a
  376. RSB %a, %a, {fitcon, 0} yields %a
  377. from const4 illegal(%num)
  378. uses GENREG
  379. gen move %1, %a yields %a
  380. from const4 yields {fitcon, %num}
  381. from STACK
  382. uses GENREG
  383. gen LDMFD {autoid, SP}, {reglist1, %a} yields %a
  384. from address
  385. uses GENREG
  386. gen move %1, %a yields %a
  387. from REGcon
  388. uses GENREG
  389. gen move %1, %a yields %a
  390. from addr_external
  391. uses GENREG
  392. gen move %1, %a
  393. yields %a
  394. from addr_local legal(%ind)
  395. uses GENREG
  396. gen ADD %a, LB, {fitcon, %ind} yields %a
  397. from addr_local
  398. uses GENREG
  399. gen move {const4, %ind}, %a
  400. ADD %a, LB, %a yields %a
  401. from naddr_local legal(%ind)
  402. uses GENREG
  403. gen SUB %a, LB, {fitcon, %ind} yields %a
  404. from naddr_local
  405. uses GENREG
  406. gen move {const4, %ind}, %a
  407. SUB %a, LB, %a yields %a
  408. from regconst (%ind > 0) && legal(%ind)
  409. uses GENREG
  410. gen ADD %a, %1 yields %a
  411. from regconst minlegal(%ind)
  412. uses GENREG
  413. gen SUB %a, %reg, {fitcon, 0-%ind} yields %a
  414. from regconst minillegal(%ind)
  415. uses GENREG
  416. gen move {const4, 0-%ind}, %a
  417. SUB %a, %a, %reg yields %a
  418. from regconst
  419. uses GENREG
  420. gen move {const4, %ind}, %a
  421. ADD %a, %a, %reg yields %a
  422. from regplusreg
  423. uses GENREG
  424. gen ADD %a, %reg1, %reg2
  425. yields %a
  426. from regminreg
  427. uses GENREG
  428. gen SUB %a, %reg1, %reg2
  429. yields %a
  430. from regplusiSreg
  431. uses GENREG
  432. gen ADD %a, %reg1, {imS, %reg2, %S, %shift}
  433. yields %a
  434. from regminiSreg
  435. uses GENREG
  436. gen SUB %a, %reg1, {imS, %reg2, %S, %shift}
  437. yields %a
  438. from regplusrSreg
  439. uses GENREG
  440. gen ADD %a, %reg1, {regS, %reg2, %S, %sreg}
  441. yields %a
  442. from regminrSreg
  443. uses GENREG
  444. gen SUB %a, %reg1, {regS, %reg2, %S, %sreg}
  445. yields %a
  446. PATTERNS
  447. /************************************************************************
  448. * *
  449. * GROUP 0 : Register variables *
  450. * *
  451. ************************************************************************/
  452. /* Simple load and store */
  453. pat lol inreg($1)==reg_any
  454. yields {LOCAL, $1}
  455. pat lil inreg($1)==reg_any
  456. yields {regind, regvar($1)}
  457. pat stl inreg($1)==reg_any
  458. with exact const4
  459. kills local %ind==$1
  460. gen move %1, {LOCAL, $1}
  461. with exact fitcon
  462. kills local %ind==$1
  463. gen MOV {LOCAL, $1}, %1
  464. with rhs-constant
  465. kills local %ind==$1
  466. gen MOV {LOCAL, $1}, %1
  467. with mem4+absolute
  468. kills local %ind==$1
  469. gen LDR {LOCAL, $1}, %1
  470. with regminreg
  471. kills local %ind == $1
  472. gen SUB {LOCAL, $1}, %1
  473. with regplusreg+posshifts
  474. kills local %ind == $1
  475. gen ADD {LOCAL, $1}, %1
  476. with negshifts
  477. kills local %ind == $1
  478. gen SUB {LOCAL, $1}, %1
  479. pat stl $1==1 && inreg($1)==reg_any
  480. with rhs
  481. kills local %ind==$1
  482. gen LDR_B {LOCAL, $1}, %1
  483. pat sil inreg($1)==reg_any
  484. with GENREG
  485. kills /*all_except_con*/ address
  486. gen move %1, {regind, regvar($1)}
  487. /* Increment, decrement, zero */
  488. pat inl inreg($1)==reg_any
  489. kills local %ind==$1
  490. gen ADD {LOCAL, $1}, {LOCAL, $1}, {fitcon, 1}
  491. pat del inreg($1)==reg_any
  492. kills local %ind==$1
  493. gen SUB {LOCAL, $1}, {LOCAL, $1}, {fitcon, 1}
  494. pat zrl inreg($1)==reg_any
  495. kills local %ind==$1
  496. gen MOV {LOCAL, $1}, {fitcon, 0}
  497. pat lol inc stl inreg($1)==reg_any && inreg($3)==reg_any
  498. kills local %ind==$3
  499. gen ADD {LOCAL, $3}, {LOCAL, $1}, {fitcon, 1}
  500. pat lol dec stl inreg($1)==reg_any && inreg($3)==reg_any
  501. kills local %ind==$3
  502. gen SUB {LOCAL, $3}, {LOCAL, $1}, {fitcon, 1}
  503. pat lol ngi stl inreg($1)==reg_any && inreg($3)==reg_any
  504. kills local %ind==$3
  505. gen RSB {LOCAL, $3}, {LOCAL, $1}, {fitcon, 0}
  506. /* Procedure : load register, op xx, store register */
  507. proc lol_op_stl example lol adi stl
  508. with rhs
  509. kills local %ind==$3
  510. gen rxx* {LOCAL, $3}, {LOCAL, $1}, %1
  511. pat lol adi stl inreg($1)==reg_any && inreg($3)==reg_any && $2==4
  512. call lol_op_stl("ADD")
  513. pat lol adu stl leaving lol $1 adi $2 stl $3
  514. pat lol sbi stl inreg($1)==reg_any && inreg($3)==reg_any && $2==4
  515. call lol_op_stl("RSB")
  516. pat lol sbu stl leaving lol $1 sbi $2 stl $3
  517. pat lol and stl inreg($1)==reg_any && inreg($3)==reg_any && $2==4
  518. call lol_op_stl("AND")
  519. pat lol ior stl inreg($1)==reg_any && inreg($3)==reg_any && $2==4
  520. call lol_op_stl("ORR")
  521. pat lol xor stl inreg($1)==reg_any && inreg($3)==reg_any && $2==4
  522. call lol_op_stl("EOR")
  523. /* Procedure : load register, load constant, op xx, store register */
  524. proc lol_loc_op_stl example lol loc adi stl
  525. kills local %ind==$4
  526. gen rxx* {LOCAL, $4}, {LOCAL, $1}, {const4, $2}
  527. pat lol loc adi stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  528. call lol_loc_op_stl("ADD")
  529. pat lol loc adu stl leaving lol $1 loc $2 adi $3 stl $4
  530. pat lol loc sbi stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  531. call lol_loc_op_stl("SUB")
  532. pat lol loc sbu stl leaving lol $1 loc $2 sbi $3 stl $4
  533. pat lol loc and stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  534. call lol_loc_op_stl("AND")
  535. pat lol loc ior stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  536. call lol_loc_op_stl("ORR")
  537. pat lol loc xor stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  538. call lol_loc_op_stl("EOR")
  539. pat lol dup inreg($1)==reg_any && $2==4 leaving lol $1 lol $1
  540. /* Procedure : load register, load register, op xx, store register */
  541. proc lol_lol_op_stl example lol lol adi stl
  542. kills local %ind==$4
  543. gen rrx* {LOCAL, $4}, {LOCAL, $1}, {LOCAL, $2}
  544. pat lol lol adi stl inreg($1)==reg_any && inreg($2)==reg_any &&
  545. inreg($4)==reg_any && $3==4
  546. call lol_lol_op_stl("ADD")
  547. pat lol lol adu stl leaving lol $1 lol $2 adi $3 stl $4
  548. pat lol lol sbi stl inreg($1)==reg_any && inreg($2)==reg_any &&
  549. inreg($4)==reg_any && $3==4
  550. call lol_lol_op_stl("SUB")
  551. pat lol lol sbu stl leaving lol $1 lol $2 sbi $3 stl $4
  552. pat lol lol and stl inreg($1)==reg_any && inreg($2)==reg_any &&
  553. inreg($4)==reg_any && $3==4
  554. call lol_lol_op_stl("AND")
  555. pat lol lol ior stl inreg($1)==reg_any && inreg($2)==reg_any &&
  556. inreg($4)==reg_any && $3==4
  557. call lol_lol_op_stl("ORR")
  558. pat lol lol xor stl inreg($1)==reg_any && inreg($2)==reg_any &&
  559. inreg($4)==reg_any && $3==4
  560. call lol_lol_op_stl("EOR")
  561. /* Shifts */
  562. pat lol loc sli stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  563. kills local %ind==$4
  564. gen MOV {LOCAL, $4}, {reglslcon, regvar($1), $2}
  565. pat lol loc slu stl leaving lol $1 loc $2 sli $3 stl $4
  566. pat lol loc sri stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  567. kills local %ind==$4
  568. gen MOV {LOCAL, $4}, {regasrcon, regvar($1), $2}
  569. pat lol loc sru stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  570. kills local %ind==$4
  571. gen MOV {LOCAL, $4}, {reglsrcon, regvar($1), $2}
  572. pat lol lol sli stl inreg($1)==reg_any && inreg($2)==reg_any &&
  573. inreg($4)==reg_any && $3==4
  574. kills local %ind==$4
  575. gen MOV {LOCAL, $4}, {reglslreg, regvar($1), regvar($2)}
  576. pat lol lol slu stl leaving lol $1 lol $2 sli $3 stl $4
  577. pat lol lol sri stl inreg($1)==reg_any && inreg($2)==reg_any &&
  578. inreg($4)==reg_any && $3==4
  579. kills local %ind==$4
  580. gen MOV {LOCAL, $4}, {regasrreg, regvar($1), regvar($2)}
  581. pat lol lol sru stl inreg($1)==reg_any && inreg($2)==reg_any &&
  582. inreg($4)==reg_any && $3==4
  583. kills local %ind==$4
  584. gen MOV {LOCAL, $4}, {reglsrreg, regvar($1), regvar($2)}
  585. /* Rotates */
  586. pat lol loc ror stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  587. kills local %ind==$4
  588. gen MOV {LOCAL, $4}, {regrorcon, regvar($1), $2}
  589. pat lol lol ror stl inreg($1)==reg_any && inreg($2)==reg_any &&
  590. inreg($4)==reg_any && $3==4
  591. kills local %ind==$4
  592. gen MOV {LOCAL, $4}, {regrorreg, regvar($1), regvar($2)}
  593. pat lol loc rol stl inreg($1)==reg_any && inreg($4)==reg_any && $3==4
  594. kills local %ind==$4
  595. gen MOV {LOCAL, $4}, {regrorcon, regvar($1), 32-$2}
  596. pat lol lol ror stl inreg($1)==reg_any && inreg($2)==reg_any &&
  597. inreg($4)==reg_any && $3==4
  598. kills local %ind==$4
  599. gen RSB R11, {LOCAL, $2}, {fitcon, 32}
  600. MOV {LOCAL, $4}, {regrorregr, regvar($1), R11}
  601. /* code for *p++ and *p-- (integers) */
  602. pat lol lol adp stl loi $1==$2 && $2==$4 && $5==4 && inreg($1)==reg_any
  603. kills GENREG
  604. uses GENREG
  605. gen LDR %a, {regrelpi, regvar($1), $5} yields %a
  606. pat lol lol adp stl sti $1==$2 && $2==$4 && $5==4 && inreg($1)==reg_any
  607. with GENREG
  608. kills GENREG
  609. gen STR %1, {regrelpi, regvar($1), $5}
  610. /* code for *p++ and *p-- (bytes)*/
  611. pat lol lol adp stl loi $1==$2 && $2==$4 && $5==1 && inreg($1)==reg_any
  612. kills GENREG
  613. uses GENREG
  614. gen LDR_B %a, {regrelpi, regvar($1), $5} yields %a
  615. pat lol lol adp stl sti $1==$2 && $2==$4 && $5==1 && inreg($1)==reg_any
  616. with GENREG
  617. kills GENREG
  618. gen STR_B %1, {regrelpi, regvar($1), $5}
  619. /* code for *pp->p++ and *pp->p-- (integers) */
  620. pat lil dup adp sil loi $1==$4 && $2==4 && $5==4 && inreg($1)==reg_any
  621. kills GENREG
  622. uses GENREG,GENREG
  623. gen LDR %a, {regind, regvar($1)}
  624. ADD %b, %a, {fitcon, $3}
  625. STR %b, {regind, regvar($1)}
  626. LDR %b, {regind, %a} yields %b
  627. pat lil dup adp sil sti $1==$4 && $2==4 && $5==4 && inreg($1)==reg_any
  628. with GENREG
  629. kills GENREG
  630. uses GENREG,GENREG
  631. gen LDR %a, {regind, regvar($1)}
  632. ADD %b, %a, {fitcon, $3}
  633. STR %b, {regind, regvar($1)}
  634. STR %1, {regind, %a}
  635. /* code for *pp->p++ and *pp->p-- (bytes) */
  636. pat lil dup adp sil loi $1==$4 && $2==4 && $5==1 && inreg($1)==reg_any
  637. kills GENREG
  638. uses GENREG,GENREG
  639. gen LDR %a, {regind, regvar($1)}
  640. ADD %b, %a, {fitcon, $3}
  641. STR %b, {regind, regvar($1)}
  642. LDR_B %b, {regind, %a} yields %b
  643. pat lil dup adp sil sti $1==$4 && $2==4 && $5==1 && inreg($1)==reg_any
  644. with GENREG
  645. kills GENREG
  646. uses GENREG,GENREG
  647. gen LDR %a, {regind, regvar($1)}
  648. ADD %b, %a, {fitcon, $3}
  649. STR %b, {regind, regvar($1)}
  650. STR_B %1, {regind, %a}
  651. /************************************************************************
  652. * *
  653. * GROUP I : Load Instructions *
  654. * *
  655. ************************************************************************/
  656. pat loc $1 < 0 yields {const4, $1}
  657. pat loc legal($1) yields {fitcon, $1}
  658. pat loc yields {const4, $1}
  659. pat ldc leaving loc 18 trp
  660. pat lol yields {lb_local, $1}
  661. pat loe yields {absolute, $1}
  662. pat lil leaving lol $1 loi 4
  663. pat lof
  664. with GENREG yields {regrel, %1, $1}
  665. with exact addr_local yields {lb_local, %1.ind+$1}
  666. with exact addr_external yields {absolute, %1.add+$1}
  667. with exact regconst yields {regrel, %1.reg, $1+%1.ind}
  668. pat lal $1 > 0 yields {addr_local, $1}
  669. pat lal $1 < 0 yields {naddr_local, 0-$1}
  670. pat lal $1 == 0 yields LB
  671. pat lae yields {addr_external, $1}
  672. pat lae loi lae sti $2==$4 leaving lae $1 lae $3 blm $2
  673. pat lxl $1==0 yields LB
  674. pat lxl $1==1 yields {lb_local,8}
  675. pat lxl $1>1
  676. uses GENREG={const4, $1}, GENREG=LB
  677. gen LABEL {label, "1:"}
  678. move {regrel, %b, 8}, %b
  679. SUB_S %a, %a, {fitcon,1}
  680. BNE {label,"1B"} yields %b
  681. pat lxa $1==0 yields {addr_local,8}
  682. pat lxa $1==1
  683. uses GENREG={lb_local,8} yields {regconst,%a,8}
  684. pat lxa $1>1
  685. uses GENREG={const4, $1}, GENREG=LB
  686. gen LABEL {label, "1:"}
  687. move {regrel, %b, 8}, %b
  688. SUB_S %a, %a, {fitcon,1}
  689. BNE {label,"1B"} yields {regconst, %b, 8}
  690. pat loi $1==1
  691. with GENREG
  692. uses GENREG
  693. gen LDR_B %a, {regind, %1} yields %a
  694. with exact naddr_local
  695. uses GENREG
  696. gen LDR_B %a, {lb_local, 0-%1.ind} yields %a
  697. with exact addr_local
  698. uses GENREG
  699. gen LDR_B %a, {lb_local, %1.ind} yields %a
  700. with exact addr_external
  701. uses GENREG
  702. gen LDR_B %a, {absolute, %1.add} yields %a
  703. with exact regconst
  704. uses GENREG
  705. gen LDR_B %a, {regrel, %1.reg, %1.ind} yields %a
  706. with exact regplusreg
  707. uses GENREG
  708. gen LDR_B %a, {regregrel, %1.reg1, %1.reg2} yields %a
  709. with exact regminreg
  710. uses GENREG
  711. gen LDR_B %a, {regminregrel, %1.reg1, %1.reg2} yields %a
  712. with exact regplusiSreg
  713. uses GENREG
  714. gen LDR_B %a, {regiSregrel, %1.reg1, %1.S, %1.shift, %1.reg2} yields %a
  715. with exact regminiSreg
  716. uses GENREG
  717. gen LDR_B %a, {regminiSregrel,%1.reg1,%1.S,%1.shift,%1.reg2} yields %a
  718. with exact regplusrSreg
  719. uses GENREG,GENREG
  720. gen move {regS,%1.reg2,%1.S,%1.sreg}, %b
  721. LDR_B %a, {regregrel, %1.reg1, %b} yields %a
  722. with exact regminrSreg
  723. uses GENREG
  724. gen LDR_B %a, {regminrSregrel,%1.reg1,%1.S,%1.sreg,%1.reg2} yields %a
  725. pat loi $1==2
  726. with GENREG
  727. uses GENREG, GENREG
  728. gen LDR_B %a, {regind, %1}
  729. LDR_B %b, {regrel, %1, 1}
  730. ADD %a,%a,{imS,%b,"LSL",8} yields %a
  731. pat loi $1==4
  732. with GENREG yields {regind, %1}
  733. with exact addr_local yields {lb_local, %1.ind}
  734. with exact naddr_local yields {lb_local, 0-%1.ind}
  735. with exact addr_external yields {absolute, %1.add}
  736. with exact regconst yields {regrel, %1.reg, %1.ind}
  737. with exact regplusreg yields {regregrel, %1.reg1, %1.reg2}
  738. with exact regminreg yields {regminregrel, %1.reg1, %1.reg2}
  739. with exact regplusiSreg yields {regiSregrel,%1.reg1,%1.S,
  740. %1.shift,%1.reg2}
  741. with exact regminiSreg yields {regminiSregrel,%1.reg1,%1.S,
  742. %1.shift,%1.reg2}
  743. with exact regplusrSreg
  744. uses GENREG,GENREG
  745. gen move {regS,%1.reg2,%1.S,%1.sreg}, %b
  746. LDR %a, {regregrel, %1.reg1, %b} yields %a
  747. with exact regminrSreg yields {regminrSregrel,%1.reg1,
  748. %1.S,%1.sreg,%1.reg2}
  749. pat loi $1==8
  750. with GENREG
  751. uses GENREG, GENREG
  752. gen LDMIA %1, {reglist2, %a, %b} yields %b %a
  753. pat loi defined($1)
  754. with GENREG STACK
  755. uses GENREG = {const4, $1}
  756. gen LABEL {label, "1:"}
  757. SUB_S %a, %a, {fitcon, 4}
  758. move {regregrel, %1, %a}, R11
  759. STMFD {autoid, SP}, {reglist1, R11}
  760. BGT {label, "1b"}
  761. pat loi loc and $1==2 && $2>0 && $2<256 leaving loi 1 loc $2 and $3
  762. pat loi loc loc cii $1==2 && $2==2 && $3==4
  763. with GENREG
  764. uses GENREG,GENREG
  765. gen LDR_B %a, {regind, %1}
  766. LDR_B %b, {regrel, %1, 1}
  767. MOV %b, {imS, %b, "LSL", 24}
  768. ORR %a, %a, {imS, %b, "ASR", 16} yields %a
  769. pat los
  770. with STACK
  771. kills ALL
  772. gen BAL_L {label, ".los"}
  773. pat ldl yields {lb_local, $1+4}
  774. {lb_local, $1}
  775. pat lde yields {absolute, $1+4}
  776. {absolute, $1}
  777. pat ldf
  778. with GENREG yields {regrel, %1, $1+4}
  779. {regrel, %1, $1}
  780. with exact addr_local yields {lb_local, %1.ind+$1+4}
  781. {lb_local, %1.ind+$1}
  782. with exact addr_external yields {absolute, %1.add+$1+4}
  783. {absolute, %1.add+$1}
  784. with exact regconst yields {regrel, %1.reg, $1+%1.ind+4}
  785. {regrel, %1.reg, $1+%1.ind}
  786. pat lpi yields {addr_external,$1}
  787. /************************************************************************
  788. * *
  789. * GROUP II : Store Instructions *
  790. * *
  791. ************************************************************************/
  792. pat stl
  793. with GENREG
  794. kills address-(absolute+lb_local), lb_local %ind-4 < $1 && %ind+4 > $1
  795. gen move %1, {lb_local, $1}
  796. pat stl lol $1==$2 leaving dup 4 stl $1
  797. pat ste
  798. with GENREG
  799. kills address
  800. gen move %1, {absolute, $1}
  801. pat ste loe $1==$2
  802. leaving dup 4 ste $1
  803. pat sil leaving lol $1 sti 4
  804. pat stf
  805. with GENREG GENREG
  806. kills address
  807. gen move %2, {regrel, %1, $1}
  808. with addr_local GENREG
  809. kills address
  810. gen move %2, {lb_local, %1.ind + $1}
  811. with addr_external GENREG
  812. kills address
  813. gen move %2, {absolute, %1.add + $1}
  814. with regconst GENREG
  815. kills address
  816. gen move %2, {regrel, %1.reg, $1+%1.ind}
  817. pat sti $1==1
  818. with GENREG GENREG
  819. kills address
  820. gen STR_B %2, {regind, %1}
  821. with addr_local GENREG
  822. kills address
  823. gen STR_B %2, {lb_local, %1.ind}
  824. with addr_external GENREG
  825. kills address
  826. gen STR_B %2, {absolute, %1.add}
  827. with regconst GENREG
  828. kills address
  829. gen STR_B %2, {regrel, %1.reg, %1.ind}
  830. with regplusreg GENREG
  831. kills address
  832. gen STR_B %2, {regregrel, %1.reg1, %1.reg2}
  833. with regminreg GENREG
  834. kills address
  835. gen STR_B %2, {regminregrel, %1.reg1, %1.reg2}
  836. with regplusiSreg GENREG
  837. kills address
  838. gen STR_B %2, {regiSregrel, %1.reg1, %1.S, %1.shift, %1.reg2}
  839. with regminiSreg GENREG
  840. kills address
  841. gen STR_B %2, {regminiSregrel, %1.reg1, %1.S, %1.shift, %1.reg2}
  842. with regplusrSreg GENREG
  843. kills address
  844. uses GENREG
  845. gen move {regS, %1.reg2, %1.S, %1.sreg}, %a
  846. STR_B %2, {regregrel, %1.reg1, %a}
  847. with regminrSreg GENREG
  848. kills address
  849. gen STR_B %2, {regminrSregrel, %1.reg1, %1.S, %1.sreg, %1.reg2}
  850. pat sti $1==2
  851. with GENREG GENREG
  852. kills address
  853. /*uses GENREG
  854. gen move {imS, %2, "LSR", 8}, %a
  855. SUB %2, %2, {imS, %a, "LSL", 8}
  856. STR_B %2, {regind, %1}
  857. STR_B %a, {regrel, %1, 1}
  858. */
  859. gen STR_B %2, {regind, %1}
  860. MOV %2, {imS, %2, "LSR", 8}
  861. STR_B %2, {regrel, %1, 1}
  862. /*with GENREG fitcon %2.num==0
  863. kills address
  864. gen STR_B %2, {regind, %1}
  865. STR_B %2, {regrel, %1, 1}
  866. */
  867. pat sti $1==4
  868. with GENREG GENREG
  869. kills address
  870. gen move %2, {regind, %1}
  871. with addr_local GENREG
  872. kills address
  873. gen move %2, {lb_local, %1.ind}
  874. with addr_external GENREG
  875. kills address
  876. gen move %2, {absolute, %1.add}
  877. with regconst GENREG
  878. kills address
  879. gen move %2, {regrel, %1.reg, %1.ind}
  880. with regplusreg GENREG
  881. kills address
  882. gen move %2, {regregrel, %1.reg1, %1.reg2}
  883. with regminreg GENREG
  884. kills address
  885. gen move %2, {regminregrel, %1.reg1, %1.reg2}
  886. with regplusiSreg GENREG
  887. kills address
  888. gen move %2, {regiSregrel, %1.reg1, %1.S, %1.shift, %1.reg2}
  889. with regminiSreg GENREG
  890. kills address
  891. gen move %2, {regminiSregrel, %1.reg1, %1.S, %1.shift, %1.reg2}
  892. with regplusrSreg GENREG
  893. kills address
  894. uses GENREG
  895. gen move {regS, %1.reg2, %1.S, %1.sreg}, %a
  896. STR %2, {regregrel, %1.reg1, %a}
  897. with regminrSreg GENREG
  898. kills address
  899. gen move %2, {regminrSregrel, %1.reg1, %1.S, %1.sreg, %1.reg2}
  900. pat sti defined($1) && legal($1)
  901. with GENREG STACK
  902. kills address
  903. uses GENREG={fitcon, $1}
  904. gen LABEL {label, "1:"}
  905. SUB_S %a, %a, {fitcon, 4}
  906. move {st_regregrel, SP, %a}, R11
  907. move R11, {regregrel, %1, %a}
  908. BGT {label,"1B"}
  909. ADD SP, SP, {fitcon, $1}
  910. pat sti defined($1)
  911. with GENREG STACK
  912. kills address
  913. uses GENREG={const4, $1}, GENREG
  914. gen move %a, %b
  915. LABEL {label, "1:"}
  916. SUB_S %a, %a, {fitcon, 4}
  917. move {st_regregrel, SP, %a}, R11
  918. move R11, {regregrel, %1, %a}
  919. BGT {label,"1B"}
  920. ADD SP, SP, %b
  921. pat sts
  922. with STACK
  923. kills ALL
  924. gen BAL_L {label, ".sts"}
  925. pat sdl
  926. with GENREG GENREG
  927. kills address-absolute
  928. gen move %1, {lb_local,$1}
  929. move %2, {lb_local,$1+4}
  930. pat sde
  931. with GENREG GENREG
  932. kills address
  933. gen move %1, {absolute, $1}
  934. move %2, {absolute, $1+4}
  935. pat sdf
  936. with GENREG GENREG GENREG
  937. kills address
  938. gen move %2, {regrel, %1, $1}
  939. move %3, {regrel, %1, $1+4}
  940. /************************************************************************
  941. * *
  942. * GROUP III : Integer Arithmetic *
  943. * *
  944. ************************************************************************/
  945. pat adi $1==4
  946. with GENREG constant yields {regconst, %1, %2.num}
  947. with constant GENREG yields {regconst, %2, %1.num}
  948. with GENREG GENREG yields {regplusreg, %1, %2}
  949. with GENREG imS yields {regplusiSreg,%1, %2.S,
  950. %2.shift, %2.reg}
  951. with imS GENREG yields {regplusiSreg,%2, %1.S,
  952. %1.shift, %1.reg}
  953. with GENREG regS yields {regplusrSreg,%1, %2.S,
  954. %2.sreg, %2.reg}
  955. with regS GENREG yields {regplusrSreg,%2, %1.S,
  956. %1.sreg, %1.reg}
  957. with exact addr_local constant yields {addr_local, %1.ind+%2.num}
  958. with exact constant addr_local yields {addr_local, %2.ind+%1.num}
  959. with exact addr_external constant yields {addr_external, %1.add+%2.num}
  960. with exact constant addr_external yields {addr_external, %2.add+%1.num}
  961. pat sbi $1==4
  962. with GENREG GENREG yields {regminreg, %2, %1}
  963. with imS GENREG yields {regminiSreg,%2,%1.S,
  964. %1.shift,%1.reg}
  965. with regS GENREG yields {regminrSreg,%2,%1.S,
  966. %1.sreg,%1.reg}
  967. with GENREG fitcon
  968. uses GENREG
  969. gen RSB %a, %1, %2 yields %a
  970. with fitcon GENREG
  971. gen SUB %2, %2, %1 yields %2
  972. with GENREG const4
  973. uses GENREG
  974. gen move %2, %a
  975. RSB %1, %1, %a yields %1
  976. with const4 GENREG
  977. uses GENREG
  978. gen move %1, %a
  979. SUB %a, %2, %a yields %a
  980. with GENREG REGcon
  981. uses GENREG
  982. gen RSB %a, %1, %2 yields %a
  983. /*with constant GENREG yields {regconst, %2, 0-%1.num}*/
  984. with exact constant addr_local yields {addr_local, %2.ind-%1.num}
  985. pat loc mli $1<0 && $2==4 leaving loc 0-$1
  986. mli 4
  987. ngi 4
  988. pat loc mli $1==2 && $2==4
  989. with GENREG yields {imS, %1, "LSL", 1}
  990. pat loc mli $1==4 && $2==4
  991. with GENREG yields {imS, %1, "LSL", 2}
  992. pat loc mli $1==8 && $2==4
  993. with GENREG yields {imS, %1, "LSL", 3}
  994. pat loc mli $1==16 && $2==4
  995. with GENREG yields {imS, %1, "LSL", 4}
  996. pat loc mli $1==32 && $2==4
  997. with GENREG yields {imS, %1, "LSL", 5}
  998. pat loc mli $1==3 && $2==4
  999. with GENREG yields {regplusiSreg,%1,"LSL",1,%1}
  1000. pat loc mli $1==5 && $2==4
  1001. with GENREG yields {regplusiSreg,%1,"LSL",2,%1}
  1002. pat loc mli $1==6 && $2==4
  1003. with GENREG
  1004. uses GENREG
  1005. gen MOV %a, {imS,%1,"LSL",2}
  1006. ADD %a, %a, {imS,%1,"LSL",1} yields %a
  1007. pat loc mli $1==7 && $2==4
  1008. with GENREG
  1009. uses GENREG
  1010. gen RSB %a, %1, {imS, %1, "LSL", 3} yields %a
  1011. pat loc mli $1==9 && $2==4
  1012. with GENREG yields {regplusiSreg,%1,"LSL",3,%1}
  1013. pat loc mli $1==10 && $2==4
  1014. with GENREG
  1015. uses GENREG
  1016. gen MOV %a,{imS, %1, "LSL", 1}
  1017. ADD %a, %a, {imS, %1, "LSL", 3} yields %a
  1018. pat loc mli $1==12 && $2==4
  1019. with GENREG
  1020. uses GENREG
  1021. gen move {imS, %1, "LSL", 3}, %a yields {regplusiSreg,%a,"LSR",1,%a}
  1022. pat mli $1==4
  1023. with STACK
  1024. kills ALL
  1025. gen BAL_L {label, ".mli"} yields R0
  1026. pat loc dvi $1<0 && $2==4 leaving loc 0-$1
  1027. dvi 4
  1028. pat dvi $1==4
  1029. with STACK
  1030. kills ALL
  1031. gen BAL_L {label, ".dvi"} yields R3
  1032. pat rmi $1==4
  1033. with STACK
  1034. kills ALL
  1035. gen BAL_L {label, ".dvi"} yields R2
  1036. pat ngi $1==4
  1037. with GENREG
  1038. uses GENREG
  1039. gen RSB %a, %1, {fitcon, 0} yields %a
  1040. pat sli $1==4
  1041. with fitcon GENREG yields {imS, %2, "LSL", %1.num}
  1042. with GENREG GENREG yields {regS, %2, "LSL", %1}
  1043. pat loc sri $1==0 && $2==4
  1044. with address+REGcon yields %1
  1045. pat sri $1==4
  1046. with fitcon GENREG yields {imS, %2, "ASR", %1.num}
  1047. with GENREG GENREG yields {regS, %2, "ASR", %1}
  1048. /************************************************************************
  1049. * *
  1050. * GROUP IV : Unsigned Arithmetic *
  1051. * *
  1052. ************************************************************************/
  1053. pat adu leaving adi $1
  1054. pat sbu leaving sbi $1
  1055. pat loc mlu $1<11 && $1>0 && $2==4 leaving loc $1
  1056. mli 4
  1057. pat mlu $1==4
  1058. with STACK
  1059. kills ALL
  1060. gen BAL_L {label, ".mlu"} yields R0
  1061. pat loc dvu $1<33 && $1>0 && $2==4 leaving loc $1
  1062. dvi 4
  1063. pat dvu $1==4
  1064. with STACK
  1065. kills ALL
  1066. gen BAL_L {label, ".dvu"} yields R3
  1067. pat rmu $1==4
  1068. with STACK
  1069. kills ALL
  1070. gen BAL_L {label, ".dvu"} yields R2
  1071. pat slu $1==4
  1072. with GENREG GENREG yields {regS, %2, "LSL", %1}
  1073. with const4+fitcon GENREG yields {imS, %2, "LSL", %1.num}
  1074. pat sru $1==4
  1075. with GENREG GENREG yields {regS, %2, "LSR", %1}
  1076. with const4+fitcon GENREG yields {imS, %2, "LSR", %1.num}
  1077. /************************************************************************
  1078. * *
  1079. * GROUP V : Floating Point Arithmetic *
  1080. * *
  1081. ************************************************************************/
  1082. pat adf $1==4 leaving cal ".adf4" asp 4
  1083. pat adf $1==8 leaving cal ".adf8" asp 8
  1084. pat sbf $1==4 leaving cal ".sbf4" asp 4
  1085. pat sbf $1==8 leaving cal ".sbf8" asp 8
  1086. pat mlf $1==4 leaving cal ".mlf4" asp 4
  1087. pat mlf $1==8 leaving cal ".mlf8" asp 8
  1088. pat dvf $1==4 leaving cal ".dvf4" asp 4
  1089. pat dvf $1==8 leaving cal ".dvf8" asp 8
  1090. pat ngf $1==4 leaving cal ".ngf4"
  1091. pat ngf $1==8 leaving cal ".ngf8"
  1092. pat fif $1==4 leaving lor 1 cal ".fif4" asp 4
  1093. pat fif $1==8 leaving lor 1 cal ".fif8" asp 4
  1094. pat fef $1==4 leaving lor 1 adp 0-4 cal ".fef4"
  1095. pat fef $1==8 leaving lor 1 adp 0-4 cal ".fef8"
  1096. /************************************************************************
  1097. * *
  1098. * GROUP VI : Pointer Arithmetic *
  1099. * *
  1100. ************************************************************************/
  1101. pat adp
  1102. with GENREG yields {regconst, %1, $1}
  1103. with exact addr_local yields {addr_local, %1.ind+$1}
  1104. with exact addr_external yields {addr_external, %1.add+$1}
  1105. with exact regconst yields {regconst, %1.reg, %1.ind+$1}
  1106. pat ads $1==4 leaving adi 4
  1107. pat sbs $1==4 leaving sbi 4
  1108. /************************************************************************
  1109. * *
  1110. * GROUP VII : Increment/Decrement/Zero *
  1111. * *
  1112. ************************************************************************/
  1113. pat inc
  1114. with GENREG yields {regconst, %1, 1}
  1115. with exact regconst yields {regconst, %1.reg, %1.ind+1}
  1116. pat inl
  1117. kills address-absolute
  1118. uses GENREG={lb_local,$1}
  1119. gen ADD %a,%a,{fitcon,1}
  1120. move %a,{lb_local,$1}
  1121. pat ine
  1122. kills address
  1123. uses GENREG={absolute,$1}
  1124. gen ADD %a,%a,{fitcon,1}
  1125. move %a,{absolute,$1}
  1126. pat dec
  1127. with GENREG yields {regconst, %1, 0-1}
  1128. /*gen SUB %a, %1, {fitcon, 1}*/
  1129. with exact regconst yields {regconst, %1.reg, %1.ind-1}
  1130. pat del
  1131. kills address-absolute
  1132. uses GENREG={lb_local,$1}
  1133. gen SUB %a,%a,{fitcon,1}
  1134. move %a,{lb_local,$1}
  1135. pat dee
  1136. kills address
  1137. uses GENREG={absolute,$1}
  1138. gen SUB %a,%a,{fitcon,1}
  1139. move %a,{absolute,$1}
  1140. pat zrl
  1141. kills address-absolute
  1142. uses GENREG={fitcon,0}
  1143. gen move %a,{lb_local,$1}
  1144. pat zre
  1145. kills address
  1146. uses GENREG={fitcon,0}
  1147. gen move %a,{absolute,$1}
  1148. pat zrf leaving zer $1
  1149. pat zer $1==4 yields {fitcon,0}
  1150. pat zer $1==8 yields {fitcon,0} {fitcon,0}
  1151. pat zer $1==12 yields {fitcon,0} {fitcon,0} {fitcon,0}
  1152. pat zer defined($1)
  1153. with STACK
  1154. kills ALL
  1155. uses GENREG={fitcon,0},GENREG={const4,$1}
  1156. gen LABEL {label, "1:"}
  1157. STMFD {autoid, SP}, {reglist1, %a}
  1158. SUB_S %b,%b,{fitcon,4}
  1159. BNE {label,"1B"}
  1160. /************************************************************************
  1161. * *
  1162. * GROUP VIII : Convert *
  1163. * *
  1164. ************************************************************************/
  1165. /* sign extension short -> integer */
  1166. pat loc loc cii $1==2 && $2==4
  1167. with GENREG
  1168. uses GENREG
  1169. gen MOV %a, {imS, %1, "LSL", 16}
  1170. MOV %a, {imS, %a, "ASR", 16} yields %a
  1171. /* sign extension byte -> integer */
  1172. pat loc loc cii $1==1 && $2==4
  1173. with GENREG
  1174. uses GENREG
  1175. gen MOV %a, {imS, %1, "LSL", 24}
  1176. MOV %a, {imS, %a, "ASR", 24} yields %a
  1177. pat loc loc cii ($1 > 2)
  1178. pat cui
  1179. with address +REGcon address + REGcon
  1180. pat loc loc cif $1==4 && $2==4 leaving loc 4 cal ".cif4" asp 4
  1181. pat loc loc cif $1==4 && $2==8 leaving loc 4 cal ".cif8"
  1182. pat loc loc cuf $1==4 && $2==4 leaving loc 4 cal ".cuf4" asp 4
  1183. pat loc loc cuf $1==4 && $2==8 leaving loc 4 cal ".cuf8"
  1184. pat loc loc cfi leaving loc $1 loc $2 cal ".cfi" asp 8+($1-4)
  1185. pat loc loc cfu leaving loc $1 loc $2 cal ".cfu" asp 8+($1-4)
  1186. pat loc loc cff $1==8 && $2==4 leaving cal ".cff4" asp 4
  1187. /* this one expects a 4 byte hole on the stack */
  1188. pat loc loc cff $1==4 && $2==8 leaving dup 4 cal ".cff8"
  1189. pat ciu
  1190. with address +REGcon address + REGcon
  1191. pat cuu
  1192. with address +REGcon address + REGcon
  1193. /************************************************************************
  1194. * *
  1195. * GROUP IX : Logical *
  1196. * *
  1197. ************************************************************************/
  1198. pat and $1==4
  1199. with REGcon GENREG
  1200. uses GENREG
  1201. gen AND %a, %2, %1 yields %a
  1202. with GENREG REGcon
  1203. uses GENREG
  1204. gen AND %a, %1, %2 yields %a
  1205. pat ior $1==4
  1206. with REGcon GENREG
  1207. uses GENREG
  1208. gen ORR %a, %2, %1 yields %a
  1209. with GENREG REGcon
  1210. uses GENREG
  1211. gen ORR %a, %1, %2 yields %a
  1212. pat xor $1==4
  1213. with REGcon GENREG
  1214. uses GENREG
  1215. gen EOR %a, %2, %1 yields %a
  1216. with GENREG REGcon
  1217. uses GENREG
  1218. gen EOR %a, %1, %2 yields %a
  1219. pat com $1==4
  1220. with REGcon
  1221. uses GENREG
  1222. gen MVN %a,%1 yields %a
  1223. pat ror $1==4
  1224. with constant GENREG yields {imS, %2, "ROR", %1.num}
  1225. with GENREG GENREG yields {regS, %2, "ROR", %1}
  1226. pat rol $1==4
  1227. with constant GENREG yields {imS, %2, "ROR", 32-%1.num}
  1228. with GENREG GENREG
  1229. uses GENREG
  1230. gen RSB %a, %1, {fitcon,32} yields {regS, %2, "ROR", %a}
  1231. pat and $1>4
  1232. with STACK
  1233. kills ALL
  1234. uses GENREG,GENREG,GENREG,GENREG
  1235. gen move {const4,$1}, %b
  1236. move SP, %a
  1237. ADD SP, SP, %b
  1238. LABEL {label, "1:"}
  1239. SUB_S %b, %b, {fitcon, 4}
  1240. move {st_regregrel, SP,%b}, %c
  1241. move {regregrel, %a, %b}, %d
  1242. AND %c, %c, %d
  1243. move %c, {st_regregrel, SP, %b}
  1244. BNE {label, "1B"}
  1245. pat ior $1>4
  1246. with STACK
  1247. kills ALL
  1248. uses GENREG,GENREG,GENREG,GENREG
  1249. gen move {const4,$1}, %b
  1250. move SP, %a
  1251. ADD SP, SP, %b
  1252. LABEL {label, "1:"}
  1253. SUB_S %b, %b, {fitcon, 4}
  1254. move {st_regregrel, SP,%b}, %c
  1255. move {regregrel, %a, %b}, %d
  1256. ORR %c, %c, %d
  1257. move %c, {st_regregrel, SP, %b}
  1258. BNE {label, "1B"}
  1259. pat ior !defined($1)
  1260. with STACK
  1261. kills ALL
  1262. uses GENREG,GENREG,GENREG,GENREG
  1263. gen LDMFD {autoid, SP}, {reglist1, %b}
  1264. move SP, %a
  1265. ADD SP, SP, %b
  1266. LABEL {label, "1:"}
  1267. SUB_S %b, %b, {fitcon, 4}
  1268. move {st_regregrel, SP, %b}, %c
  1269. move {regregrel, %a, %b}, %d
  1270. ORR %c, %c, %d
  1271. move %c, {st_regregrel, SP, %b}
  1272. BNE {label, "1B"}
  1273. pat xor $1>4
  1274. with STACK
  1275. kills ALL
  1276. uses GENREG,GENREG,GENREG,GENREG
  1277. gen move {const4,$1}, %b
  1278. move SP, %a
  1279. ADD SP, SP, %b
  1280. LABEL {label, "1:"}
  1281. SUB_S %b, %b, {fitcon, 4}
  1282. move {st_regregrel, SP,%b}, %c
  1283. move {regregrel, %a, %b}, %d
  1284. EOR %c, %c, %d
  1285. move %c, {st_regregrel, SP, %b}
  1286. BNE {label, "1B"}
  1287. pat com $1>4
  1288. with STACK
  1289. kills ALL
  1290. uses GENREG,GENREG,GENREG
  1291. gen move {const4,$1}, %b
  1292. LABEL {label, "1:"}
  1293. SUB_S %b, %b, {fitcon, 4}
  1294. move {st_regregrel, SP, %b}, %c
  1295. MVN %c, %c
  1296. move %c, {st_regregrel, SP, %b}
  1297. BNE {label, "1B"}
  1298. /************************************************************************
  1299. * *
  1300. * GROUP X: Sets *
  1301. * *
  1302. ************************************************************************/
  1303. pat loc loc inn !defined($3) leaving loc $1 inn $2
  1304. pat loc inn $2==4 && $1>=0 && $1<32
  1305. with GENREG
  1306. uses GENREG={fitcon,1},GENREG
  1307. gen AND %b, %1, {imS,%a,"LSL",$1} yields %b
  1308. pat loc inn $2==4 && $1<0
  1309. with GENREG
  1310. gen move {fitcon,0}, %1 yields %1
  1311. pat loc inn $2==4 && $1>31 leaving loc 2 trp
  1312. pat loc inn !defined($2) leaving inn $1
  1313. pat inn defined($1)
  1314. with GENREG STACK
  1315. uses GENREG={fitcon,1}, GENREG, GENREG
  1316. gen AND %b, %1, {fitcon, 31}
  1317. move {regS, %a, "LSL", %b}, %b
  1318. move {imS, %1, "LSR", 5}, %1
  1319. move {st_regiSregrel, SP, "LSL", 2, %1}, %c
  1320. AND_S %b, %b, %c
  1321. MOV_NE %b, {fitcon, 1}
  1322. ADD SP, SP, {const4, $1} yields %b
  1323. pat inn !defined($1)
  1324. with GENREG GENREG STACK
  1325. uses GENREG={fitcon,1}, GENREG, GENREG
  1326. gen AND %b, %2, {fitcon, 31}
  1327. move {regS, %a, "LSL", %b}, %b
  1328. move {imS, %2, "LSR", 5}, %2
  1329. move {st_regiSregrel, SP, "LSL", 2, %2}, %c
  1330. AND_S %b, %b, %c
  1331. MOV_NE %b, {fitcon, 1}
  1332. ADD SP, SP, %1 yields %b
  1333. pat loc set !defined($2) leaving set $1
  1334. pat set $1==4
  1335. with const4
  1336. uses GENREG={fitcon,1} yields {imS,%a,"LSL",%1.num}
  1337. with GENREG
  1338. uses GENREG={fitcon,1} yields {regS,%a,"LSL",%1}
  1339. pat set $1>4
  1340. with GENREG STACK
  1341. uses GENREG={fitcon,1}, GENREG={fitcon,0}, GENREG={const4,$1}
  1342. gen LABEL {label, "2:"}
  1343. STMFD {autoid, SP}, {reglist1, %b}
  1344. SUB_S %c, %c, {fitcon,4}
  1345. BGT {label, "2B"}
  1346. CMP %1, {fitcon, 0}
  1347. BMI {label, "1F"}
  1348. AND %b, %1, {fitcon, 31}
  1349. move {regS, %a, "LSL", %b}, %b
  1350. move {imS, %1, "LSR", 5}, %1
  1351. move %b, {st_regiSregrel, SP, "LSL", 2, %1}
  1352. LABEL {label, "1:"}
  1353. pat set !defined($1)
  1354. with STACK
  1355. kills ALL
  1356. uses GENREG={fitcon,1}, GENREG={fitcon,0}, GENREG, GENREG
  1357. gen LDMFD {autoid, SP}, {reglist1, %c}
  1358. LDMFD {autoid, SP}, {reglist1, %d}
  1359. LABEL {label, "2:"}
  1360. STMFD {autoid, SP}, {reglist1, %b}
  1361. SUB_S %c, %c, {fitcon,4}
  1362. BGT {label, "2B"}
  1363. CMP %d, {fitcon, 0}
  1364. BMI {label, "1F"}
  1365. AND %b, %d, {fitcon, 31}
  1366. move {regS, %a, "LSL", %b}, %b
  1367. move {imS, %d, "LSR", 5}, %d
  1368. move %b, {st_regiSregrel, SP, "LSL", 2, %d}
  1369. LABEL {label, "1:"}
  1370. /************************************************************************
  1371. * *
  1372. * GROUP XI : Array Instructions *
  1373. * *
  1374. ************************************************************************/
  1375. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)==0 leaving adi 4
  1376. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)>0 && legal(rom($1,1))
  1377. with GENREG
  1378. uses GENREG
  1379. gen SUB %a,%1,{fitcon,rom($1,1)} yields %a
  1380. leaving adi 4
  1381. with exact regconst yields {regconst, %1.reg,
  1382. %1.ind-rom($1,1)}
  1383. leaving adi 4
  1384. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)!=0
  1385. with GENREG
  1386. uses GENREG={const4, 0-rom($1,1)}
  1387. gen ADD %a,%1,%a yields %a
  1388. leaving adi 4
  1389. with exact regconst yields {regconst, %1.reg,
  1390. %1.ind-rom($1,1)}
  1391. leaving adi 4
  1392. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)==0
  1393. with GENREG yields {imS, %1,"LSL", 2}
  1394. leaving adi 4
  1395. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)>0 && legal(rom($1,1))
  1396. with GENREG
  1397. uses GENREG
  1398. gen SUB %a,%1,{fitcon, rom($1,1)} yields {imS, %a,"LSL", 2}
  1399. leaving adi 4
  1400. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)!=0
  1401. with GENREG
  1402. uses GENREG={const4, 0-rom($1,1)}
  1403. gen ADD %a,%1,%a yields {imS, %a,"LSL", 2}
  1404. leaving adi 4
  1405. pat lae aar $2==4 && rom($1,1)==0
  1406. leaving loc rom($1,3)
  1407. mli 4 adi 4
  1408. pat lae aar $2==4 && rom($1,1)>0 && legal(rom($1,1))
  1409. with GENREG
  1410. uses GENREG
  1411. gen SUB %a,%1,{fitcon,rom($1,1)} yields %a
  1412. leaving loc rom($1,3)
  1413. mli 4 adi 4
  1414. pat lae aar $2==4 && rom($1,1)!=0
  1415. with GENREG
  1416. uses GENREG={const4, 0-rom($1,1)}
  1417. gen ADD %a,%1,%a yields %a
  1418. leaving loc rom($1,3)
  1419. mli 4 adi 4
  1420. pat aar $1==4
  1421. with GENREG GENREG
  1422. uses GENREG
  1423. gen move {regind, %1}, %a
  1424. SUB %2, %2, %a yields %2 {regrel, %1, 8}
  1425. leaving mli 4 adi 4
  1426. pat lae sar $2==4 && defined(rom($1,3)) leaving lae $1 aar 4
  1427. sti rom($1,3)
  1428. pat lae lar $2==4 && defined(rom($1,3)) leaving lae $1 aar 4
  1429. loi rom($1,3)
  1430. pat loc aar !defined($2) leaving aar $1
  1431. pat lae loc sar !defined($3) && $2==4 && defined(rom($1,3))
  1432. leaving lae $1 aar 4
  1433. sti rom($1,3)
  1434. pat lae loc lar !defined($3) && $2==4 && defined(rom($1,3))
  1435. leaving lae $1 aar 4
  1436. loi rom($1,3)
  1437. /* next two: dynamic arrays in modula2 - not tested */
  1438. pat lal sar $2==4 leaving lal $1 aar 4 lal $1 adp 8 loi 4 sts
  1439. pat lal lar $2==4 leaving lal $1 aar 4 lal $1 adp 8 loi 4 los
  1440. /************************************************************************
  1441. * *
  1442. * GROUP XII : Compare Instructions *
  1443. * *
  1444. ************************************************************************/
  1445. pat cmi
  1446. with GENREG REGcon
  1447. uses reusing %1, GENREG=%1
  1448. gen RSB_S %a, %1, %2 yields %a
  1449. with REGcon GENREG
  1450. uses reusing %2, GENREG=%2
  1451. gen SUB_S %a, %2, %1 yields %a
  1452. pat cmu $1==4
  1453. with GENREG REGcon
  1454. uses GENREG
  1455. gen CMP %1, %2
  1456. MOV_HI %a, {fitcon, 0-1}
  1457. MOV_LS %a, {fitcon, 1}
  1458. MOV_EQ %a, {fitcon, 0} yields %a
  1459. with REGcon GENREG
  1460. uses GENREG
  1461. gen CMP %2, %1
  1462. MOV_HI %a, {fitcon, 1}
  1463. MOV_LS %a, {fitcon, 0-1}
  1464. MOV_EQ %a, {fitcon, 0} yields %a
  1465. pat cmp leaving cmu 4
  1466. pat cmf $1==4 leaving cal ".cmf4" asp 8 lfr 4
  1467. pat cmf $1==8 leaving cal ".cmf8" asp 16 lfr 4
  1468. pat loc cms !defined($2) leaving cms $1
  1469. pat cms $1==4
  1470. with GENREG REGcon
  1471. gen EOR_S %1, %1, %2 yields %1
  1472. with REGcon GENREG
  1473. gen EOR_S %2, %2, %1 yields %2
  1474. pat cms $1!=4
  1475. with STACK
  1476. kills ALL
  1477. uses GENREG = {const4, $1}, GENREG, GENREG, GENREG, GENREG
  1478. gen move %a, %e
  1479. ADD %b, %a, SP
  1480. LABEL {label, "1:"}
  1481. SUB_S %a, %a, {fitcon, 4}
  1482. BLT {label, "2F"}
  1483. move {st_regregrel, SP, %a}, %c
  1484. move {regregrel, %b, %a}, %d
  1485. EOR_S %c, %c, %d
  1486. BEQ {label, "1B"}
  1487. LABEL {label, "2:"}
  1488. ADD SP, %b, %e yields %c
  1489. pat cms !defined($1)
  1490. with GENREG STACK
  1491. uses GENREG, GENREG, GENREG, GENREG
  1492. gen move %1, %d
  1493. ADD %a, %1, SP
  1494. LABEL {label, "1:"}
  1495. SUB_S %1, %1, {fitcon, 4}
  1496. BLT {label, "2F"}
  1497. move {st_regregrel, SP, %1}, %b
  1498. move {regregrel, %a, %1}, %c
  1499. EOR_S %b, %b, %c
  1500. BEQ {label, "1B"}
  1501. LABEL {label, "2:"}
  1502. ADD SP, %a, %d yields %b
  1503. pat tlt
  1504. with GENREG
  1505. uses reusing %1, GENREG=%1
  1506. gen test %1
  1507. MOV_LT %a, {fitcon,1}
  1508. MOV_GE %a, {fitcon,0} yields %a
  1509. pat tle
  1510. with GENREG
  1511. uses reusing %1, GENREG=%1
  1512. gen test %1
  1513. MOV_LE %a, {fitcon,1}
  1514. MOV_GT %a, {fitcon,0} yields %a
  1515. pat teq
  1516. with GENREG
  1517. uses reusing %1, GENREG=%1
  1518. gen test %1
  1519. MOV_EQ %a, {fitcon,1}
  1520. MOV_NE %a, {fitcon,0} yields %a
  1521. pat tne
  1522. with GENREG
  1523. uses reusing %1, GENREG=%1
  1524. gen test %1
  1525. MOV_NE %a, {fitcon,1}
  1526. MOV_EQ %a, {fitcon,0} yields %a
  1527. pat tge
  1528. with GENREG
  1529. uses reusing %1, GENREG=%1
  1530. gen test %1
  1531. MOV_GE %a, {fitcon,1}
  1532. MOV_LT %a, {fitcon,0} yields %a
  1533. pat tgt
  1534. with GENREG
  1535. uses reusing %1, GENREG=%1
  1536. gen test %1
  1537. MOV_GT %a, {fitcon,1}
  1538. MOV_LE %a, {fitcon,0} yields %a
  1539. /************************************************************************
  1540. * *
  1541. * GROUP XIII : Branch Instructions *
  1542. * *
  1543. ************************************************************************/
  1544. pat bra
  1545. with STACK
  1546. kills ALL
  1547. gen BAL {label, $1}
  1548. pat bne
  1549. with REGcon GENREG STACK
  1550. gen CMP %2, %1
  1551. BNE {label, $1}
  1552. with GENREG REGcon STACK
  1553. gen CMP %1, %2
  1554. BNE {label, $1}
  1555. pat beq
  1556. with REGcon GENREG STACK
  1557. gen CMP %2, %1
  1558. BEQ {label, $1}
  1559. with GENREG REGcon STACK
  1560. gen CMP %1, %2
  1561. BEQ {label, $1}
  1562. pat blt
  1563. with REGcon GENREG STACK
  1564. gen CMP %2, %1
  1565. BLT {label, $1}
  1566. pat ble
  1567. with REGcon GENREG STACK
  1568. gen CMP %2, %1
  1569. BLE {label, $1}
  1570. pat bgt
  1571. with REGcon GENREG STACK
  1572. gen CMP %2, %1
  1573. BGT {label, $1}
  1574. pat bge
  1575. with REGcon GENREG STACK
  1576. gen CMP %2, %1
  1577. BGE {label, $1}
  1578. pat zlt
  1579. with GENREG STACK
  1580. gen test %1
  1581. BLT {label, $1}
  1582. pat zle
  1583. with GENREG STACK
  1584. gen test %1
  1585. BLE {label, $1}
  1586. pat zeq
  1587. with GENREG STACK
  1588. gen test %1
  1589. BEQ {label, $1}
  1590. pat zne
  1591. with GENREG STACK
  1592. gen test %1
  1593. BNE {label, $1}
  1594. pat zge
  1595. with GENREG STACK
  1596. gen test %1
  1597. BGE {label, $1}
  1598. pat zgt
  1599. with GENREG STACK
  1600. gen test %1
  1601. BGT {label, $1}
  1602. /************************************************************************
  1603. * *
  1604. * GROUP XIV : Procedure Call *
  1605. * *
  1606. ************************************************************************/
  1607. pat cal
  1608. with STACK
  1609. kills ALL
  1610. gen BAL_L {label, $1}
  1611. pat cai
  1612. with GENREG STACK
  1613. kills ALL
  1614. gen /* the trick is to set up R14 properly */
  1615. ADR LR, {label, "1F"}
  1616. MOV PC, %1
  1617. LABEL {label, "1:"}
  1618. pat lfr $1==4 yields R0
  1619. pat lfr $1==8 yields R1 R0
  1620. pat lfr $1==12 yields R2 R1 R0
  1621. pat ret $1==0
  1622. with STACK
  1623. kills ALL
  1624. gen return
  1625. MOV SP, LB
  1626. LDMFD {autoid, SP}, {lb_pc_reglist2, LB, PC}
  1627. pat ret $1==4
  1628. with address STACK
  1629. kills ALL
  1630. gen move %1, R0
  1631. return
  1632. move LB, SP
  1633. LDMFD {autoid, SP}, {lb_pc_reglist2, LB, PC}
  1634. with REGcon STACK
  1635. kills ALL
  1636. gen move %1, R0
  1637. return
  1638. move LB, SP
  1639. LDMFD {autoid, SP}, {lb_pc_reglist2, LB, PC}
  1640. pat ret $1==8
  1641. with REGcon REGcon STACK
  1642. kills ALL
  1643. gen move %1, R0
  1644. move %2, R1
  1645. return
  1646. move LB, SP
  1647. LDMFD {autoid, SP}, {lb_pc_reglist2, LB, PC}
  1648. pat ret $1==12
  1649. with REGcon REGcon REGcon STACK
  1650. kills ALL
  1651. gen move %1, R0
  1652. move %2, R1
  1653. move %3, R2
  1654. return
  1655. move LB, SP
  1656. LDMFD {autoid, SP}, {lb_pc_reglist2, LB, PC}
  1657. /************************************************************************
  1658. * *
  1659. * GROUP XV : Miscellaneous *
  1660. * *
  1661. ************************************************************************/
  1662. pat asp legal($1)
  1663. with STACK
  1664. kills ALL
  1665. gen ADD SP, SP, {fitcon, $1}
  1666. pat asp
  1667. with STACK
  1668. kills ALL
  1669. uses GENREG={const4, $1}
  1670. gen ADD SP, SP, %a
  1671. pat ass $1==4
  1672. with REGcon STACK
  1673. gen ADD SP, SP, %1
  1674. pat blm $1==0
  1675. with address+REGcon address+REGcon
  1676. pat blm $1==1
  1677. with GENREG GENREG
  1678. kills address
  1679. uses GENREG
  1680. gen LDR_B %a, {regind, %2}
  1681. STR_B %a, {regind, %1}
  1682. pat blm $1==4
  1683. with GENREG GENREG
  1684. kills address
  1685. uses GENREG
  1686. gen move {regind, %2}, %a
  1687. move %a, {regind, %1}
  1688. pat blm $1>4
  1689. with GENREG GENREG
  1690. kills address
  1691. uses GENREG, GENREG={const4, $1-4}
  1692. gen LABEL {label, "1:"}
  1693. move {regregrel, %2, %b}, %a
  1694. move %a, {regregrel, %1, %b}
  1695. SUB_S %b, %b, {fitcon, 4}
  1696. BGE {label,"1B"}
  1697. pat bls $1==4
  1698. with GENREG GENREG GENREG
  1699. kills address
  1700. uses GENREG
  1701. gen LABEL {label, "1:"}
  1702. SUB_S %1, %1, {fitcon, 4}
  1703. move {regregrel, %3, %1}, %a
  1704. move %a, {regregrel, %2, %1}
  1705. BGT {label,"1B"}
  1706. pat csa $1==4
  1707. with STACK
  1708. kills ALL
  1709. gen BAL_L {label, "_Csa"}
  1710. move R2, PC
  1711. pat csb $1==4
  1712. with STACK
  1713. kills ALL
  1714. gen BAL_L {label, "_Csb"}
  1715. move R3, PC
  1716. pat dch leaving loi 4
  1717. pat dup $1==4
  1718. with address+REGcon yields %1 %1
  1719. pat dup $1==8
  1720. with address+REGcon address+REGcon yields %2 %1 %2 %1
  1721. pat dup $1>8
  1722. with STACK
  1723. kills ALL
  1724. uses GENREG={const4,$1}, GENREG
  1725. gen LABEL {label, "1:"}
  1726. move {st_regrel, SP, $1-4}, %b
  1727. STMFD {autoid, SP}, {reglist1, %b}
  1728. SUB_S %a, %a, {fitcon, 4}
  1729. BGT {label, "1B"}
  1730. pat dus
  1731. with GENREG STACK
  1732. uses GENREG, GENREG
  1733. gen SUB %b, %1, {fitcon, 4}
  1734. LABEL {label, "1:"}
  1735. move {st_regregrel, SP, %b}, %a
  1736. STMFD {autoid, SP}, {reglist1, %a}
  1737. SUB_S %1, %1, {fitcon, 4}
  1738. BGT {label, "1B"}
  1739. pat exg $1==4
  1740. with address+REGcon address+REGcon yields %1 %2
  1741. pat exg $1==8
  1742. with address+REGcon address+REGcon
  1743. address+REGcon address+REGcon yields %2 %1 %4 %3
  1744. pat exg $1>8
  1745. with STACK
  1746. kills ALL
  1747. uses GENREG, GENREG, GENREG={const4, $1-4}, GENREG, GENREG={const4, $1}
  1748. gen ADD %d, SP, %e
  1749. LABEL {label, "1:"}
  1750. move {st_regregrel, SP,%c}, %a
  1751. move {regregrel,%d,%c}, %b
  1752. move %a, {regregrel,%d,%c}
  1753. move %b, {st_regregrel, SP,%c}
  1754. SUB_S %c, %c, {fitcon, 4}
  1755. BGE {label, "1B"}
  1756. pat fil
  1757. uses GENREG
  1758. gen move {addr_external,$1}, %a
  1759. move %a, {addr_external, "_Filna"}
  1760. pat gto /* this code does NOT restore registers */
  1761. uses GENREG,GENREG,GENREG,GENREG
  1762. gen move {addr_external, $1}, %d
  1763. move {regind, %d}, %a
  1764. move {regrel, %d, 4}, %b
  1765. move {regrel, %d, 8}, %c
  1766. MOV LB, %c
  1767. MOV SP, %b
  1768. MOV PC, %a
  1769. pat lin
  1770. kills address
  1771. uses GENREG={const4,$1}
  1772. gen move %a,{addr_external,"_Lineno"}
  1773. pat lni
  1774. kills address
  1775. uses GENREG
  1776. gen move {addr_external,"_Lineno"}, %a
  1777. LDR %a, {regind, %a}
  1778. ADD %a,%a,{fitcon,1}
  1779. move %a,{addr_external,"_Lineno"}
  1780. pat lor $1==0 yields LB
  1781. pat lor $1==1
  1782. with STACK
  1783. kills ALL yields SP
  1784. pat lor $1==2 yields {absolute, "_RegHp"}
  1785. pat lpb leaving adp 8
  1786. pat nop
  1787. kills ALL
  1788. gen MOV_NV R0,R0
  1789. pat rck
  1790. with GENREG REGcon STACK
  1791. uses GENREG,GENREG
  1792. gen move {regind, %1}, %a
  1793. /* for some reason, the code generator expects the value
  1794. * to be checked on top of the stack after checking, while
  1795. * in fact it is held in %2. This causes mayhem later on, and
  1796. * the following two lines rectify this.
  1797. */
  1798. move %2,%b
  1799. STMFD {autoid, SP}, {reglist1, %b}
  1800. CMP %a, %2
  1801. BGT {label, "_RckTrap"}
  1802. move {regrel, %1, 4}, %a
  1803. CMP %a, %2
  1804. BLT {label, "_RckTrap"}
  1805. pat lim
  1806. with STACK
  1807. kills ALL
  1808. uses GENREG
  1809. gen move {addr_external, "_IgnoreMask"}, %a
  1810. STMFD {autoid, SP}, {reglist1, %a}
  1811. pat mon
  1812. with STACK
  1813. kills ALL
  1814. gen BAL_L {label, "_EmMon"}
  1815. pat rtt
  1816. leaving ret 0
  1817. pat sig
  1818. with STACK
  1819. kills ALL
  1820. uses GENREG,GENREG
  1821. gen move {addr_external, "_TrpReg"}, %a
  1822. LDR %a, {regind, %a}
  1823. LDMFD {autoid, SP}, {reglist1, %b}
  1824. move %b, {addr_external, "_TrpReg"}
  1825. STMFD {autoid, SP}, {reglist1, %a}
  1826. pat sim
  1827. with STACK
  1828. kills ALL
  1829. uses GENREG
  1830. gen LDMFD {autoid, SP}, {reglist1, %a}
  1831. move %a, {addr_external, "_IgnoreMask"}
  1832. pat trp
  1833. with STACK
  1834. kills ALL
  1835. gen BAL_L {label, "_EmTrp"}
  1836. pat str $1==0
  1837. with address
  1838. gen move %1, LB
  1839. with REGcon
  1840. gen move %1, LB
  1841. pat str $1==1
  1842. with address
  1843. gen MOV SP, %1
  1844. with REGcon
  1845. gen MOV SP, %1
  1846. pat str $1==2
  1847. with GENREG
  1848. gen move %1, {absolute, "_RegHp"}
  1849. /***********************************************************************/
  1850. /* code for *p++ and *p-- (integers)*/
  1851. pat lol dup adp stl loi $1==$4 && $2==4 && $5==4
  1852. kills GENREG
  1853. uses GENREG, GENREG
  1854. gen move {lb_local, $1}, %a
  1855. LDR %b, {regrelpi, %a, $5}
  1856. STR %a, {lb_local, $1} yields %b
  1857. pat lol dup adp stl sti $1==$4 && $2==4 && $5==4
  1858. with GENREG
  1859. kills GENREG
  1860. uses GENREG
  1861. gen move {lb_local,$1}, %a
  1862. STR %1, {regrelpi, %a, $5}
  1863. STR %a, {lb_local, $1}
  1864. /* code for *p++ and *p-- (bytes)*/
  1865. pat lol dup adp stl loi $1==$4 && $2==4 && $5==1
  1866. kills GENREG
  1867. uses GENREG, GENREG
  1868. gen move {lb_local, $1}, %a
  1869. LDR_B %b, {regrelpi, %a, $5}
  1870. STR %a, {lb_local, $1} yields %b
  1871. pat lol dup adp stl sti $1==$4 && $2==4 && $5==1
  1872. with GENREG
  1873. kills GENREG
  1874. uses GENREG
  1875. gen move {lb_local,$1}, %a
  1876. STR_B %1, {regrelpi, %a, $5}
  1877. STR %a, {lb_local, $1}
  1878. /* code for *pp->p++ and *pp->p-- (integers)*/
  1879. pat lil dup adp sil loi $1==$4 && $2==4 && $5==4
  1880. kills GENREG
  1881. uses GENREG, GENREG, GENREG
  1882. gen move {lb_local, $1}, %a
  1883. LDR %b, {regind, %a}
  1884. ADD %c, %b, {fitcon, $5}
  1885. STR %c, {regind, %a}
  1886. LDR %c, {regind, %b} yields %c
  1887. pat lil dup adp sil sti $1==$4 && $2==4 && $5==4
  1888. with GENREG
  1889. kills GENREG
  1890. uses GENREG, GENREG, GENREG
  1891. gen move {lb_local, $1}, %a
  1892. LDR %b, {regind, %a}
  1893. ADD %c, %b, {fitcon, $5}
  1894. STR %c, {regind, %a}
  1895. STR %1, {regind, %b}
  1896. /* code for *pp->p++ and *pp->p-- (bytes)*/
  1897. pat lil dup adp sil loi $1==$4 && $2==4 && $5==1
  1898. kills GENREG
  1899. uses GENREG, GENREG, GENREG
  1900. gen move {lb_local, $1}, %a
  1901. LDR %b, {regind, %a}
  1902. ADD %c, %b, {fitcon, $5}
  1903. STR %c, {regind, %a}
  1904. LDR_B %c, {regind, %b} yields %c
  1905. pat lil dup adp sil sti $1==$4 && $2==4 && $5==1
  1906. with GENREG
  1907. kills GENREG
  1908. uses GENREG, GENREG, GENREG
  1909. gen move {lb_local, $1}, %a
  1910. LDR %b, {regind, %a}
  1911. ADD %c, %b, {fitcon, $5}
  1912. STR %c, {regind, %a}
  1913. STR_B %1, {regind, %b}
  1914. /* global array access of the form x[y-1] */
  1915. pat lol loc mli loc sbi $2==$4 && $3==4 && $5==4
  1916. leaving lol $1 dec 4 loc $2 mli 4
  1917. /* x[i] = y with large array elements */
  1918. pat lae loi lae lol loc mli ads sti $2==$8 && $2 > 4
  1919. leaving lae $1 lae $3 lol $4 loc $5 mli $6 ads $7 blm $8
  1920. pat lae loi lae lol loc mlu ads sti $2==$8 && $2 > 4
  1921. leaving lae $1 lae $3 lol $4 loc $5 mlu $6 ads $7 blm $8
  1922. /* prevent double push/pull of $1 */
  1923. pat lae lol loc mli ads
  1924. leaving lol $2 loc $3 mli $4 lae $1 ads $5
  1925. pat lae lol loc mlu ads
  1926. leaving lol $2 loc $3 mlu $4 lae $1 ads $5
  1927. pat lae lol loc mli ads lol loc mli ads $5==$9 && $4==$8
  1928. leaving lol $2 loc $3 mli $4 lol $6 loc $7 mli $8 ads $5 lae $1 ads $9
  1929. pat lae lol loc mlu ads lol loc mlu ads $5==$9 && $4==$8
  1930. leaving lol $2 loc $3 mlu $4 lol $6 loc $7 mlu $8 ads $5 lae $1 ads $9
  1931. pat lae lol adp loi loc mli ads
  1932. leaving lol $2 adp $3 loi $4 loc $5 mli $6 lae $1 ads $7
  1933. pat lae lol adp loi loc mlu ads
  1934. leaving lol $2 adp $3 loi $4 loc $5 mlu $6 lae $1 ads $7
  1935. /*
  1936. pat lae loi lae lol adp loi loc mli ads sti $2==$10 && $2 > 4
  1937. leaving lae $1 lae $3 lol $4 adp $5 loi $6 loc $7 mli $8 ads $9 blm $2
  1938. pat lae loi lae lol adp loi loc mlu ads sti $2==$10 && $2 > 4
  1939. leaving lae $1 lae $3 lol $4 adp $5 loi $6 loc $7 mlu $8 ads $9 blm $2
  1940. */