lpc1754.bak 4.1 KB

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  1. EESchema-LIBRARY Version 2.3 Date: Sun 07 Feb 2010 10:34:56 PM CET
  2. #
  3. # LPC1754
  4. #
  5. DEF LPC1754 U 0 40 Y Y 1 F N
  6. F0 "U" 0 -400 60 H V C CNN
  7. F1 "LPC1754" 0 -700 60 H V C CNN
  8. DRAW
  9. S -1400 2250 1500 -2250 0 1 0 N
  10. X TDO/SWO 1 1800 -400 300 L 50 50 1 1 O
  11. X TDI 2 1800 -500 300 L 50 50 1 1 I
  12. X TMS/SWDIO 3 1800 -600 300 L 50 50 1 1 B
  13. X /TRST 4 1800 -700 300 L 50 50 1 1 I I
  14. X TCK/SWDCLK 5 1800 -800 300 L 50 50 1 1 I C
  15. X P0[26]/AD0[3]/AOUT/RXD3 6 -1700 100 300 R 50 50 1 1 B
  16. X P0[25]/AD0[2]/I2SRX_SDA/TXD3 7 -1700 200 300 R 50 50 1 1 B
  17. X VDDA 8 150 2550 300 D 50 50 1 1 W
  18. X VSSA 9 350 -2550 300 U 50 50 1 1 W
  19. X VREFP 10 350 2550 300 D 50 50 1 1 W
  20. X XTAL2 20 1800 -1400 300 L 50 50 1 1 O
  21. X P1[24]/MCI2/PWM1[5]/MOSI0 30 -1700 -1600 300 R 50 50 1 1 B
  22. X P0[11]/RXD2/SCL2/MAT3[1] 40 -1700 800 300 R 50 50 1 1 B
  23. X P2[8]/TD2/TXD2 50 1800 300 300 L 50 50 1 1 B
  24. X P2[0]/PWM1[1]/TXD1 60 1800 1100 300 L 50 50 1 1 B
  25. X P1[14] 70 -1700 -900 300 R 50 50 1 1 B
  26. X P0[3]/RXD0/AD0[6] 80 -1700 1400 300 R 50 50 1 1 B
  27. X /RSTOUT 11 1800 -1000 300 L 50 50 1 1 O I
  28. X VDD 21 -650 2550 300 D 50 50 1 1 W
  29. X P1[25]/MCOA1/MAT1[1] 31 -1700 -1700 300 R 50 50 1 1 B
  30. X P2[10]//EINT0/NMI 41 1800 100 300 L 50 50 1 1 B
  31. X P2[7]/RD2/RTS1 51 1800 400 300 L 50 50 1 1 B
  32. X P0[9]/I2STX_SDA/MOSI1/MAT2[3] 61 -1700 1000 300 R 50 50 1 1 B
  33. X P1[10] 71 -1700 -800 300 R 50 50 1 1 B
  34. X VREFN 12 450 2550 300 D 50 50 1 1 W
  35. X P0[29]/USB_D+ 22 -1700 0 300 R 50 50 1 1 B
  36. X P1[26]/MCOB1/PWM1[6]/CAP0[0] 32 1800 1700 300 L 50 50 1 1 B
  37. X VDD 42 -550 2550 300 D 50 50 1 1 W
  38. X P2[6]/PCAP1[0]/RI1/TRACECLK 52 1800 500 300 L 50 50 1 1 B
  39. X P0[8]/I2STX_WS/MISO1/MAT2[2] 62 -1700 1100 300 R 50 50 1 1 B
  40. X P1[9] 72 -1700 -700 300 R 50 50 1 1 B
  41. X RTCX1 13 1800 -1600 300 L 50 50 1 1 I
  42. X P0[30]/USB_D- 23 -1700 -100 300 R 50 50 1 1 B
  43. X VSS 33 -250 -2550 300 U 50 50 1 1 W
  44. X VSS 43 -150 -2550 300 U 50 50 1 1 W
  45. X P2[5]/PWM1[6]/DTR1/TRACEDATA[0] 53 1800 600 300 L 50 50 1 1 B
  46. X P0[7]/I2STX_CLK/SCK1/MAT2[1] 63 -1700 1200 300 R 50 50 1 1 B
  47. X P1[8] 73 -1700 -600 300 R 50 50 1 1 B
  48. X /RESET 14 1800 -1100 300 L 50 50 1 1 I I
  49. X VSS 24 -350 -2550 300 U 50 50 1 1 W
  50. X VDD(REG) 34 -150 2550 300 D 50 50 1 1 W
  51. X P0[22]/RTS1/TD1 44 -1700 300 300 R 50 50 1 1 B
  52. X P2[4]/PWM1[5]/DSR1/TRACEDATA[1] 54 1800 700 300 L 50 50 1 1 B
  53. X P0[6]/I2SRX_SDA/SSEL1/MAT2[0] 64 -1700 1300 300 R 50 50 1 1 B
  54. X P1[4] 74 -1700 -500 300 R 50 50 1 1 B
  55. X RTCX2 15 1800 -1700 300 L 50 50 1 1 O
  56. X P1[18]/USB_UP_LED/PWM1[1]/CAP1[0] 25 -1700 -1100 300 R 50 50 1 1 B
  57. X P1[28]/MCOA2/PCAP1[0]/MAT0[0] 35 1800 1600 300 L 50 50 1 1 B
  58. X P0[18]/DCD1/MOSI0/MOSI 45 -1700 400 300 R 50 50 1 1 B
  59. X P2[3]/PWM1[4]/DCD1/TRACEDATA[2] 55 1800 800 300 L 50 50 1 1 B
  60. X P4[28]/RX_MCLK/MAT2[0]/TXD3 65 1800 -100 300 L 50 50 1 1 B
  61. X P1[1] 75 -1700 -400 300 R 50 50 1 1 B
  62. X VBAT 16 650 2550 300 D 50 50 1 1 W
  63. X P1[19]/MCOA0//USB_PPWR/CAP1[1] 26 -1700 -1200 300 R 50 50 1 1 B
  64. X P1[29]/MCOB2/PCAP1[1]/MAT0[1] 36 1800 1500 300 L 50 50 1 1 B
  65. X P0[17]/CTS1/MISO0/MISO 46 -1700 500 300 R 50 50 1 1 B
  66. X VDD 56 -450 2550 300 D 50 50 1 1 W
  67. X VSS 66 50 -2550 300 U 50 50 1 1 W
  68. X P1[0] 76 -1700 -300 300 R 50 50 1 1 B
  69. X P1[31]/SCK1/AD0[5] 17 1800 1300 300 L 50 50 1 1 B
  70. X P1[20]/MCI0/PWM1[2]/SCK0 27 -1700 -1300 300 R 50 50 1 1 B
  71. X P0[0]/RD1/TXD3/SDA1 37 -1700 1700 300 R 50 50 1 1 B
  72. X P0[15]/TXD1/SCK0/SCK 47 -1700 700 300 R 50 50 1 1 B
  73. X VSS 57 -50 -2550 300 U 50 50 1 1 W
  74. X VDD(REG) 67 -50 2550 300 D 50 50 1 1 W
  75. X VDD 77 -350 2550 300 D 50 50 1 1 W
  76. X P1[30]/V_BUS/AD0[4] 18 1800 1400 300 L 50 50 1 1 B
  77. X P1[22]/MCOB0/USB_PWRD/MAT1[0] 28 -1700 -1400 300 R 50 50 1 1 B
  78. X P0[1]/TD1/RXD3/SCL1 38 -1700 1600 300 R 50 50 1 1 B
  79. X P0[16]/RXD1/SSEL0/SSEL 48 -1700 600 300 R 50 50 1 1 B
  80. X P2[2]/PWM1[3]/CTS1/TRACEDATA[3] 58 1800 900 300 L 50 50 1 1 B
  81. X P4[29]/TX_MCLK/MAT2[1]/RXD3 68 1800 -200 300 L 50 50 1 1 B
  82. X VSS 78 150 -2550 300 U 50 50 1 1 W
  83. X XTAL1 19 1800 -1300 300 L 50 50 1 1 I
  84. X P1[23]/MCI1/PWM1[4]/MISO0 29 -1700 -1500 300 R 50 50 1 1 B
  85. X P0[10]/TXD2/SDA2/MAT3[0] 39 -1700 900 300 R 50 50 1 1 B
  86. X P2[9]/USB_CONNECT/RXD2 49 1800 200 300 L 50 50 1 1 B
  87. X P2[1]/PWM1[2]/RXD1 59 1800 1000 300 L 50 50 1 1 B
  88. X P1[15] 69 -1700 -1000 300 R 50 50 1 1 B
  89. X P0[2]/TXD0/AD0[7] 79 -1700 1500 300 R 50 50 1 1 B
  90. ENDDRAW
  91. ENDDEF
  92. #
  93. #End Library