memory.c 2.5 KB

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  1. // insert cool lenghty disclaimer here
  2. // memory.c: ROM+RAM operations
  3. #include <stdint.h>
  4. #include <avr/pgmspace.h>
  5. #include <util/delay.h>
  6. #include "config.h"
  7. #include "uart.h"
  8. #include "fpga.h"
  9. #include "crc16.h"
  10. #include "ff.h"
  11. #include "fileops.h"
  12. char* hex = "0123456789ABCDEF";
  13. uint32_t load_rom(char* filename) {
  14. // TODO Mapper, Mirroring, Bankselect
  15. // snes_rom_properties_t romprops;
  16. set_avr_bank(0);
  17. AVR_ADDR_RESET();
  18. SET_AVR_READ();
  19. UINT bytes_read;
  20. DWORD filesize;
  21. file_open(filename, FA_READ);
  22. filesize = file_handle.fsize;
  23. if(file_res) return 0;
  24. // snes_rom_id(&romprops, &file_handle);
  25. for(;;) {
  26. bytes_read = file_read();
  27. if (file_res || !bytes_read) break;
  28. for(int j=0; j<bytes_read; j++) {
  29. SET_AVR_DATA(file_buf[j]);
  30. AVR_WRITE();
  31. AVR_NEXTADDR();
  32. }
  33. }
  34. file_close();
  35. return (uint32_t)filesize;
  36. }
  37. uint32_t load_sram(char* filename) {
  38. set_avr_bank(3);
  39. AVR_ADDR_RESET();
  40. SET_AVR_READ();
  41. UINT bytes_read;
  42. DWORD filesize;
  43. file_open(filename, FA_READ);
  44. filesize = file_handle.fsize;
  45. if(file_res) return 0;
  46. for(;;) {
  47. bytes_read = file_read();
  48. if (file_res || !bytes_read) break;
  49. for(int j=0; j<bytes_read; j++) {
  50. SET_AVR_DATA(file_buf[j]);
  51. AVR_WRITE();
  52. AVR_NEXTADDR();
  53. }
  54. }
  55. file_close();
  56. return (uint32_t)filesize;
  57. }
  58. void save_sram(char* filename, uint32_t sram_size) {
  59. uint32_t count = 0;
  60. uint32_t num = 0;
  61. set_avr_bank(3);
  62. _delay_us(100);
  63. AVR_ADDR_RESET();
  64. CLR_AVR_READ();
  65. SET_AVR_WRITE();
  66. file_open(filename, FA_CREATE_ALWAYS | FA_WRITE);
  67. while(count<sram_size) {
  68. for(int j=0; j<sizeof(file_buf); j++) {
  69. _delay_us(5);
  70. file_buf[j] = AVR_DATA;
  71. CLR_AVR_ADDR_EN();
  72. SET_AVR_NEXTADDR();
  73. _delay_us(5);
  74. CLR_AVR_NEXTADDR();
  75. SET_AVR_ADDR_EN();
  76. count++;
  77. }
  78. num = file_write();
  79. }
  80. file_close();
  81. }
  82. uint32_t calc_sram_crc(uint32_t size) {
  83. uint8_t data;
  84. set_avr_bank(3);
  85. _delay_us(100);
  86. AVR_ADDR_RESET();
  87. SET_AVR_WRITE();
  88. CLR_AVR_READ();
  89. uint32_t count;
  90. uint16_t crc;
  91. crc=0;
  92. for(count=0; count<size; count++) {
  93. _delay_us(5);
  94. data = AVR_DATA;
  95. crc += crc16_update(crc, &data, 1);
  96. CLR_AVR_ADDR_EN();
  97. SET_AVR_NEXTADDR();
  98. _delay_us(5);
  99. CLR_AVR_NEXTADDR();
  100. SET_AVR_ADDR_EN();
  101. }
  102. /* uart_putc(hex[(crc>>28)&0xf]);
  103. uart_putc(hex[(crc>>24)&0xf]);
  104. uart_putc(hex[(crc>>20)&0xf]);
  105. uart_putc(hex[(crc>>16)&0xf]); */
  106. uart_putc(hex[(crc>>12)&0xf]);
  107. uart_putc(hex[(crc>>8)&0xf]);
  108. uart_putc(hex[(crc>>4)&0xf]);
  109. uart_putc(hex[(crc)&0xf]);
  110. uart_putcrlf();
  111. return crc;
  112. }