fpga_spi.c 2.5 KB

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  1. /* sd2snes - SD card based universal cartridge for the SNES
  2. Copyright (C) 2009-2010 Maximilian Rehkopf <otakon@gmx.net>
  3. AVR firmware portion
  4. Inspired by and based on code from sd2iec, written by Ingo Korb et al.
  5. See sdcard.c|h, config.h.
  6. FAT file system access based on code by ChaN, Jim Brain, Ingo Korb,
  7. see ff.c|h.
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; version 2 of the License only.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. fpga_spi.h: functions for SPI ctrl, SRAM interfacing and feature configuration
  19. */
  20. /*
  21. SPI commands
  22. cmd param function
  23. =============================================
  24. 00 bb[hh[ll]] set address to 0xbb0000, 0xbbhh00, or 0xbbhhll
  25. 10 bbhhll set SNES input address mask to 0xbbhhll
  26. 20 bbhhll set SRAM address mask to 0xbbhhll
  27. 3m - set mapper to m
  28. 0=HiROM, 1=LoROM, 2=ExHiROM, 7=Menu
  29. 80 - read with increment
  30. 81 - read w/o increment
  31. 90 {xx}* write xx with increment
  32. 91 {xx}* write xx w/o increment
  33. F0 - receive test token (to see if FPGA is alive)
  34. */
  35. #include <avr/pgmspace.h>
  36. #include <util/delay.h>
  37. #include "avrcompat.h"
  38. #include "fpga.h"
  39. #include "config.h"
  40. #include "uart.h"
  41. #include "spi.h"
  42. #include "fpga_spi.h"
  43. void spi_fpga(void) {
  44. SPI_SS_HIGH();
  45. FPGA_SS_LOW();
  46. }
  47. void spi_sd(void) {
  48. FPGA_SS_HIGH();
  49. SPI_SS_LOW();
  50. }
  51. void spi_none(void) {
  52. FPGA_SS_HIGH();
  53. SPI_SS_HIGH();
  54. }
  55. void fpga_spi_init(void) {
  56. DDRC = _BV(PC7);
  57. FPGA_SS_HIGH();
  58. }
  59. void set_avr_addr(uint32_t address) {
  60. spi_fpga();
  61. spiTransferByte(0x00);
  62. spiTransferByte((address>>16)&0xff);
  63. spiTransferByte((address>>8)&0xff);
  64. spiTransferByte((address)&0xff);
  65. spi_none();
  66. }
  67. void set_saveram_mask(uint32_t mask) {
  68. spi_fpga();
  69. spiTransferByte(0x20);
  70. spiTransferByte((mask>>16)&0xff);
  71. spiTransferByte((mask>>8)&0xff);
  72. spiTransferByte((mask)&0xff);
  73. spi_none();
  74. }
  75. void set_rom_mask(uint32_t mask) {
  76. spi_fpga();
  77. spiTransferByte(0x10);
  78. spiTransferByte((mask>>16)&0xff);
  79. spiTransferByte((mask>>8)&0xff);
  80. spiTransferByte((mask)&0xff);
  81. spi_none();
  82. }