fpga.h 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778
  1. /* sd2snes - SD card based universal cartridge for the SNES
  2. Copyright (C) 2009-2010 Maximilian Rehkopf <otakon@gmx.net>
  3. AVR firmware portion
  4. Inspired by and based on code from sd2iec, written by Ingo Korb et al.
  5. See sdcard.c|h, config.h.
  6. FAT file system access based on code by ChaN, Jim Brain, Ingo Korb,
  7. see ff.c|h.
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; version 2 of the License only.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. fpga.h: FPGA (re)configuration
  19. */
  20. #ifndef FPGA_H
  21. #define FPGA_H
  22. void fpga_init(void);
  23. uint8_t fpga_test(void);
  24. void fpga_postinit(void);
  25. void fpga_pgm(uint8_t* filename);
  26. void set_avr_read(uint8_t val);
  27. void set_avr_write(uint8_t val);
  28. void set_avr_ena(uint8_t val);
  29. void set_avr_nextaddr(uint8_t val);
  30. void set_avr_addr_reset(uint8_t val);
  31. void set_avr_data(uint8_t data);
  32. void set_avr_addr_en(uint8_t val);
  33. void set_avr_mapper(uint8_t val);
  34. void set_avr_bank(uint8_t val);
  35. uint8_t SPI_OFFLOAD;
  36. #define FPGA_TEST_TOKEN (0xa5)
  37. // some macros for bulk transfers (faster)
  38. #define FPGA_SEND_BYTE(data) do {SET_AVR_DATA(data); CCLK();} while (0)
  39. #define FPGA_SEND_BYTE_SERIAL(data) do {SET_AVR_DATA(data); CCLK();\
  40. SET_AVR_DATA(data<<1); CCLK(); SET_AVR_DATA(data<<2); CCLK();\
  41. SET_AVR_DATA(data<<3); CCLK(); SET_AVR_DATA(data<<4); CCLK();\
  42. SET_AVR_DATA(data<<5); CCLK(); SET_AVR_DATA(data<<6); CCLK();\
  43. SET_AVR_DATA(data<<7); CCLK();} while (0)
  44. #define SET_CCLK() do {PORTD |= _BV(PD4);} while (0)
  45. #define CLR_CCLK() do {PORTD &= ~_BV(PD4);} while (0)
  46. #define CCLK() do {SET_CCLK(); CLR_CCLK();} while (0)
  47. #define SET_AVR_READ() do {PORTB |= _BV(PB3);} while (0)
  48. #define CLR_AVR_READ() do {PORTB &= ~_BV(PB3);} while (0)
  49. #define SET_AVR_WRITE() do {PORTB |= _BV(PB2);} while (0)
  50. #define CLR_AVR_WRITE() do {PORTB &= ~_BV(PB2);} while (0)
  51. #define SET_AVR_EXCL() do {PORTD |= _BV(PD7);} while (0)
  52. #define CLR_AVR_EXCL() do {PORTD &= ~_BV(PD7);} while (0)
  53. #define SET_AVR_NEXTADDR() do {PORTA |= _BV(PA4);} while (0)
  54. #define CLR_AVR_NEXTADDR() do {PORTA &= ~_BV(PA4);} while (0)
  55. #define SET_AVR_ADDR_RESET() do {PORTA |= _BV(PA5);} while (0)
  56. #define CLR_AVR_ADDR_RESET() do {PORTA &= ~_BV(PA5);} while (0)
  57. #define SET_AVR_ADDR_EN() do {PORTA |= _BV(PA6);} while (0)
  58. #define CLR_AVR_ADDR_EN() do {PORTA &= ~_BV(PA6);} while (0)
  59. #define AVR_NEXTADDR() do {SET_AVR_NEXTADDR(); CLR_AVR_NEXTADDR();} while (0)
  60. #define AVR_ADDR_RESET() do {CLR_AVR_ADDR_RESET();\
  61. AVR_NEXTADDR();SET_AVR_ADDR_RESET();} while (0)
  62. #define SET_AVR_DATA(data) do {PORTC = (uint8_t)data;} while (0)
  63. #define AVR_READ() do {CLR_AVR_READ(); SET_AVR_READ();} while (0)
  64. #define AVR_WRITE() do {CLR_AVR_WRITE(); SET_AVR_WRITE();} while (0)
  65. #define AVR_DATA (PINC)
  66. #endif