sdnative.c 27 KB

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  1. #include <arm/NXP/LPC17xx/LPC17xx.h>
  2. #include <stdio.h>
  3. #include "config.h"
  4. #include "crc.h"
  5. #include "diskio.h"
  6. #include "spi.h"
  7. #include "timer.h"
  8. #include "uart.h"
  9. #include "led.h"
  10. #include "sdnative.h"
  11. #include "fileops.h"
  12. #include "bits.h"
  13. #include "fpga_spi.h"
  14. #define MAX_CARDS 1
  15. // SD/MMC commands
  16. #define GO_IDLE_STATE 0
  17. #define SEND_OP_COND 1
  18. #define ALL_SEND_CID 2
  19. #define SEND_RELATIVE_ADDR 3
  20. #define SWITCH_FUNC 6
  21. #define SELECT_CARD 7
  22. #define SEND_IF_COND 8
  23. #define SEND_CSD 9
  24. #define SEND_CID 10
  25. #define STOP_TRANSMISSION 12
  26. #define SEND_STATUS 13
  27. #define GO_INACTIVE_STATE 15
  28. #define SET_BLOCKLEN 16
  29. #define READ_SINGLE_BLOCK 17
  30. #define READ_MULTIPLE_BLOCK 18
  31. #define WRITE_BLOCK 24
  32. #define WRITE_MULTIPLE_BLOCK 25
  33. #define PROGRAM_CSD 27
  34. #define SET_WRITE_PROT 28
  35. #define CLR_WRITE_PROT 29
  36. #define SEND_WRITE_PROT 30
  37. #define ERASE_WR_BLK_STAR_ADDR 32
  38. #define ERASE_WR_BLK_END_ADDR 33
  39. #define ERASE 38
  40. #define LOCK_UNLOCK 42
  41. #define APP_CMD 55
  42. #define GEN_CMD 56
  43. #define READ_OCR 58
  44. #define CRC_ON_OFF 59
  45. // SD ACMDs
  46. #define SD_SET_BUS_WIDTH 6
  47. #define SD_STATUS 13
  48. #define SD_SEND_NUM_WR_BLOCKS 22
  49. #define SD_SET_WR_BLK_ERASE_COUNT 23
  50. #define SD_SEND_OP_COND 41
  51. #define SD_SET_CLR_CARD_DETECT 42
  52. #define SD_SEND_SCR 51
  53. // R1 status bits
  54. #define STATUS_IN_IDLE 1
  55. #define STATUS_ERASE_RESET 2
  56. #define STATUS_ILLEGAL_COMMAND 4
  57. #define STATUS_CRC_ERROR 8
  58. #define STATUS_ERASE_SEQ_ERROR 16
  59. #define STATUS_ADDRESS_ERROR 32
  60. #define STATUS_PARAMETER_ERROR 64
  61. /* Card types - cardtype == 0 is MMC */
  62. #define CARD_SD (1<<0)
  63. #define CARD_SDHC (1<<1)
  64. /*
  65. Rev.A Rev.C
  66. 1 DAT3/SS P0.6 P2.3
  67. 2 CMD/DI P0.9 P0.9
  68. 5 Clock P0.7 P0.7
  69. 7 DAT0/DO P0.8 P2.0
  70. 8 DAT1/IRQ P1.14 P2.1
  71. 9 DAT2/NC P1.15 P2.2
  72. */
  73. /* SD init procedure
  74. =================
  75. - initial clock frequency: ~100kHz
  76. - cycle the clock for at least 74 cycles (some more may be safer)
  77. - send CMD0
  78. - send CMD8 (SEND_OP_COND); if no response -> HCS=0; else HCS=1
  79. - send ACMD41 until OCR[31] (busy) becomes 1 (means: ready)
  80. - if OCR[30] (CCS) set -> SDHC; else SDSC
  81. - send CMD2 (read CID) (maybe log some stuff from the CID)
  82. - send CMD3 (read RCA), store RCA
  83. == end of initialisation ==
  84. - send CMD9 (read CSD) with RCA, maybe do sth with TRAN_SPEED
  85. - send CMD7 with RCA, select card, put card in tran
  86. - maybe send CMD13 with RCA to check state (tran)
  87. - send ACMD51 with RCA to read SCR (maybe, to check 4bit support)
  88. - increase clock speed
  89. - send ACMD6 with RCA to set 4bit bus width
  90. - send transfer cmds
  91. */
  92. /*
  93. static CMD payloads. (no CRC calc required)
  94. - CMD0: 0x40 0x00 0x00 0x00 0x00 0x95
  95. - CMD8: 0x48 0x00 0x00 0x01 0xaa 0x87
  96. - CMD2: 0x42 0x00 0x00 0x00 0x00 0x4d
  97. - CMD3: 0x43 0x00 0x00 0x00 0x00 0x21
  98. - CMD55: 0x77 0x00 0x00 0x00 0x00 0x65
  99. */
  100. uint8_t cmd[6]={0,0,0,0,0,0};
  101. uint8_t rsp[17];
  102. uint8_t csd[17];
  103. uint8_t ccs=0;
  104. uint32_t rca;
  105. enum trans_state { TRANS_NONE = 0, TRANS_READ, TRANS_WRITE };
  106. enum cmd_state { CMD_RSP = 0, CMD_RSPDAT, CMD_DAT };
  107. int during_blocktrans = TRANS_NONE;
  108. uint32_t last_block = 0;
  109. volatile int sd_changed;
  110. /**
  111. * getbits - read value from bit buffer
  112. * @buffer: pointer to the data buffer
  113. * @start : index of the first bit in the value
  114. * @bits : number of bits in the value
  115. *
  116. * This function returns a value from the memory region passed as
  117. * buffer, starting with bit "start" and "bits" bit long. The buffer
  118. * is assumed to be MSB first, passing 0 for start will read starting
  119. * from the highest-value bit of the first byte of the buffer.
  120. */
  121. static uint32_t getbits(void *buffer, uint16_t start, int8_t bits) {
  122. uint8_t *buf = buffer;
  123. uint32_t result = 0;
  124. if ((start % 8) != 0) {
  125. /* Unaligned start */
  126. result += buf[start / 8] & (0xff >> (start % 8));
  127. bits -= 8 - (start % 8);
  128. start += 8 - (start % 8);
  129. }
  130. while (bits >= 8) {
  131. result = (result << 8) + buf[start / 8];
  132. start += 8;
  133. bits -= 8;
  134. }
  135. if (bits > 0) {
  136. result = result << bits;
  137. result = result + (buf[start / 8] >> (8-bits));
  138. } else if (bits < 0) {
  139. /* Fraction of a single byte */
  140. result = result >> -bits;
  141. }
  142. return result;
  143. }
  144. static inline void wiggle_slow_pos(uint16_t times) {
  145. while(times--) {
  146. delay_us(2);
  147. BITBAND(SD_CLKREG->FIOSET, SD_CLKPIN) = 1;
  148. delay_us(2);
  149. BITBAND(SD_CLKREG->FIOCLR, SD_CLKPIN) = 1;
  150. }
  151. }
  152. static inline void wiggle_slow_neg(uint16_t times) {
  153. while(times--) {
  154. delay_us(2);
  155. BITBAND(SD_CLKREG->FIOCLR, SD_CLKPIN) = 1;
  156. delay_us(2);
  157. BITBAND(SD_CLKREG->FIOSET, SD_CLKPIN) = 1;
  158. }
  159. }
  160. static inline void wiggle_fast_pos(uint16_t times) {
  161. while(times--) {
  162. BITBAND(SD_CLKREG->FIOSET, SD_CLKPIN) = 1;
  163. BITBAND(SD_CLKREG->FIOCLR, SD_CLKPIN) = 1;
  164. }
  165. }
  166. static inline void wiggle_fast_neg(uint16_t times) {
  167. while(times--) {
  168. BITBAND(SD_CLKREG->FIOCLR, SD_CLKPIN) = 1;
  169. BITBAND(SD_CLKREG->FIOSET, SD_CLKPIN) = 1;
  170. }
  171. }
  172. static inline void wiggle_fast_neg1(void) {
  173. BITBAND(SD_CLKREG->FIOCLR, SD_CLKPIN) = 1;
  174. BITBAND(SD_CLKREG->FIOSET, SD_CLKPIN) = 1;
  175. }
  176. static inline void wiggle_fast_pos1(void) {
  177. BITBAND(SD_CLKREG->FIOSET, SD_CLKPIN) = 1;
  178. BITBAND(SD_CLKREG->FIOCLR, SD_CLKPIN) = 1;
  179. }
  180. int get_and_check_datacrc(uint8_t *buf) {
  181. uint16_t crc0=0, crc1=0, crc2=0, crc3=0;
  182. uint16_t sdcrc0=0, sdcrc1=0, sdcrc2=0, sdcrc3=0;
  183. uint8_t d0=0, d1=0, d2=0, d3=0;
  184. uint8_t datdata;
  185. uint16_t datcnt;
  186. /* get crcs from card */
  187. for (datcnt=0; datcnt < 16; datcnt++) {
  188. datdata = SD_DAT;
  189. wiggle_fast_neg1();
  190. sdcrc0 = ((sdcrc0 << 1) & 0xfffe) | ((datdata >> 3) & 0x0001);
  191. sdcrc1 = ((sdcrc1 << 1) & 0xfffe) | ((datdata >> 2) & 0x0001);
  192. sdcrc2 = ((sdcrc2 << 1) & 0xfffe) | ((datdata >> 1) & 0x0001);
  193. sdcrc3 = ((sdcrc3 << 1) & 0xfffe) | ((datdata >> 0) & 0x0001);
  194. }
  195. wiggle_fast_neg1();
  196. /* calc crcs from data */
  197. for (datcnt=0; datcnt < 512; datcnt++) {
  198. d0 = ((d0 << 2) & 0xfc) | ((buf[datcnt] >> 6) & 0x02) | ((buf[datcnt] >> 3) & 0x01) ;
  199. d1 = ((d1 << 2) & 0xfc) | ((buf[datcnt] >> 5) & 0x02) | ((buf[datcnt] >> 2) & 0x01) ;
  200. d2 = ((d2 << 2) & 0xfc) | ((buf[datcnt] >> 4) & 0x02) | ((buf[datcnt] >> 1) & 0x01) ;
  201. d3 = ((d3 << 2) & 0xfc) | ((buf[datcnt] >> 3) & 0x02) | ((buf[datcnt] >> 0) & 0x01) ;
  202. if((datcnt % 4) == 3) {
  203. crc0 = crc_xmodem_update(crc0, d0);
  204. crc1 = crc_xmodem_update(crc1, d1);
  205. crc2 = crc_xmodem_update(crc2, d2);
  206. crc3 = crc_xmodem_update(crc3, d3);
  207. }
  208. }
  209. if((crc0 != sdcrc0) || (crc1 != sdcrc1) || (crc2 != sdcrc2) || (crc3 != sdcrc3)) {
  210. printf("CRC mismatch\nSDCRC CRC\n %04x %04x\n %04x %04x\n %04x %04x\n %04x %04x\n", sdcrc0, crc0, sdcrc1, crc1, sdcrc2, crc2, sdcrc3, crc3);
  211. while(1);
  212. return 1;
  213. }
  214. return 0;
  215. }
  216. static inline void wait_busy(void) {
  217. while(!(BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN))) {
  218. wiggle_fast_neg1();
  219. }
  220. wiggle_fast_neg(4);
  221. }
  222. /*
  223. send_command_slow
  224. send SD command and put response in rsp.
  225. returns length of response or 0 if there was no response
  226. */
  227. int send_command_slow(uint8_t* cmd, uint8_t* rsp){
  228. uint8_t shift, i=6;
  229. int rsplen;
  230. uint8_t cmdno = *cmd & 0x3f;
  231. wiggle_slow_pos(5);
  232. switch(*cmd & 0x3f) {
  233. case 0:
  234. rsplen = 0;
  235. break;
  236. case 2:
  237. case 9:
  238. case 10:
  239. rsplen = 17;
  240. break;
  241. default:
  242. rsplen = 6;
  243. }
  244. /* send command */
  245. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
  246. while(i--) {
  247. shift = 8;
  248. do {
  249. shift--;
  250. uint8_t data = *cmd;
  251. *cmd<<=1;
  252. if(data&0x80) {
  253. BITBAND(SD_CMDREG->FIOSET, SD_CMDPIN) = 1;
  254. } else {
  255. BITBAND(SD_CMDREG->FIOCLR, SD_CMDPIN) = 1;
  256. }
  257. wiggle_slow_pos(1);
  258. } while (shift);
  259. cmd++;
  260. }
  261. wiggle_slow_pos(1);
  262. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 0;
  263. if(rsplen) {
  264. uint16_t timeout=1000;
  265. while((BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) && --timeout) {
  266. wiggle_slow_neg(1);
  267. }
  268. if(!timeout) {
  269. printf("CMD%d timed out\n", cmdno);
  270. return 0; /* no response within timeout */
  271. }
  272. i=rsplen;
  273. while(i--) {
  274. shift = 8;
  275. uint8_t data=0;
  276. do {
  277. shift--;
  278. data |= (BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) << shift;
  279. wiggle_slow_neg(1);
  280. } while (shift);
  281. *rsp=data;
  282. rsp++;
  283. }
  284. }
  285. return rsplen;
  286. }
  287. /*
  288. send_command_fast
  289. send SD command and put response in rsp.
  290. returns length of response or 0 if there was no response
  291. */
  292. int send_command_fast(uint8_t* cmd, uint8_t* rsp, uint8_t* buf){
  293. uint8_t datshift=8, cmdshift, i=6;
  294. uint8_t cmdno = *cmd & 0x3f;
  295. int rsplen, dat=0, waitbusy=0, datcnt=512, j=0;
  296. static int state=CMD_RSP;
  297. wiggle_fast_pos(9); /* give the card >=8 cycles after last command */
  298. DBG_SD printf("send_command_fast: sending CMD%d; payload=%02x%02x%02x%02x%02x%02x...\n", cmdno, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], cmd[5]);
  299. switch(*cmd & 0x3f) {
  300. case 0:
  301. rsplen = 0;
  302. break;
  303. case 2:
  304. case 9:
  305. case 10:
  306. rsplen = 17;
  307. break;
  308. case 12:
  309. rsplen = 6;
  310. waitbusy = 1;
  311. break;
  312. case 13:
  313. case 17:
  314. case 18:
  315. dat = 1;
  316. default:
  317. rsplen = 6;
  318. }
  319. if(dat && (buf==NULL)) {
  320. printf("send_command_fast error: buf is null but data transfer expected.\n");
  321. return 0;
  322. }
  323. /* send command */
  324. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
  325. while(i--) {
  326. uint8_t data = *cmd;
  327. cmdshift = 8;
  328. do {
  329. cmdshift--;
  330. if(data&0x80) {
  331. BITBAND(SD_CMDREG->FIOSET, SD_CMDPIN) = 1;
  332. } else {
  333. BITBAND(SD_CMDREG->FIOCLR, SD_CMDPIN) = 1;
  334. }
  335. data<<=1;
  336. wiggle_fast_pos1();
  337. } while (cmdshift);
  338. cmd++;
  339. }
  340. wiggle_fast_pos1();
  341. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 0;
  342. if(rsplen) {
  343. uint32_t timeout=2000000;
  344. /* wait for response */
  345. while((BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) && --timeout) {
  346. wiggle_fast_neg1();
  347. }
  348. if(!timeout) {
  349. printf("CMD%d timed out\n", cmdno);
  350. return 0; /* no response within timeout */
  351. }
  352. i=rsplen;
  353. uint8_t cmddata=0, datdata=0;
  354. while(i--) { /* process response */
  355. cmdshift = 8;
  356. do {
  357. if(dat) {
  358. if(!(BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN))) {
  359. printf("data start during response\n");
  360. j=datcnt;
  361. state=CMD_RSPDAT;
  362. break;
  363. }
  364. }
  365. cmdshift--;
  366. cmddata |= (BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) << cmdshift;
  367. wiggle_fast_neg1();
  368. } while (cmdshift);
  369. if(state==CMD_RSPDAT)break;
  370. *rsp=cmddata;
  371. cmddata=0;
  372. rsp++;
  373. }
  374. if(state==CMD_RSPDAT) { /* process response+data */
  375. int startbit=1;
  376. DBG_SD printf("processing rsp+data cmdshift=%d i=%d j=%d\n", cmdshift, i, j);
  377. datshift=8;
  378. while(1) {
  379. cmdshift--;
  380. cmddata |= (BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN)) << cmdshift;
  381. if(!cmdshift) {
  382. cmdshift=8;
  383. *rsp=cmddata;
  384. cmddata=0;
  385. rsp++;
  386. i--;
  387. if(!i) {
  388. DBG_SD printf("response end\n");
  389. if(j) state=CMD_DAT; /* response over, remaining data */
  390. break;
  391. }
  392. }
  393. if(!startbit) {
  394. datshift-=4;
  395. datdata |= SD_DAT << datshift;
  396. if(!datshift) {
  397. datshift=8;
  398. *buf=datdata;
  399. datdata=0;
  400. buf++;
  401. j--;
  402. if(!j) break;
  403. }
  404. }
  405. startbit=0;
  406. wiggle_fast_neg1();
  407. }
  408. }
  409. if(dat && state != CMD_DAT) { /* response ended before data */
  410. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
  411. state=CMD_DAT;
  412. j=datcnt;
  413. datshift=8;
  414. DBG_SD printf("response over, waiting for data...\n");
  415. /* wait for data start bit on DAT0 */
  416. while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
  417. wiggle_fast_neg1();
  418. }
  419. DBG_SD if(!timeout) printf("timed out!\n");
  420. wiggle_fast_neg1(); /* eat the start bit */
  421. if(sd_offload) {
  422. if(sd_offload_partial) {
  423. fpga_set_sddma_range(sd_offload_partial_start, sd_offload_partial_end);
  424. fpga_sddma(sd_offload_tgt, 1);
  425. sd_offload_partial=0;
  426. } else {
  427. fpga_sddma(sd_offload_tgt, 0);
  428. }
  429. state=CMD_RSP;
  430. return rsplen;
  431. }
  432. }
  433. if(state==CMD_DAT) { /* transfer rest of data */
  434. DBG_SD printf("remaining data: %d\n", j);
  435. if(datshift==8) {
  436. while(1) {
  437. datdata |= SD_DAT << 4;
  438. wiggle_fast_neg1();
  439. datdata |= SD_DAT;
  440. wiggle_fast_neg1();
  441. *buf=datdata;
  442. datdata=0;
  443. buf++;
  444. j--;
  445. if(!j) break;
  446. }
  447. } else {
  448. while(1) {
  449. datshift-=4;
  450. datdata |= SD_DAT << datshift;
  451. if(!datshift) {
  452. datshift=8;
  453. *buf=datdata;
  454. datdata=0;
  455. buf++;
  456. j--;
  457. if(!j) break;
  458. }
  459. wiggle_fast_neg1();
  460. }
  461. }
  462. }
  463. if(dat) {
  464. #ifdef CONFIG_SD_DATACRC
  465. if(get_and_check_datacrc(buf-512)) {
  466. return CRC_ERROR;
  467. }
  468. #else
  469. /* eat the crcs */
  470. wiggle_fast_neg(17);
  471. #endif
  472. }
  473. if(waitbusy) {
  474. DBG_SD printf("waitbusy after send_cmd\n");
  475. wait_busy();
  476. }
  477. state=CMD_RSP;
  478. }
  479. rsp-=rsplen;
  480. DBG_SD printf("send_command_fast: CMD%d response: %02x%02x%02x%02x%02x%02x\n", cmdno, rsp[0], rsp[1], rsp[2], rsp[3], rsp[4], rsp[5]);
  481. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
  482. return rsplen;
  483. }
  484. static inline void make_crc7(uint8_t* cmd) {
  485. cmd[5]=crc7update(0, cmd[0]);
  486. cmd[5]=crc7update(cmd[5], cmd[1]);
  487. cmd[5]=crc7update(cmd[5], cmd[2]);
  488. cmd[5]=crc7update(cmd[5], cmd[3]);
  489. cmd[5]=crc7update(cmd[5], cmd[4]);
  490. cmd[5]=(cmd[5] << 1) | 1;
  491. }
  492. int cmd_slow(uint8_t cmd, uint32_t param, uint8_t crc, uint8_t* dat, uint8_t* rsp) {
  493. uint8_t cmdbuf[6];
  494. cmdbuf[0] = 0x40 | cmd;
  495. cmdbuf[1] = param >> 24;
  496. cmdbuf[2] = param >> 16;
  497. cmdbuf[3] = param >> 8;
  498. cmdbuf[4] = param;
  499. if(!crc) {
  500. make_crc7(cmdbuf);
  501. } else {
  502. cmdbuf[5] = crc;
  503. }
  504. return send_command_slow(cmdbuf, rsp);
  505. }
  506. int acmd_slow(uint8_t cmd, uint32_t param, uint8_t crc, uint8_t* dat, uint8_t* rsp) {
  507. if(!(cmd_slow(APP_CMD, rca, 0, NULL, rsp))) {
  508. return 0;
  509. }
  510. return cmd_slow(cmd, param, crc, dat, rsp);
  511. }
  512. int cmd_fast(uint8_t cmd, uint32_t param, uint8_t crc, uint8_t* dat, uint8_t* rsp) {
  513. uint8_t cmdbuf[6];
  514. cmdbuf[0] = 0x40 | cmd;
  515. cmdbuf[1] = param >> 24;
  516. cmdbuf[2] = param >> 16;
  517. cmdbuf[3] = param >> 8;
  518. cmdbuf[4] = param;
  519. if(!crc) {
  520. make_crc7(cmdbuf);
  521. } else {
  522. cmdbuf[5] = crc;
  523. }
  524. return send_command_fast(cmdbuf, rsp, dat);
  525. }
  526. int acmd_fast(uint8_t cmd, uint32_t param, uint8_t crc, uint8_t* dat, uint8_t* rsp) {
  527. if(!(cmd_fast(APP_CMD, rca, 0, NULL, rsp))) {
  528. return 0;
  529. }
  530. return cmd_fast(cmd, param, crc, dat, rsp);
  531. }
  532. void sdn_checkinit(BYTE drv) {
  533. if(disk_state == DISK_CHANGED) {
  534. disk_initialize(drv);
  535. }
  536. }
  537. int stream_datablock(uint8_t *buf) {
  538. // uint8_t datshift=8;
  539. int j=512;
  540. uint8_t datdata=0;
  541. uint32_t timeout=1000000;
  542. DBG_SD printf("stream_datablock: wait for ready...\n");
  543. while((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) && --timeout) {
  544. wiggle_fast_neg1();
  545. }
  546. DBG_SD if(!timeout) printf("timeout!\n");
  547. wiggle_fast_neg1(); /* eat the start bit */
  548. if(sd_offload) {
  549. if(sd_offload_partial) {
  550. fpga_set_sddma_range(sd_offload_partial_start, sd_offload_partial_end);
  551. fpga_sddma(sd_offload_tgt, 1);
  552. sd_offload_partial=0;
  553. } else {
  554. fpga_sddma(sd_offload_tgt, 0);
  555. }
  556. } else {
  557. while(1) {
  558. datdata = SD_DAT << 4;
  559. wiggle_fast_neg1();
  560. datdata |= SD_DAT;
  561. wiggle_fast_neg1();
  562. *buf=datdata;
  563. buf++;
  564. j--;
  565. if(!j) break;
  566. }
  567. #ifdef CONFIG_SD_DATACRC
  568. return get_and_check_datacrc(buf-512);
  569. #else
  570. /* eat the crcs */
  571. wiggle_fast_neg(17);
  572. #endif
  573. }
  574. return 0;
  575. }
  576. void send_datablock(uint8_t *buf) {
  577. uint16_t crc0=0, crc1=0, crc2=0, crc3=0, cnt=512;
  578. uint8_t dat0=0, dat1=0, dat2=0, dat3=0, crcshift, datshift;
  579. wiggle_fast_pos1();
  580. BITBAND(SD_DAT0REG->FIODIR, SD_DAT0PIN) = 1;
  581. BITBAND(SD_DAT1REG->FIODIR, SD_DAT1PIN) = 1;
  582. BITBAND(SD_DAT2REG->FIODIR, SD_DAT2PIN) = 1;
  583. BITBAND(SD_DAT3REG->FIODIR, SD_DAT3PIN) = 1;
  584. BITBAND(SD_DAT0REG->FIOCLR, SD_DAT0PIN) = 1;
  585. BITBAND(SD_DAT1REG->FIOCLR, SD_DAT1PIN) = 1;
  586. BITBAND(SD_DAT2REG->FIOCLR, SD_DAT2PIN) = 1;
  587. BITBAND(SD_DAT3REG->FIOCLR, SD_DAT3PIN) = 1;
  588. wiggle_fast_pos1(); /* send start bit to card */
  589. crcshift=8;
  590. while(cnt--) {
  591. datshift=8;
  592. do {
  593. datshift-=4;
  594. /* if(((*buf)>>datshift) & 0x8) {
  595. BITBAND(SD_DAT3REG->FIOSET, SD_DAT3PIN) = 1;
  596. } else {
  597. BITBAND(SD_DAT3REG->FIOCLR, SD_DAT3PIN) = 1;
  598. }
  599. if(((*buf)>>datshift) & 0x4) {
  600. BITBAND(SD_DAT2REG->FIOSET, SD_DAT2PIN) = 1;
  601. } else {
  602. BITBAND(SD_DAT2REG->FIOCLR, SD_DAT2PIN) = 1;
  603. }
  604. if(((*buf)>>datshift) & 0x2){
  605. BITBAND(SD_DAT1REG->FIOSET, SD_DAT1PIN) = 1;
  606. } else {
  607. BITBAND(SD_DAT1REG->FIOCLR, SD_DAT1PIN) = 1;
  608. }
  609. if(((*buf)>>datshift) & 0x1){
  610. BITBAND(SD_DAT0REG->FIOSET, SD_DAT0PIN) = 1;
  611. } else {
  612. BITBAND(SD_DAT0REG->FIOCLR, SD_DAT0PIN) = 1;
  613. }*/
  614. SD_DAT0REG->FIOPIN0 = (*buf) >> datshift;
  615. wiggle_fast_pos1();
  616. } while (datshift);
  617. crcshift-=2;
  618. dat0 |= (((*buf)&0x01) | (((*buf)&0x10) >> 3)) << crcshift;
  619. dat1 |= ((((*buf)&0x02) >> 1) | (((*buf)&0x20) >> 4)) << crcshift;
  620. dat2 |= ((((*buf)&0x04) >> 2) | (((*buf)&0x40) >> 5)) << crcshift;
  621. dat3 |= ((((*buf)&0x08) >> 3) | (((*buf)&0x80) >> 6)) << crcshift;
  622. if(!crcshift) {
  623. crc0 = crc_xmodem_update(crc0, dat0);
  624. crc1 = crc_xmodem_update(crc1, dat1);
  625. crc2 = crc_xmodem_update(crc2, dat2);
  626. crc3 = crc_xmodem_update(crc3, dat3);
  627. crcshift=8;
  628. dat0=0;
  629. dat1=0;
  630. dat2=0;
  631. dat3=0;
  632. }
  633. buf++;
  634. }
  635. // printf("crc0=%04x crc1=%04x crc2=%04x crc3=%04x ", crc0, crc1, crc2, crc3);
  636. /* send crcs */
  637. datshift=16;
  638. do {
  639. datshift--;
  640. if((crc0 >> datshift) & 1) {
  641. BITBAND(SD_DAT0REG->FIOSET, SD_DAT0PIN) = 1;
  642. } else {
  643. BITBAND(SD_DAT0REG->FIOCLR, SD_DAT0PIN) = 1;
  644. }
  645. if((crc1 >> datshift) & 1) {
  646. BITBAND(SD_DAT1REG->FIOSET, SD_DAT1PIN) = 1;
  647. } else {
  648. BITBAND(SD_DAT1REG->FIOCLR, SD_DAT1PIN) = 1;
  649. }
  650. if((crc2 >> datshift) & 1) {
  651. BITBAND(SD_DAT2REG->FIOSET, SD_DAT2PIN) = 1;
  652. } else {
  653. BITBAND(SD_DAT2REG->FIOCLR, SD_DAT2PIN) = 1;
  654. }
  655. if((crc3 >> datshift) & 1) {
  656. BITBAND(SD_DAT3REG->FIOSET, SD_DAT3PIN) = 1;
  657. } else {
  658. BITBAND(SD_DAT3REG->FIOCLR, SD_DAT3PIN) = 1;
  659. }
  660. wiggle_fast_pos1();
  661. } while(datshift);
  662. /* send end bit */
  663. BITBAND(SD_DAT0REG->FIOSET, SD_DAT0PIN) = 1;
  664. BITBAND(SD_DAT1REG->FIOSET, SD_DAT1PIN) = 1;
  665. BITBAND(SD_DAT2REG->FIOSET, SD_DAT2PIN) = 1;
  666. BITBAND(SD_DAT3REG->FIOSET, SD_DAT3PIN) = 1;
  667. wiggle_fast_pos1();
  668. BITBAND(SD_DAT0REG->FIODIR, SD_DAT0PIN) = 0;
  669. BITBAND(SD_DAT1REG->FIODIR, SD_DAT1PIN) = 0;
  670. BITBAND(SD_DAT2REG->FIODIR, SD_DAT2PIN) = 0;
  671. BITBAND(SD_DAT3REG->FIODIR, SD_DAT3PIN) = 0;
  672. wiggle_fast_neg(3);
  673. dat0=0;
  674. datshift=4;
  675. do {
  676. datshift--;
  677. dat0 |= ((BITBAND(SD_DAT0REG->FIOPIN, SD_DAT0PIN)) << datshift);
  678. wiggle_fast_neg1();
  679. } while (datshift);
  680. DBG_SD printf("crc %02x\n", dat0);
  681. if((dat0 & 7) != 2) {
  682. printf("crc error! %02x\n", dat0);
  683. while(1);
  684. }
  685. if(dat0 & 8) {
  686. printf("missing start bit in CRC status response...\n");
  687. }
  688. wiggle_fast_neg(2);
  689. wait_busy();
  690. }
  691. void read_block(uint32_t address, uint8_t *buf) {
  692. if(during_blocktrans == TRANS_READ && (last_block == address-1)) {
  693. //uart_putc('r');
  694. #ifdef CONFIG_SD_DATACRC
  695. int cmd_res;
  696. if((cmd_res = stream_datablock(buf)) == CRC_ERROR) {
  697. while(cmd_res == CRC_ERROR) {
  698. cmd_fast(STOP_TRANSMISSION, 0, 0x61, NULL, rsp);
  699. cmd_res = cmd_fast(READ_MULTIPLE_BLOCK, address, 0, buf, rsp);
  700. }
  701. }
  702. #else
  703. stream_datablock(buf);
  704. #endif
  705. last_block=address;
  706. } else {
  707. if(during_blocktrans) {
  708. // uart_putc('_');
  709. //printf("nonseq read (%lx -> %lx), restarting transmission\n", last_block, address);
  710. /* send STOP_TRANSMISSION to end an open READ/WRITE_MULTIPLE_BLOCK */
  711. cmd_fast(STOP_TRANSMISSION, 0, 0x61, NULL, rsp);
  712. }
  713. last_block=address;
  714. if(!ccs) {
  715. address <<= 9;
  716. }
  717. #ifdef CONFIG_SD_DATACRC
  718. while(1) {
  719. if(cmd_fast(READ_MULTIPLE_BLOCK, address, 0, buf, rsp) != CRC_ERROR) break;
  720. cmd_fast(STOP_TRANSMISSION, 0, 0x61, NULL, rsp);
  721. };
  722. #else
  723. cmd_fast(READ_MULTIPLE_BLOCK, address, 0, buf, rsp);
  724. #endif
  725. during_blocktrans = TRANS_READ;
  726. }
  727. }
  728. void write_block(uint32_t address, uint8_t* buf) {
  729. if(during_blocktrans == TRANS_WRITE && (last_block == address-1)) {
  730. wait_busy();
  731. send_datablock(buf);
  732. last_block=address;
  733. } else {
  734. if(during_blocktrans) {
  735. /* send STOP_TRANSMISSION to end an open READ/WRITE_MULTIPLE_BLOCK */
  736. cmd_fast(STOP_TRANSMISSION, 0, 0x61, NULL, rsp);
  737. }
  738. wait_busy();
  739. last_block=address;
  740. if(!ccs) {
  741. address <<= 9;
  742. }
  743. /* only send cmd & get response */
  744. cmd_fast(WRITE_MULTIPLE_BLOCK, address, 0, NULL, rsp);
  745. DBG_SD printf("write_block: CMD25 response = %02x%02x%02x%02x%02x%02x\n", rsp[0], rsp[1], rsp[2], rsp[3], rsp[4], rsp[5]);
  746. wiggle_fast_pos(8);
  747. send_datablock(buf);
  748. during_blocktrans = TRANS_WRITE;
  749. }
  750. }
  751. //
  752. // Public functions
  753. //
  754. DRESULT sdn_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) {
  755. uint8_t sec;
  756. if(drv >= MAX_CARDS) {
  757. return RES_PARERR;
  758. }
  759. readled(1);
  760. for(sec=0; sec<count; sec++) {
  761. read_block(sector+sec, buffer);
  762. buffer+=512;
  763. }
  764. readled(0);
  765. return RES_OK;
  766. }
  767. DRESULT disk_read(BYTE drv, BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sdn_read")));
  768. DRESULT sdn_initialize(BYTE drv) {
  769. uint8_t rsp[17]; /* space for response */
  770. int rsplen;
  771. uint8_t hcs=0;
  772. rca = 0;
  773. if(drv>=MAX_CARDS) {
  774. return STA_NOINIT|STA_NODISK;
  775. }
  776. if(sdn_status(drv) & STA_NODISK) {
  777. return STA_NOINIT|STA_NODISK;
  778. }
  779. /* if the card is sending data from before a reset we try to deselect it
  780. prior to initialization */
  781. for(rsplen=0; rsplen<2042; rsplen++) {
  782. if(!(BITBAND(SD_DAT3REG->FIOPIN, SD_DAT3PIN))) {
  783. printf("card seems to be sending data, attempting deselect\n");
  784. cmd_slow(SELECT_CARD, 0, 0, NULL, rsp);
  785. }
  786. wiggle_slow_neg(1);
  787. }
  788. printf("sd_init start\n");
  789. BITBAND(SD_DAT3REG->FIODIR, SD_DAT3PIN) = 1;
  790. BITBAND(SD_DAT3REG->FIOSET, SD_DAT3PIN) = 1;
  791. cmd_slow(GO_IDLE_STATE, 0, 0x95, NULL, rsp);
  792. if((rsplen=cmd_slow(SEND_IF_COND, 0x000001aa, 0x87, NULL, rsp))) {
  793. DBG_SD printf("CMD8 response:\n");
  794. DBG_SD uart_trace(rsp, 0, rsplen);
  795. hcs=1;
  796. }
  797. while(1) {
  798. if(!(acmd_slow(SD_SEND_OP_COND, (hcs << 30) | 0xfc0000, 0, NULL, rsp))) {
  799. printf("ACMD41 no response!\n");
  800. }
  801. if(rsp[1]&0x80) break;
  802. }
  803. BITBAND(SD_DAT3REG->FIODIR, SD_DAT3PIN) = 0;
  804. BITBAND(SD_DAT3REG->FIOCLR, SD_DAT3PIN) = 1;
  805. ccs = (rsp[1]>>6) & 1; /* SDHC/XC */
  806. cmd_slow(ALL_SEND_CID, 0, 0x4d, NULL, rsp);
  807. if(cmd_slow(SEND_RELATIVE_ADDR, 0, 0x21, NULL, rsp)) {
  808. rca=(rsp[1]<<24) | (rsp[2]<<16);
  809. printf("RCA: %04lx\n", rca>>16);
  810. } else {
  811. printf("CMD3 no response!\n");
  812. rca=0;
  813. }
  814. /* record CSD for getinfo */
  815. cmd_slow(SEND_CSD, rca, 0, NULL, rsp);
  816. /* select the card */
  817. if(cmd_slow(SELECT_CARD, rca, 0, NULL, rsp)) {
  818. printf("card selected!\n");
  819. } else {
  820. printf("CMD7 no response!\n");
  821. }
  822. /* get card status */
  823. cmd_slow(SEND_STATUS, rca, 0, NULL, rsp);
  824. /* set bus width */
  825. acmd_slow(SD_SET_BUS_WIDTH, 0x2, 0, NULL, rsp);
  826. /* set block length */
  827. cmd_slow(SET_BLOCKLEN, 0x200, 0, NULL, rsp);
  828. printf("SD init complete. SDHC/XC=%d\n", ccs);
  829. disk_state = DISK_OK;
  830. during_blocktrans = TRANS_NONE;
  831. return sdn_status(drv);
  832. }
  833. DSTATUS disk_initialize(BYTE drv) __attribute__ ((weak, alias("sdn_initialize")));
  834. void sdn_init(void) {
  835. /* enable GPIO interrupt on SD detect pin, both edges */
  836. /* NVIC_EnableIRQ(EINT3_IRQn);
  837. SD_DT_INT_SETUP(); */
  838. /* disconnect SSP1 */
  839. LPC_PINCON->PINSEL0 &= ~(BV(13) | BV(15) | BV(17) | BV(19));
  840. /* prepare GPIOs */
  841. BITBAND(SD_DAT3REG->FIODIR, SD_DAT3PIN) = 0;
  842. BITBAND(SD_DAT2REG->FIODIR, SD_DAT2PIN) = 0;
  843. BITBAND(SD_DAT1REG->FIODIR, SD_DAT1PIN) = 0;
  844. BITBAND(SD_DAT0REG->FIODIR, SD_DAT0PIN) = 0;
  845. BITBAND(SD_CLKREG->FIODIR, SD_CLKPIN) = 1;
  846. BITBAND(SD_CMDREG->FIODIR, SD_CMDPIN) = 1;
  847. BITBAND(SD_CMDREG->FIOPIN, SD_CMDPIN) = 1;
  848. LPC_GPIO2->FIOPIN0 = 0x00;
  849. LPC_GPIO2->FIOMASK0 = ~0xf;
  850. }
  851. void disk_init(void) __attribute__ ((weak, alias("sdn_init")));
  852. DSTATUS sdn_status(BYTE drv) {
  853. if (SDCARD_DETECT) {
  854. if (SDCARD_WP) {
  855. return STA_PROTECT;
  856. } else {
  857. return RES_OK;
  858. }
  859. } else {
  860. return STA_NOINIT|STA_NODISK;
  861. }
  862. }
  863. DSTATUS disk_status(BYTE drv) __attribute__ ((weak, alias("sdn_status")));
  864. DRESULT sdn_getinfo(BYTE drv, BYTE page, void *buffer) {
  865. uint32_t capacity;
  866. if (drv >= MAX_CARDS) {
  867. return RES_NOTRDY;
  868. }
  869. if (sdn_status(drv) & STA_NODISK) {
  870. return RES_NOTRDY;
  871. }
  872. if (page != 0) {
  873. return RES_ERROR;
  874. }
  875. if (ccs) {
  876. /* Special CSD for SDHC cards */
  877. capacity = (1 + getbits(csd,127-69+8,22)) * 1024;
  878. } else {
  879. /* Assume that MMC-CSD 1.0/1.1/1.2 and SD-CSD 1.1 are the same... */
  880. uint8_t exponent = 2 + getbits(csd, 127-49+8, 3);
  881. capacity = 1 + getbits(csd, 127-73+8, 12);
  882. exponent += getbits(csd, 127-83+8,4) - 9;
  883. while (exponent--) capacity *= 2;
  884. }
  885. diskinfo0_t *di = buffer;
  886. di->validbytes = sizeof(diskinfo0_t);
  887. di->disktype = DISK_TYPE_SD;
  888. di->sectorsize = 2;
  889. di->sectorcount = capacity;
  890. printf("card capacity: %lu sectors\n", capacity);
  891. return RES_OK;
  892. }
  893. DRESULT disk_getinfo(BYTE drv, BYTE page, void *buffer) __attribute__ ((weak, alias("sdn_getinfo")));
  894. DRESULT sdn_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) {
  895. uint8_t sec;
  896. uint8_t *buf = (uint8_t*)buffer;
  897. if(drv >= MAX_CARDS) {
  898. return RES_NOTRDY;
  899. }
  900. if (sdn_status(drv) & STA_NODISK) {
  901. return RES_NOTRDY;
  902. }
  903. writeled(1);
  904. for(sec=0; sec<count; sec++) {
  905. write_block(sector+sec, buf);
  906. buf+=512;
  907. }
  908. writeled(0);
  909. return RES_OK;
  910. }
  911. DRESULT disk_write(BYTE drv, const BYTE *buffer, DWORD sector, BYTE count) __attribute__ ((weak, alias("sdn_write")));
  912. /* Detect changes of SD card 0 */
  913. void sdn_changed() {
  914. if (sd_changed) {
  915. printf("ch ");
  916. if(SDCARD_DETECT) {
  917. disk_state = DISK_CHANGED;
  918. } else {
  919. disk_state = DISK_REMOVED;
  920. }
  921. sd_changed = 0;
  922. }
  923. }