sdnative.c 38 KB

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  1. #include <arm/NXP/LPC17xx/LPC17xx.h>
  2. #include <stdio.h>
  3. #include "config.h"
  4. #include "crc.h"
  5. #include "crc16.h"
  6. #include "diskio.h"
  7. #include "spi.h"
  8. #include "timer.h"
  9. #include "uart.h"
  10. #include "led.h"
  11. #include "sdnative.h"
  12. #include "fileops.h"
  13. #include "bits.h"
  14. #include "fpga_spi.h"
  15. #include "memory.h"
  16. #define MAX_CARDS 1
  17. // SD/MMC commands
  18. #define GO_IDLE_STATE 0
  19. #define SEND_OP_COND 1
  20. #define ALL_SEND_CID 2
  21. #define SEND_RELATIVE_ADDR 3
  22. #define SWITCH_FUNC 6
  23. #define SELECT_CARD 7
  24. #define SEND_IF_COND 8
  25. #define SEND_CSD 9
  26. #define SEND_CID 10
  27. #define STOP_TRANSMISSION 12
  28. #define SEND_STATUS 13
  29. #define GO_INACTIVE_STATE 15
  30. #define SET_BLOCKLEN 16
  31. #define READ_SINGLE_BLOCK 17
  32. #define READ_MULTIPLE_BLOCK 18
  33. #define WRITE_BLOCK 24
  34. #define WRITE_MULTIPLE_BLOCK 25
  35. #define PROGRAM_CSD 27
  36. #define SET_WRITE_PROT 28
  37. #define CLR_WRITE_PROT 29
  38. #define SEND_WRITE_PROT 30
  39. #define ERASE_WR_BLK_STAR_ADDR 32
  40. #define ERASE_WR_BLK_END_ADDR 33
  41. #define ERASE 38
  42. #define LOCK_UNLOCK 42
  43. #define APP_CMD 55
  44. #define GEN_CMD 56
  45. #define READ_OCR 58
  46. #define CRC_ON_OFF 59
  47. // SD ACMDs
  48. #define SD_SET_BUS_WIDTH 6
  49. #define SD_STATUS 13
  50. #define SD_SEND_NUM_WR_BLOCKS 22
  51. #define SD_SET_WR_BLK_ERASE_COUNT 23
  52. #define SD_SEND_OP_COND 41
  53. #define SD_SET_CLR_CARD_DETECT 42
  54. #define SD_SEND_SCR 51
  55. // R1 status bits
  56. #define STATUS_IN_IDLE 1
  57. #define STATUS_ERASE_RESET 2
  58. #define STATUS_ILLEGAL_COMMAND 4
  59. #define STATUS_CRC_ERROR 8
  60. #define STATUS_ERASE_SEQ_ERROR 16
  61. #define STATUS_ADDRESS_ERROR 32
  62. #define STATUS_PARAMETER_ERROR 64
  63. /* Card types - cardtype == 0 is MMC */
  64. #define CARD_SD (1<<0)
  65. #define CARD_SDHC (1<<1)
  66. /*
  67. Rev.A Rev.C
  68. 1 DAT3/SS P0.6 P2.3
  69. 2 CMD/DI P0.9 P0.9
  70. 5 Clock P0.7 P0.7
  71. 7 DAT0/DO P0.8 P2.0
  72. 8 DAT1/IRQ P1.14 P2.1
  73. 9 DAT2/NC P1.15 P2.2
  74. */
  75. /* SD init procedure
  76. =================
  77. - initial clock frequency: ~100kHz
  78. - cycle the clock for at least 74 cycles (some more may be safer)
  79. - send CMD0
  80. - send CMD8 (SEND_OP_COND); if no response -> HCS=0; else HCS=1
  81. - send ACMD41 until OCR[31] (busy) becomes 1 (means: ready)
  82. - if OCR[30] (CCS) set -> SDHC; else SDSC
  83. - send CMD2 (read CID) (maybe log some stuff from the CID)
  84. - send CMD3 (read RCA), store RCA
  85. == end of initialisation ==
  86. - send CMD9 (read CSD) with RCA, maybe do sth with TRAN_SPEED
  87. - send CMD7 with RCA, select card, put card in tran
  88. - maybe send CMD13 with RCA to check state (tran)
  89. - send ACMD51 with RCA to read SCR (maybe, to check 4bit support)
  90. - increase clock speed
  91. - send ACMD6 with RCA to set 4bit bus width
  92. - send transfer cmds
  93. */
  94. /*
  95. static CMD payloads. (no CRC calc required)
  96. - CMD0: 0x40 0x00 0x00 0x00 0x00 0x95
  97. - CMD8: 0x48 0x00 0x00 0x01 0xaa 0x87
  98. - CMD2: 0x42 0x00 0x00 0x00 0x00 0x4d
  99. - CMD3: 0x43 0x00 0x00 0x00 0x00 0x21
  100. - CMD55: 0x77 0x00 0x00 0x00 0x00 0x65
  101. */
  102. uint8_t cmd[6] = {0, 0, 0, 0, 0, 0};
  103. uint8_t rsp[17];
  104. uint8_t csd[17];
  105. uint8_t cid[17];
  106. diskinfo0_t di;
  107. uint8_t ccs = 0;
  108. uint32_t rca;
  109. enum trans_state { TRANS_NONE = 0, TRANS_READ, TRANS_WRITE, TRANS_MID };
  110. enum cmd_state { CMD_RSP = 0, CMD_RSPDAT, CMD_DAT };
  111. int during_blocktrans = TRANS_NONE;
  112. uint32_t last_block = 0;
  113. uint16_t last_offset = 0;
  114. volatile int sd_changed;
  115. /**
  116. * getbits - read value from bit buffer
  117. * @buffer: pointer to the data buffer
  118. * @start : index of the first bit in the value
  119. * @bits : number of bits in the value
  120. *
  121. * This function returns a value from the memory region passed as
  122. * buffer, starting with bit "start" and "bits" bit long. The buffer
  123. * is assumed to be MSB first, passing 0 for start will read starting
  124. * from the highest-value bit of the first byte of the buffer.
  125. */
  126. static uint32_t getbits( void *buffer, uint16_t start, int8_t bits )
  127. {
  128. uint8_t *buf = buffer;
  129. uint32_t result = 0;
  130. if ( ( start % 8 ) != 0 )
  131. {
  132. /* Unaligned start */
  133. result += buf[start / 8] & ( 0xff >> ( start % 8 ) );
  134. bits -= 8 - ( start % 8 );
  135. start += 8 - ( start % 8 );
  136. }
  137. while ( bits >= 8 )
  138. {
  139. result = ( result << 8 ) + buf[start / 8];
  140. start += 8;
  141. bits -= 8;
  142. }
  143. if ( bits > 0 )
  144. {
  145. result = result << bits;
  146. result = result + ( buf[start / 8] >> ( 8 - bits ) );
  147. }
  148. else if ( bits < 0 )
  149. {
  150. /* Fraction of a single byte */
  151. result = result >> -bits;
  152. }
  153. return result;
  154. }
  155. void sdn_checkinit( BYTE drv )
  156. {
  157. if ( disk_state == DISK_CHANGED )
  158. {
  159. disk_initialize( drv );
  160. }
  161. }
  162. uint8_t *sdn_getcid()
  163. {
  164. sdn_checkinit( 0 );
  165. return cid;
  166. }
  167. static inline void wiggle_slow_pos( uint16_t times )
  168. {
  169. while ( times-- )
  170. {
  171. delay_us( 2 );
  172. BITBAND( SD_CLKREG->FIOSET, SD_CLKPIN ) = 1;
  173. delay_us( 2 );
  174. BITBAND( SD_CLKREG->FIOCLR, SD_CLKPIN ) = 1;
  175. }
  176. }
  177. static inline void wiggle_slow_neg( uint16_t times )
  178. {
  179. while ( times-- )
  180. {
  181. delay_us( 2 );
  182. BITBAND( SD_CLKREG->FIOCLR, SD_CLKPIN ) = 1;
  183. delay_us( 2 );
  184. BITBAND( SD_CLKREG->FIOSET, SD_CLKPIN ) = 1;
  185. }
  186. }
  187. static inline void wiggle_fast_pos( uint16_t times )
  188. {
  189. while ( times-- )
  190. {
  191. BITBAND( SD_CLKREG->FIOSET, SD_CLKPIN ) = 1;
  192. BITBAND( SD_CLKREG->FIOCLR, SD_CLKPIN ) = 1;
  193. }
  194. }
  195. static inline void wiggle_fast_neg( uint16_t times )
  196. {
  197. while ( times-- )
  198. {
  199. BITBAND( SD_CLKREG->FIOCLR, SD_CLKPIN ) = 1;
  200. BITBAND( SD_CLKREG->FIOSET, SD_CLKPIN ) = 1;
  201. }
  202. }
  203. static inline void wiggle_fast_neg1( void )
  204. {
  205. BITBAND( SD_CLKREG->FIOCLR, SD_CLKPIN ) = 1;
  206. BITBAND( SD_CLKREG->FIOSET, SD_CLKPIN ) = 1;
  207. }
  208. static inline void wiggle_fast_pos1( void )
  209. {
  210. BITBAND( SD_CLKREG->FIOSET, SD_CLKPIN ) = 1;
  211. BITBAND( SD_CLKREG->FIOCLR, SD_CLKPIN ) = 1;
  212. }
  213. int get_and_check_datacrc( uint8_t *buf )
  214. {
  215. uint16_t crc0 = 0, crc1 = 0, crc2 = 0, crc3 = 0;
  216. uint16_t sdcrc0 = 0, sdcrc1 = 0, sdcrc2 = 0, sdcrc3 = 0;
  217. uint8_t d0 = 0, d1 = 0, d2 = 0, d3 = 0;
  218. uint8_t datdata;
  219. uint16_t datcnt;
  220. /* get crcs from card */
  221. for ( datcnt = 0; datcnt < 16; datcnt++ )
  222. {
  223. datdata = SD_DAT;
  224. wiggle_fast_neg1();
  225. sdcrc0 = ( ( sdcrc0 << 1 ) & 0xfffe ) | ( ( datdata >> 3 ) & 0x0001 );
  226. sdcrc1 = ( ( sdcrc1 << 1 ) & 0xfffe ) | ( ( datdata >> 2 ) & 0x0001 );
  227. sdcrc2 = ( ( sdcrc2 << 1 ) & 0xfffe ) | ( ( datdata >> 1 ) & 0x0001 );
  228. sdcrc3 = ( ( sdcrc3 << 1 ) & 0xfffe ) | ( ( datdata >> 0 ) & 0x0001 );
  229. }
  230. wiggle_fast_neg1();
  231. /* calc crcs from data */
  232. for ( datcnt = 0; datcnt < 512; datcnt++ )
  233. {
  234. d0 = ( ( d0 << 2 ) & 0xfc ) | ( ( buf[datcnt] >> 6 ) & 0x02 ) | ( ( buf[datcnt] >> 3 ) & 0x01 ) ;
  235. d1 = ( ( d1 << 2 ) & 0xfc ) | ( ( buf[datcnt] >> 5 ) & 0x02 ) | ( ( buf[datcnt] >> 2 ) & 0x01 ) ;
  236. d2 = ( ( d2 << 2 ) & 0xfc ) | ( ( buf[datcnt] >> 4 ) & 0x02 ) | ( ( buf[datcnt] >> 1 ) & 0x01 ) ;
  237. d3 = ( ( d3 << 2 ) & 0xfc ) | ( ( buf[datcnt] >> 3 ) & 0x02 ) | ( ( buf[datcnt] >> 0 ) & 0x01 ) ;
  238. if ( ( datcnt % 4 ) == 3 )
  239. {
  240. crc0 = crc_xmodem_update( crc0, d0 );
  241. crc1 = crc_xmodem_update( crc1, d1 );
  242. crc2 = crc_xmodem_update( crc2, d2 );
  243. crc3 = crc_xmodem_update( crc3, d3 );
  244. }
  245. }
  246. if ( ( crc0 != sdcrc0 ) || ( crc1 != sdcrc1 ) || ( crc2 != sdcrc2 ) || ( crc3 != sdcrc3 ) )
  247. {
  248. printf( "CRC mismatch\nSDCRC CRC\n %04x %04x\n %04x %04x\n %04x %04x\n %04x %04x\n", sdcrc0, crc0, sdcrc1,
  249. crc1, sdcrc2, crc2, sdcrc3, crc3 );
  250. return 1;
  251. }
  252. return 0;
  253. }
  254. static inline void wait_busy( void )
  255. {
  256. while ( !( BITBAND( SD_DAT0REG->FIOPIN, SD_DAT0PIN ) ) )
  257. {
  258. wiggle_fast_neg1();
  259. }
  260. wiggle_fast_neg( 4 );
  261. }
  262. /*
  263. send_command_slow
  264. send SD command and put response in rsp.
  265. returns length of response or 0 if there was no response
  266. */
  267. int send_command_slow( uint8_t *cmd, uint8_t *rsp )
  268. {
  269. uint8_t shift, i = 6;
  270. int rsplen;
  271. uint8_t cmdno = *cmd & 0x3f;
  272. wiggle_slow_pos( 5 );
  273. switch ( *cmd & 0x3f )
  274. {
  275. case 0:
  276. rsplen = 0;
  277. break;
  278. case 2:
  279. case 9:
  280. case 10:
  281. rsplen = 17;
  282. break;
  283. default:
  284. rsplen = 6;
  285. }
  286. /* send command */
  287. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 1;
  288. while ( i-- )
  289. {
  290. shift = 8;
  291. do
  292. {
  293. shift--;
  294. uint8_t data = *cmd;
  295. *cmd <<= 1;
  296. if ( data & 0x80 )
  297. {
  298. BITBAND( SD_CMDREG->FIOSET, SD_CMDPIN ) = 1;
  299. }
  300. else
  301. {
  302. BITBAND( SD_CMDREG->FIOCLR, SD_CMDPIN ) = 1;
  303. }
  304. wiggle_slow_pos( 1 );
  305. }
  306. while ( shift );
  307. cmd++;
  308. }
  309. wiggle_slow_pos( 1 );
  310. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 0;
  311. if ( rsplen )
  312. {
  313. uint16_t timeout = 1000;
  314. while ( ( BITBAND( SD_CMDREG->FIOPIN, SD_CMDPIN ) ) && --timeout )
  315. {
  316. wiggle_slow_neg( 1 );
  317. }
  318. if ( !timeout )
  319. {
  320. printf( "CMD%d timed out\n", cmdno );
  321. return 0; /* no response within timeout */
  322. }
  323. i = rsplen;
  324. while ( i-- )
  325. {
  326. shift = 8;
  327. uint8_t data = 0;
  328. do
  329. {
  330. shift--;
  331. data |= ( BITBAND( SD_CMDREG->FIOPIN, SD_CMDPIN ) ) << shift;
  332. wiggle_slow_neg( 1 );
  333. }
  334. while ( shift );
  335. *rsp = data;
  336. rsp++;
  337. }
  338. }
  339. return rsplen;
  340. }
  341. /*
  342. send_command_fast
  343. send SD command and put response in rsp.
  344. returns length of response or 0 if there was no response
  345. */
  346. int send_command_fast( uint8_t *cmd, uint8_t *rsp, uint8_t *buf )
  347. {
  348. uint8_t datshift = 8, cmdshift, i = 6;
  349. uint8_t cmdno = *cmd & 0x3f;
  350. int rsplen, dat = 0, waitbusy = 0, datcnt = 512, j = 0;
  351. static int state = CMD_RSP;
  352. wiggle_fast_pos( 9 ); /* give the card >=8 cycles after last command */
  353. DBG_SD printf( "send_command_fast: sending CMD%d; payload=%02x%02x%02x%02x%02x%02x...\n", cmdno, cmd[0], cmd[1], cmd[2],
  354. cmd[3], cmd[4], cmd[5] );
  355. switch ( *cmd & 0x3f )
  356. {
  357. case 0:
  358. rsplen = 0;
  359. break;
  360. case 2:
  361. case 9:
  362. case 10:
  363. rsplen = 17;
  364. break;
  365. case 12:
  366. rsplen = 6;
  367. waitbusy = 1;
  368. break;
  369. case 13:
  370. case 17:
  371. case 18:
  372. dat = 1;
  373. default:
  374. rsplen = 6;
  375. }
  376. if ( dat && ( buf == NULL ) && !sd_offload )
  377. {
  378. printf( "send_command_fast error: buf is null but data transfer expected.\n" );
  379. return 0;
  380. }
  381. /* send command */
  382. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 1;
  383. while ( i-- )
  384. {
  385. uint8_t data = *cmd;
  386. cmdshift = 8;
  387. do
  388. {
  389. cmdshift--;
  390. if ( data & 0x80 )
  391. {
  392. BITBAND( SD_CMDREG->FIOSET, SD_CMDPIN ) = 1;
  393. }
  394. else
  395. {
  396. BITBAND( SD_CMDREG->FIOCLR, SD_CMDPIN ) = 1;
  397. }
  398. data <<= 1;
  399. wiggle_fast_pos1();
  400. }
  401. while ( cmdshift );
  402. cmd++;
  403. }
  404. wiggle_fast_pos1();
  405. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 0;
  406. if ( rsplen )
  407. {
  408. uint32_t timeout = 200000;
  409. /* wait for response */
  410. while ( ( BITBAND( SD_CMDREG->FIOPIN, SD_CMDPIN ) ) && --timeout )
  411. {
  412. wiggle_fast_neg1();
  413. }
  414. if ( !timeout )
  415. {
  416. printf( "CMD%d timed out\n", cmdno );
  417. return 0; /* no response within timeout */
  418. }
  419. i = rsplen;
  420. uint8_t cmddata = 0, datdata = 0;
  421. while ( i-- ) /* process response */
  422. {
  423. cmdshift = 8;
  424. do
  425. {
  426. if ( dat )
  427. {
  428. if ( !( BITBAND( SD_DAT0REG->FIOPIN, SD_DAT0PIN ) ) )
  429. {
  430. printf( "data start during response\n" );
  431. j = datcnt;
  432. state = CMD_RSPDAT;
  433. break;
  434. }
  435. }
  436. cmdshift--;
  437. cmddata |= ( BITBAND( SD_CMDREG->FIOPIN, SD_CMDPIN ) ) << cmdshift;
  438. wiggle_fast_neg1();
  439. }
  440. while ( cmdshift );
  441. if ( state == CMD_RSPDAT )
  442. {
  443. break;
  444. }
  445. *rsp = cmddata;
  446. cmddata = 0;
  447. rsp++;
  448. }
  449. if ( state == CMD_RSPDAT ) /* process response+data */
  450. {
  451. int startbit = 1;
  452. DBG_SD printf( "processing rsp+data cmdshift=%d i=%d j=%d\n", cmdshift, i, j );
  453. datshift = 8;
  454. while ( 1 )
  455. {
  456. cmdshift--;
  457. cmddata |= ( BITBAND( SD_CMDREG->FIOPIN, SD_CMDPIN ) ) << cmdshift;
  458. if ( !cmdshift )
  459. {
  460. cmdshift = 8;
  461. *rsp = cmddata;
  462. cmddata = 0;
  463. rsp++;
  464. i--;
  465. if ( !i )
  466. {
  467. DBG_SD printf( "response end\n" );
  468. if ( j )
  469. {
  470. state = CMD_DAT; /* response over, remaining data */
  471. }
  472. break;
  473. }
  474. }
  475. if ( !startbit )
  476. {
  477. datshift -= 4;
  478. datdata |= SD_DAT << datshift;
  479. if ( !datshift )
  480. {
  481. datshift = 8;
  482. *buf = datdata;
  483. datdata = 0;
  484. buf++;
  485. j--;
  486. if ( !j )
  487. {
  488. break;
  489. }
  490. }
  491. }
  492. startbit = 0;
  493. wiggle_fast_neg1();
  494. }
  495. }
  496. if ( dat && state != CMD_DAT ) /* response ended before data */
  497. {
  498. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 1;
  499. state = CMD_DAT;
  500. j = datcnt;
  501. datshift = 8;
  502. timeout = 2000000;
  503. DBG_SD printf( "response over, waiting for data...\n" );
  504. /* wait for data start bit on DAT0 */
  505. while ( ( BITBAND( SD_DAT0REG->FIOPIN, SD_DAT0PIN ) ) && --timeout )
  506. {
  507. wiggle_fast_neg1();
  508. }
  509. // printf("%ld\n", timeout);
  510. if ( !timeout )
  511. {
  512. printf( "timed out!\n" );
  513. }
  514. wiggle_fast_neg1(); /* eat the start bit */
  515. if ( sd_offload )
  516. {
  517. if ( sd_offload_partial )
  518. {
  519. if ( sd_offload_partial_start != 0 )
  520. {
  521. if ( during_blocktrans == TRANS_MID )
  522. {
  523. sd_offload_partial_start |= 0x8000;
  524. }
  525. }
  526. if ( sd_offload_partial_end != 512 )
  527. {
  528. sd_offload_partial_end |= 0x8000;
  529. }
  530. DBG_SD printf( "new partial %d - %d\n", sd_offload_partial_start, sd_offload_partial_end );
  531. fpga_set_sddma_range( sd_offload_partial_start, sd_offload_partial_end );
  532. fpga_sddma( sd_offload_tgt, 1 );
  533. // sd_offload_partial=0;
  534. last_offset = sd_offload_partial_end;
  535. }
  536. else
  537. {
  538. fpga_sddma( sd_offload_tgt, 0 );
  539. last_offset = 0;
  540. }
  541. state = CMD_RSP;
  542. return rsplen;
  543. }
  544. }
  545. if ( state == CMD_DAT ) /* transfer rest of data */
  546. {
  547. DBG_SD printf( "remaining data: %d\n", j );
  548. if ( datshift == 8 )
  549. {
  550. while ( 1 )
  551. {
  552. datdata |= SD_DAT << 4;
  553. wiggle_fast_neg1();
  554. datdata |= SD_DAT;
  555. wiggle_fast_neg1();
  556. *buf = datdata;
  557. datdata = 0;
  558. buf++;
  559. j--;
  560. if ( !j )
  561. {
  562. break;
  563. }
  564. }
  565. }
  566. else
  567. {
  568. while ( 1 )
  569. {
  570. datshift -= 4;
  571. datdata |= SD_DAT << datshift;
  572. if ( !datshift )
  573. {
  574. datshift = 8;
  575. *buf = datdata;
  576. datdata = 0;
  577. buf++;
  578. j--;
  579. if ( !j )
  580. {
  581. break;
  582. }
  583. }
  584. wiggle_fast_neg1();
  585. }
  586. }
  587. }
  588. if ( dat )
  589. {
  590. #ifdef CONFIG_SD_DATACRC
  591. if ( get_and_check_datacrc( buf - 512 ) )
  592. {
  593. return CRC_ERROR;
  594. }
  595. #else
  596. /* eat the crcs */
  597. wiggle_fast_neg( 17 );
  598. #endif
  599. }
  600. if ( waitbusy )
  601. {
  602. DBG_SD printf( "waitbusy after send_cmd\n" );
  603. wait_busy();
  604. }
  605. state = CMD_RSP;
  606. }
  607. rsp -= rsplen;
  608. DBG_SD printf( "send_command_fast: CMD%d response: %02x%02x%02x%02x%02x%02x\n", cmdno, rsp[0], rsp[1], rsp[2], rsp[3],
  609. rsp[4], rsp[5] );
  610. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 1;
  611. return rsplen;
  612. }
  613. static inline void make_crc7( uint8_t *cmd )
  614. {
  615. cmd[5] = crc7update( 0, cmd[0] );
  616. cmd[5] = crc7update( cmd[5], cmd[1] );
  617. cmd[5] = crc7update( cmd[5], cmd[2] );
  618. cmd[5] = crc7update( cmd[5], cmd[3] );
  619. cmd[5] = crc7update( cmd[5], cmd[4] );
  620. cmd[5] = ( cmd[5] << 1 ) | 1;
  621. }
  622. int cmd_slow( uint8_t cmd, uint32_t param, uint8_t crc, uint8_t *dat, uint8_t *rsp )
  623. {
  624. uint8_t cmdbuf[6];
  625. cmdbuf[0] = 0x40 | cmd;
  626. cmdbuf[1] = param >> 24;
  627. cmdbuf[2] = param >> 16;
  628. cmdbuf[3] = param >> 8;
  629. cmdbuf[4] = param;
  630. if ( !crc )
  631. {
  632. make_crc7( cmdbuf );
  633. }
  634. else
  635. {
  636. cmdbuf[5] = crc;
  637. }
  638. return send_command_slow( cmdbuf, rsp );
  639. }
  640. int acmd_slow( uint8_t cmd, uint32_t param, uint8_t crc, uint8_t *dat, uint8_t *rsp )
  641. {
  642. if ( !( cmd_slow( APP_CMD, rca, 0, NULL, rsp ) ) )
  643. {
  644. return 0;
  645. }
  646. return cmd_slow( cmd, param, crc, dat, rsp );
  647. }
  648. int cmd_fast( uint8_t cmd, uint32_t param, uint8_t crc, uint8_t *dat, uint8_t *rsp )
  649. {
  650. uint8_t cmdbuf[6];
  651. cmdbuf[0] = 0x40 | cmd;
  652. cmdbuf[1] = param >> 24;
  653. cmdbuf[2] = param >> 16;
  654. cmdbuf[3] = param >> 8;
  655. cmdbuf[4] = param;
  656. if ( !crc )
  657. {
  658. make_crc7( cmdbuf );
  659. }
  660. else
  661. {
  662. cmdbuf[5] = crc;
  663. }
  664. return send_command_fast( cmdbuf, rsp, dat );
  665. }
  666. int acmd_fast( uint8_t cmd, uint32_t param, uint8_t crc, uint8_t *dat, uint8_t *rsp )
  667. {
  668. if ( !( cmd_fast( APP_CMD, rca, 0, NULL, rsp ) ) )
  669. {
  670. return 0;
  671. }
  672. return cmd_fast( cmd, param, crc, dat, rsp );
  673. }
  674. int stream_datablock( uint8_t *buf )
  675. {
  676. // uint8_t datshift=8;
  677. int j = 512;
  678. uint8_t datdata = 0;
  679. uint32_t timeout = 1000000;
  680. DBG_SD printf( "stream_datablock: wait for ready...\n" );
  681. if ( during_blocktrans != TRANS_MID )
  682. {
  683. while ( ( BITBAND( SD_DAT0REG->FIOPIN, SD_DAT0PIN ) ) && --timeout )
  684. {
  685. wiggle_fast_neg1();
  686. }
  687. DBG_SD if ( !timeout )
  688. {
  689. printf( "timeout!\n" );
  690. }
  691. wiggle_fast_neg1(); /* eat the start bit */
  692. }
  693. if ( sd_offload )
  694. {
  695. if ( sd_offload_partial )
  696. {
  697. if ( sd_offload_partial_start != 0 )
  698. {
  699. if ( during_blocktrans == TRANS_MID )
  700. {
  701. sd_offload_partial_start |= 0x8000;
  702. }
  703. }
  704. if ( sd_offload_partial_end != 512 )
  705. {
  706. sd_offload_partial_end |= 0x8000;
  707. }
  708. DBG_SD printf( "str partial %d - %d\n", sd_offload_partial_start, sd_offload_partial_end );
  709. fpga_set_sddma_range( sd_offload_partial_start, sd_offload_partial_end );
  710. fpga_sddma( sd_offload_tgt, 1 );
  711. }
  712. else
  713. {
  714. fpga_sddma( sd_offload_tgt, 0 );
  715. }
  716. }
  717. else
  718. {
  719. while ( 1 )
  720. {
  721. datdata = SD_DAT << 4;
  722. wiggle_fast_neg1();
  723. datdata |= SD_DAT;
  724. wiggle_fast_neg1();
  725. *buf = datdata;
  726. buf++;
  727. j--;
  728. if ( !j )
  729. {
  730. break;
  731. }
  732. }
  733. #ifdef CONFIG_SD_DATACRC
  734. return get_and_check_datacrc( buf - 512 );
  735. #else
  736. /* eat the crcs */
  737. wiggle_fast_neg( 17 );
  738. #endif
  739. }
  740. return 0;
  741. }
  742. void send_datablock( uint8_t *buf )
  743. {
  744. uint16_t crc0 = 0, crc1 = 0, crc2 = 0, crc3 = 0, cnt = 512;
  745. uint8_t dat0 = 0, dat1 = 0, dat2 = 0, dat3 = 0, crcshift, datshift;
  746. wiggle_fast_pos1();
  747. BITBAND( SD_DAT0REG->FIODIR, SD_DAT0PIN ) = 1;
  748. BITBAND( SD_DAT1REG->FIODIR, SD_DAT1PIN ) = 1;
  749. BITBAND( SD_DAT2REG->FIODIR, SD_DAT2PIN ) = 1;
  750. BITBAND( SD_DAT3REG->FIODIR, SD_DAT3PIN ) = 1;
  751. BITBAND( SD_DAT0REG->FIOCLR, SD_DAT0PIN ) = 1;
  752. BITBAND( SD_DAT1REG->FIOCLR, SD_DAT1PIN ) = 1;
  753. BITBAND( SD_DAT2REG->FIOCLR, SD_DAT2PIN ) = 1;
  754. BITBAND( SD_DAT3REG->FIOCLR, SD_DAT3PIN ) = 1;
  755. wiggle_fast_pos1(); /* send start bit to card */
  756. crcshift = 8;
  757. while ( cnt-- )
  758. {
  759. datshift = 8;
  760. do
  761. {
  762. datshift -= 4;
  763. /* if(((*buf)>>datshift) & 0x8) {
  764. BITBAND(SD_DAT3REG->FIOSET, SD_DAT3PIN) = 1;
  765. } else {
  766. BITBAND(SD_DAT3REG->FIOCLR, SD_DAT3PIN) = 1;
  767. }
  768. if(((*buf)>>datshift) & 0x4) {
  769. BITBAND(SD_DAT2REG->FIOSET, SD_DAT2PIN) = 1;
  770. } else {
  771. BITBAND(SD_DAT2REG->FIOCLR, SD_DAT2PIN) = 1;
  772. }
  773. if(((*buf)>>datshift) & 0x2){
  774. BITBAND(SD_DAT1REG->FIOSET, SD_DAT1PIN) = 1;
  775. } else {
  776. BITBAND(SD_DAT1REG->FIOCLR, SD_DAT1PIN) = 1;
  777. }
  778. if(((*buf)>>datshift) & 0x1){
  779. BITBAND(SD_DAT0REG->FIOSET, SD_DAT0PIN) = 1;
  780. } else {
  781. BITBAND(SD_DAT0REG->FIOCLR, SD_DAT0PIN) = 1;
  782. }*/
  783. SD_DAT0REG->FIOPIN0 = ( *buf ) >> datshift;
  784. wiggle_fast_pos1();
  785. }
  786. while ( datshift );
  787. crcshift -= 2;
  788. dat0 |= ( ( ( *buf ) & 0x01 ) | ( ( ( *buf ) & 0x10 ) >> 3 ) ) << crcshift;
  789. dat1 |= ( ( ( ( *buf ) & 0x02 ) >> 1 ) | ( ( ( *buf ) & 0x20 ) >> 4 ) ) << crcshift;
  790. dat2 |= ( ( ( ( *buf ) & 0x04 ) >> 2 ) | ( ( ( *buf ) & 0x40 ) >> 5 ) ) << crcshift;
  791. dat3 |= ( ( ( ( *buf ) & 0x08 ) >> 3 ) | ( ( ( *buf ) & 0x80 ) >> 6 ) ) << crcshift;
  792. if ( !crcshift )
  793. {
  794. crc0 = crc_xmodem_update( crc0, dat0 );
  795. crc1 = crc_xmodem_update( crc1, dat1 );
  796. crc2 = crc_xmodem_update( crc2, dat2 );
  797. crc3 = crc_xmodem_update( crc3, dat3 );
  798. crcshift = 8;
  799. dat0 = 0;
  800. dat1 = 0;
  801. dat2 = 0;
  802. dat3 = 0;
  803. }
  804. buf++;
  805. }
  806. // printf("crc0=%04x crc1=%04x crc2=%04x crc3=%04x ", crc0, crc1, crc2, crc3);
  807. /* send crcs */
  808. datshift = 16;
  809. do
  810. {
  811. datshift--;
  812. if ( ( crc0 >> datshift ) & 1 )
  813. {
  814. BITBAND( SD_DAT0REG->FIOSET, SD_DAT0PIN ) = 1;
  815. }
  816. else
  817. {
  818. BITBAND( SD_DAT0REG->FIOCLR, SD_DAT0PIN ) = 1;
  819. }
  820. if ( ( crc1 >> datshift ) & 1 )
  821. {
  822. BITBAND( SD_DAT1REG->FIOSET, SD_DAT1PIN ) = 1;
  823. }
  824. else
  825. {
  826. BITBAND( SD_DAT1REG->FIOCLR, SD_DAT1PIN ) = 1;
  827. }
  828. if ( ( crc2 >> datshift ) & 1 )
  829. {
  830. BITBAND( SD_DAT2REG->FIOSET, SD_DAT2PIN ) = 1;
  831. }
  832. else
  833. {
  834. BITBAND( SD_DAT2REG->FIOCLR, SD_DAT2PIN ) = 1;
  835. }
  836. if ( ( crc3 >> datshift ) & 1 )
  837. {
  838. BITBAND( SD_DAT3REG->FIOSET, SD_DAT3PIN ) = 1;
  839. }
  840. else
  841. {
  842. BITBAND( SD_DAT3REG->FIOCLR, SD_DAT3PIN ) = 1;
  843. }
  844. wiggle_fast_pos1();
  845. }
  846. while ( datshift );
  847. /* send end bit */
  848. BITBAND( SD_DAT0REG->FIOSET, SD_DAT0PIN ) = 1;
  849. BITBAND( SD_DAT1REG->FIOSET, SD_DAT1PIN ) = 1;
  850. BITBAND( SD_DAT2REG->FIOSET, SD_DAT2PIN ) = 1;
  851. BITBAND( SD_DAT3REG->FIOSET, SD_DAT3PIN ) = 1;
  852. wiggle_fast_pos1();
  853. BITBAND( SD_DAT0REG->FIODIR, SD_DAT0PIN ) = 0;
  854. BITBAND( SD_DAT1REG->FIODIR, SD_DAT1PIN ) = 0;
  855. BITBAND( SD_DAT2REG->FIODIR, SD_DAT2PIN ) = 0;
  856. BITBAND( SD_DAT3REG->FIODIR, SD_DAT3PIN ) = 0;
  857. wiggle_fast_neg( 3 );
  858. dat0 = 0;
  859. datshift = 4;
  860. do
  861. {
  862. datshift--;
  863. dat0 |= ( ( BITBAND( SD_DAT0REG->FIOPIN, SD_DAT0PIN ) ) << datshift );
  864. wiggle_fast_neg1();
  865. }
  866. while ( datshift );
  867. DBG_SD printf( "crc %02x\n", dat0 );
  868. if ( ( dat0 & 7 ) != 2 )
  869. {
  870. printf( "crc error! %02x\n", dat0 );
  871. while ( 1 );
  872. }
  873. if ( dat0 & 8 )
  874. {
  875. printf( "missing start bit in CRC status response...\n" );
  876. }
  877. wiggle_fast_neg( 2 );
  878. wait_busy();
  879. }
  880. void read_block( uint32_t address, uint8_t *buf )
  881. {
  882. DBG_SD printf( "read_block addr=%08lx last_addr=%08lx offld=%d/%d offst=%04x offed=%04x last_off=%04x\n", address,
  883. last_block, sd_offload, sd_offload_partial, sd_offload_partial_start, sd_offload_partial_end, last_offset );
  884. if ( during_blocktrans == TRANS_READ && ( last_block == address - 1 ) )
  885. {
  886. //uart_putc('r');
  887. #ifdef CONFIG_SD_DATACRC
  888. int cmd_res;
  889. if ( ( cmd_res = stream_datablock( buf ) ) == CRC_ERROR )
  890. {
  891. while ( cmd_res == CRC_ERROR )
  892. {
  893. cmd_fast( STOP_TRANSMISSION, 0, 0x61, NULL, rsp );
  894. cmd_res = cmd_fast( READ_MULTIPLE_BLOCK, address, 0, buf, rsp );
  895. }
  896. }
  897. #else
  898. stream_datablock( buf );
  899. #endif
  900. last_block = address;
  901. last_offset = sd_offload_partial_end & 0x1ff;
  902. if ( sd_offload_partial && sd_offload_partial_end != 512 )
  903. {
  904. during_blocktrans = TRANS_MID;
  905. }
  906. sd_offload_partial = 0;
  907. }
  908. else if ( during_blocktrans == TRANS_MID
  909. && last_block == address
  910. && last_offset == sd_offload_partial_start
  911. && sd_offload_partial )
  912. {
  913. sd_offload_partial_start |= 0x8000;
  914. stream_datablock( buf );
  915. during_blocktrans = TRANS_READ;
  916. last_offset = sd_offload_partial_end & 0x1ff;
  917. sd_offload_partial = 0;
  918. }
  919. else
  920. {
  921. if ( during_blocktrans )
  922. {
  923. // uart_putc('_');
  924. //printf("nonseq read (%lx -> %lx), restarting transmission\n", last_block, address);
  925. /* send STOP_TRANSMISSION to end an open READ/WRITE_MULTIPLE_BLOCK */
  926. cmd_fast( STOP_TRANSMISSION, 0, 0x61, NULL, rsp );
  927. }
  928. during_blocktrans = TRANS_READ;
  929. last_block = address;
  930. if ( !ccs )
  931. {
  932. address <<= 9;
  933. }
  934. #ifdef CONFIG_SD_DATACRC
  935. while ( 1 )
  936. {
  937. if ( cmd_fast( READ_MULTIPLE_BLOCK, address, 0, buf, rsp ) != CRC_ERROR )
  938. {
  939. break;
  940. }
  941. cmd_fast( STOP_TRANSMISSION, 0, 0x61, NULL, rsp );
  942. };
  943. #else
  944. cmd_fast( READ_MULTIPLE_BLOCK, address, 0, buf, rsp );
  945. #endif
  946. sd_offload_partial = 0;
  947. }
  948. // printf("trans state = %d\n", during_blocktrans);
  949. }
  950. void write_block( uint32_t address, uint8_t *buf )
  951. {
  952. if ( during_blocktrans == TRANS_WRITE && ( last_block == address - 1 ) )
  953. {
  954. wait_busy();
  955. send_datablock( buf );
  956. last_block = address;
  957. }
  958. else
  959. {
  960. if ( during_blocktrans )
  961. {
  962. /* send STOP_TRANSMISSION to end an open READ/WRITE_MULTIPLE_BLOCK */
  963. cmd_fast( STOP_TRANSMISSION, 0, 0x61, NULL, rsp );
  964. }
  965. wait_busy();
  966. last_block = address;
  967. if ( !ccs )
  968. {
  969. address <<= 9;
  970. }
  971. /* only send cmd & get response */
  972. cmd_fast( WRITE_MULTIPLE_BLOCK, address, 0, NULL, rsp );
  973. DBG_SD printf( "write_block: CMD25 response = %02x%02x%02x%02x%02x%02x\n", rsp[0], rsp[1], rsp[2], rsp[3], rsp[4],
  974. rsp[5] );
  975. wiggle_fast_pos( 8 );
  976. send_datablock( buf );
  977. during_blocktrans = TRANS_WRITE;
  978. }
  979. }
  980. /* send STOP_TRANSMISSION after multiple block write
  981. * and reset during_blocktrans status */
  982. void flush_write( void )
  983. {
  984. cmd_fast( STOP_TRANSMISSION, 0, 0x61, NULL, rsp );
  985. wait_busy();
  986. during_blocktrans = TRANS_NONE;
  987. }
  988. //
  989. // Public functions
  990. //
  991. DRESULT sdn_ioctl( BYTE drv, BYTE cmd, void *buffer )
  992. {
  993. DRESULT res;
  994. if ( drv >= MAX_CARDS )
  995. {
  996. res = STA_NOINIT | STA_NODISK;
  997. }
  998. else
  999. {
  1000. switch ( cmd )
  1001. {
  1002. case CTRL_SYNC:
  1003. flush_write();
  1004. res = RES_OK;
  1005. break;
  1006. default:
  1007. res = RES_PARERR;
  1008. }
  1009. }
  1010. return res;
  1011. }
  1012. DRESULT disk_ioctl( BYTE drv, BYTE cmd, void *buffer ) __attribute__ ( ( weak, alias( "sdn_ioctl" ) ) );
  1013. DRESULT sdn_read( BYTE drv, BYTE *buffer, DWORD sector, BYTE count )
  1014. {
  1015. uint8_t sec;
  1016. if ( drv >= MAX_CARDS )
  1017. {
  1018. return RES_PARERR;
  1019. }
  1020. readled( 1 );
  1021. for ( sec = 0; sec < count; sec++ )
  1022. {
  1023. read_block( sector + sec, buffer );
  1024. buffer += 512;
  1025. }
  1026. readled( 0 );
  1027. return RES_OK;
  1028. }
  1029. DRESULT disk_read( BYTE drv, BYTE *buffer, DWORD sector, BYTE count ) __attribute__ ( ( weak, alias( "sdn_read" ) ) );
  1030. DSTATUS sdn_initialize( BYTE drv )
  1031. {
  1032. uint8_t rsp[17]; /* space for response */
  1033. int rsplen;
  1034. uint8_t hcs = 0;
  1035. rca = 0;
  1036. if ( drv >= MAX_CARDS )
  1037. {
  1038. return STA_NOINIT | STA_NODISK;
  1039. }
  1040. if ( sdn_status( drv ) & STA_NODISK )
  1041. {
  1042. return STA_NOINIT | STA_NODISK;
  1043. }
  1044. /* if the card is sending data from before a reset we try to deselect it
  1045. prior to initialization */
  1046. for ( rsplen = 0; rsplen < 2042; rsplen++ )
  1047. {
  1048. if ( !( BITBAND( SD_DAT3REG->FIOPIN, SD_DAT3PIN ) ) )
  1049. {
  1050. printf( "card seems to be sending data, attempting deselect\n" );
  1051. cmd_slow( SELECT_CARD, 0, 0, NULL, rsp );
  1052. }
  1053. wiggle_slow_neg( 1 );
  1054. }
  1055. printf( "sd_init start\n" );
  1056. BITBAND( SD_DAT3REG->FIODIR, SD_DAT3PIN ) = 1;
  1057. BITBAND( SD_DAT3REG->FIOSET, SD_DAT3PIN ) = 1;
  1058. cmd_slow( GO_IDLE_STATE, 0, 0x95, NULL, rsp );
  1059. if ( ( rsplen = cmd_slow( SEND_IF_COND, 0x000001aa, 0x87, NULL, rsp ) ) )
  1060. {
  1061. DBG_SD printf( "CMD8 response:\n" );
  1062. DBG_SD uart_trace( rsp, 0, rsplen, 0 );
  1063. hcs = 1;
  1064. }
  1065. while ( 1 )
  1066. {
  1067. if ( !( acmd_slow( SD_SEND_OP_COND, ( hcs << 30 ) | 0xfc0000, 0, NULL, rsp ) ) )
  1068. {
  1069. printf( "ACMD41 no response!\n" );
  1070. }
  1071. if ( rsp[1] & 0x80 )
  1072. {
  1073. break;
  1074. }
  1075. }
  1076. BITBAND( SD_DAT3REG->FIODIR, SD_DAT3PIN ) = 0;
  1077. BITBAND( SD_DAT3REG->FIOCLR, SD_DAT3PIN ) = 1;
  1078. ccs = ( rsp[1] >> 6 ) & 1; /* SDHC/XC */
  1079. cmd_slow( ALL_SEND_CID, 0, 0x4d, NULL, rsp );
  1080. if ( cmd_slow( SEND_RELATIVE_ADDR, 0, 0x21, NULL, rsp ) )
  1081. {
  1082. rca = ( rsp[1] << 24 ) | ( rsp[2] << 16 );
  1083. printf( "RCA: %04lx\n", rca >> 16 );
  1084. }
  1085. else
  1086. {
  1087. printf( "CMD3 no response!\n" );
  1088. rca = 0;
  1089. }
  1090. /* record CSD for getinfo */
  1091. cmd_slow( SEND_CSD, rca, 0, NULL, csd );
  1092. sdn_getinfo( drv, 0, &di );
  1093. /* record CID */
  1094. cmd_slow( SEND_CID, rca, 0, NULL, cid );
  1095. /* select the card */
  1096. if ( cmd_slow( SELECT_CARD, rca, 0, NULL, rsp ) )
  1097. {
  1098. printf( "card selected!\n" );
  1099. }
  1100. else
  1101. {
  1102. printf( "CMD7 no response!\n" );
  1103. }
  1104. /* get card status */
  1105. cmd_slow( SEND_STATUS, rca, 0, NULL, rsp );
  1106. /* set bus width */
  1107. acmd_slow( SD_SET_BUS_WIDTH, 0x2, 0, NULL, rsp );
  1108. /* set block length */
  1109. cmd_slow( SET_BLOCKLEN, 0x200, 0, NULL, rsp );
  1110. printf( "SD init complete. SDHC/XC=%d\n", ccs );
  1111. disk_state = DISK_OK;
  1112. during_blocktrans = TRANS_NONE;
  1113. return sdn_status( drv );
  1114. }
  1115. DSTATUS disk_initialize( BYTE drv ) __attribute__ ( ( weak, alias( "sdn_initialize" ) ) );
  1116. void sdn_init( void )
  1117. {
  1118. /* enable GPIO interrupt on SD detect pin, both edges */
  1119. /* NVIC_EnableIRQ(EINT3_IRQn);
  1120. SD_DT_INT_SETUP(); */
  1121. /* disconnect SSP1 */
  1122. LPC_PINCON->PINSEL0 &= ~( BV( 13 ) | BV( 15 ) | BV( 17 ) | BV( 19 ) );
  1123. /* prepare GPIOs */
  1124. BITBAND( SD_DAT3REG->FIODIR, SD_DAT3PIN ) = 0;
  1125. BITBAND( SD_DAT2REG->FIODIR, SD_DAT2PIN ) = 0;
  1126. BITBAND( SD_DAT1REG->FIODIR, SD_DAT1PIN ) = 0;
  1127. BITBAND( SD_DAT0REG->FIODIR, SD_DAT0PIN ) = 0;
  1128. BITBAND( SD_CLKREG->FIODIR, SD_CLKPIN ) = 1;
  1129. BITBAND( SD_CMDREG->FIODIR, SD_CMDPIN ) = 1;
  1130. BITBAND( SD_CMDREG->FIOPIN, SD_CMDPIN ) = 1;
  1131. LPC_PINCON->PINMODE0 &= ~( BV( 14 ) | BV( 15 ) );
  1132. LPC_GPIO2->FIOPIN0 = 0x00;
  1133. LPC_GPIO2->FIOMASK0 = ~0xf;
  1134. }
  1135. void disk_init( void ) __attribute__ ( ( weak, alias( "sdn_init" ) ) );
  1136. DSTATUS sdn_status( BYTE drv )
  1137. {
  1138. if ( SDCARD_DETECT )
  1139. {
  1140. if ( SDCARD_WP )
  1141. {
  1142. return STA_PROTECT;
  1143. }
  1144. else
  1145. {
  1146. return RES_OK;
  1147. }
  1148. }
  1149. else
  1150. {
  1151. return STA_NOINIT | STA_NODISK;
  1152. }
  1153. }
  1154. DSTATUS disk_status( BYTE drv ) __attribute__ ( ( weak, alias( "sdn_status" ) ) );
  1155. DRESULT sdn_getinfo( BYTE drv, BYTE page, void *buffer )
  1156. {
  1157. uint32_t capacity;
  1158. if ( drv >= MAX_CARDS )
  1159. {
  1160. return RES_NOTRDY;
  1161. }
  1162. if ( sdn_status( drv ) & STA_NODISK )
  1163. {
  1164. return RES_NOTRDY;
  1165. }
  1166. if ( page != 0 )
  1167. {
  1168. return RES_ERROR;
  1169. }
  1170. if ( ccs )
  1171. {
  1172. /* Special CSD for SDHC cards */
  1173. capacity = ( 1 + getbits( csd, 127 - 69 + 8, 22 ) ) * 1024;
  1174. }
  1175. else
  1176. {
  1177. /* Assume that MMC-CSD 1.0/1.1/1.2 and SD-CSD 1.1 are the same... */
  1178. uint8_t exponent = 2 + getbits( csd, 127 - 49 + 8, 3 );
  1179. capacity = 1 + getbits( csd, 127 - 73 + 8, 12 );
  1180. exponent += getbits( csd, 127 - 83 + 8, 4 ) - 9;
  1181. while ( exponent-- )
  1182. {
  1183. capacity *= 2;
  1184. }
  1185. }
  1186. diskinfo0_t *di = buffer;
  1187. di->validbytes = sizeof( diskinfo0_t );
  1188. di->disktype = DISK_TYPE_SD;
  1189. di->sectorsize = 2;
  1190. di->sectorcount = capacity;
  1191. printf( "card capacity: %lu sectors\n", capacity );
  1192. return RES_OK;
  1193. }
  1194. DRESULT disk_getinfo( BYTE drv, BYTE page, void *buffer ) __attribute__ ( ( weak, alias( "sdn_getinfo" ) ) );
  1195. DRESULT sdn_write( BYTE drv, const BYTE *buffer, DWORD sector, BYTE count )
  1196. {
  1197. uint8_t sec;
  1198. uint8_t *buf = ( uint8_t * )buffer;
  1199. if ( drv >= MAX_CARDS )
  1200. {
  1201. return RES_NOTRDY;
  1202. }
  1203. if ( sdn_status( drv ) & STA_NODISK )
  1204. {
  1205. return RES_NOTRDY;
  1206. }
  1207. writeled( 1 );
  1208. for ( sec = 0; sec < count; sec++ )
  1209. {
  1210. write_block( sector + sec, buf );
  1211. buf += 512;
  1212. }
  1213. writeled( 0 );
  1214. return RES_OK;
  1215. }
  1216. DRESULT disk_write( BYTE drv, const BYTE *buffer, DWORD sector, BYTE count ) __attribute__ ( ( weak,
  1217. alias( "sdn_write" ) ) );
  1218. /* Detect changes of SD card 0 */
  1219. void sdn_changed()
  1220. {
  1221. if ( sd_changed )
  1222. {
  1223. printf( "ch " );
  1224. if ( SDCARD_DETECT )
  1225. {
  1226. disk_state = DISK_CHANGED;
  1227. }
  1228. else
  1229. {
  1230. disk_state = DISK_REMOVED;
  1231. }
  1232. sd_changed = 0;
  1233. }
  1234. }
  1235. /* measure sd access time */
  1236. void sdn_gettacc( uint32_t *tacc_max, uint32_t *tacc_avg )
  1237. {
  1238. uint32_t sec1 = 0;
  1239. uint32_t sec2 = 0;
  1240. uint32_t time, time_max = 0;
  1241. uint32_t time_avg = 0LL;
  1242. uint32_t numread = 16384;
  1243. int i;
  1244. int sec_step = di.sectorcount / numread - 1;
  1245. if ( disk_state == DISK_REMOVED )
  1246. {
  1247. return;
  1248. }
  1249. sdn_checkinit( 0 );
  1250. for ( i = 0; i < 128; i++ )
  1251. {
  1252. sd_offload_tgt = 2;
  1253. sd_offload = 1;
  1254. sdn_read( 0, NULL, 0, 1 );
  1255. sd_offload_tgt = 2;
  1256. sd_offload = 1;
  1257. sdn_read( 0, NULL, i * sec_step, 1 );
  1258. }
  1259. for ( i = 0; i < numread && sram_readbyte( SRAM_CMD_ADDR ) != 0x00 && disk_state != DISK_REMOVED; i++ )
  1260. {
  1261. /* reset timer */
  1262. LPC_RIT->RICTRL = 0;
  1263. sd_offload_tgt = 2;
  1264. sd_offload = 1;
  1265. sdn_read( 0, NULL, sec1, 2 );
  1266. sec1 += 2;
  1267. /* start timer */
  1268. LPC_RIT->RICOUNTER = 0;
  1269. LPC_RIT->RICTRL = BV( RITEN );
  1270. sd_offload_tgt = 2;
  1271. sd_offload = 1;
  1272. sdn_read( 0, NULL, sec2, 1 );
  1273. /* read timer */
  1274. time = LPC_RIT->RICOUNTER;
  1275. /* sd_offload_tgt=2;
  1276. sd_offload=1;
  1277. sdn_read(0, NULL, sec2, 15);*/
  1278. time_avg += time / 16;
  1279. if ( time > time_max )
  1280. {
  1281. time_max = time;
  1282. }
  1283. sec2 += sec_step;
  1284. }
  1285. time_avg = time_avg / ( i + 1 ) * 16;
  1286. sd_offload = 0;
  1287. LPC_RIT->RICTRL = 0;
  1288. if ( disk_state != DISK_REMOVED )
  1289. {
  1290. *tacc_max = time_max / ( CONFIG_CPU_FREQUENCY / 1000000 ) - 114;
  1291. *tacc_avg = time_avg / ( CONFIG_CPU_FREQUENCY / 1000000 ) - 114;
  1292. }
  1293. }