memory.h 4.4 KB

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  1. /* sd2snes - SD card based universal cartridge for the SNES
  2. Copyright (C) 2009-2010 Maximilian Rehkopf <otakon@gmx.net>
  3. AVR firmware portion
  4. Inspired by and based on code from sd2iec, written by Ingo Korb et al.
  5. See sdcard.c|h, config.h.
  6. FAT file system access based on code by ChaN, Jim Brain, Ingo Korb,
  7. see ff.c|h.
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; version 2 of the License only.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. memory.h: RAM operations
  19. */
  20. #ifndef MEMORY_H
  21. #define MEMORY_H
  22. #include <arm/NXP/LPC17xx/LPC17xx.h>
  23. #include "smc.h"
  24. #define MASK_BITS (0x000000)
  25. #if 0
  26. #define SRAM_ROM_ADDR ((0x000000L) & ~MASK_BITS)
  27. #define SRAM_SAVE_ADDR ((0x400000L) & ~MASK_BITS)
  28. #define SRAM_MENU_ADDR ((0x7A0000L) & ~MASK_BITS)
  29. #define SRAM_DIR_ADDR ((0x410000L) & ~MASK_BITS)
  30. #define SRAM_DB_ADDR ((0x420000L) & ~MASK_BITS)
  31. #define SRAM_SPC_DATA_ADDR ((0x430000L) & ~MASK_BITS)
  32. #define SRAM_SPC_HEADER_ADDR ((0x440000L) & ~MASK_BITS)
  33. #define SRAM_MENU_SAVE_ADDR ((0x7F0000L) & ~MASK_BITS)
  34. #define SRAM_CMD_ADDR ((0x7F1000L) & ~MASK_BITS)
  35. #define SRAM_PARAM_ADDR ((0x7F1004L) & ~MASK_BITS)
  36. #define SRAM_STATUS_ADDR ((0x7F1100L) & ~MASK_BITS)
  37. #define SRAM_SYSINFO_ADDR ((0x7F1200L) & ~MASK_BITS)
  38. #define SRAM_LASTGAME_ADDR ((0x7F1420L) & ~MASK_BITS)
  39. #define SRAM_SCRATCHPAD ((0x7FFF00L) & ~MASK_BITS)
  40. #define SRAM_DIRID ((0x7FFFF0L) & ~MASK_BITS)
  41. #define SRAM_RELIABILITY_SCORE (0x100)
  42. #else
  43. #define SRAM_ROM_ADDR ((0x000000L) & ~MASK_BITS)
  44. #define SRAM_SAVE_ADDR ((0x600000L) & ~MASK_BITS)
  45. #define SRAM_MENU_ADDR ((0x500000L) & ~MASK_BITS)
  46. #define SRAM_DIR_ADDR ((0x510000L) & ~MASK_BITS)
  47. #define SRAM_DB_ADDR ((0x580000L) & ~MASK_BITS)
  48. #define SRAM_SPC_DATA_ADDR ((0x7D0000L) & ~MASK_BITS)
  49. #define SRAM_SPC_HEADER_ADDR ((0x7E0000L) & ~MASK_BITS)
  50. #define SRAM_MENU_SAVE_ADDR ((0x7F0000L) & ~MASK_BITS)
  51. #define SRAM_CMD_ADDR ((0x7F1000L) & ~MASK_BITS)
  52. #define SRAM_PARAM_ADDR ((0x7F1004L) & ~MASK_BITS)
  53. #define SRAM_STATUS_ADDR ((0x7F1100L) & ~MASK_BITS)
  54. #define SRAM_SYSINFO_ADDR ((0x7F1200L) & ~MASK_BITS)
  55. #define SRAM_LASTGAME_ADDR ((0x7F1420L) & ~MASK_BITS)
  56. #define SRAM_SCRATCHPAD ((0x7FFF00L) & ~MASK_BITS)
  57. #define SRAM_DIRID ((0x7FFFF0L) & ~MASK_BITS)
  58. #define SRAM_RELIABILITY_SCORE (0x100)
  59. #endif
  60. #define LOADROM_WITH_SRAM (1)
  61. #define LOADROM_WITH_RESET (2)
  62. uint32_t load_rom( uint8_t *filename, uint32_t base_addr, uint8_t flags );
  63. uint32_t load_spc( uint8_t *filename, uint32_t spc_data_addr, uint32_t spc_header_addr );
  64. uint32_t load_sram( uint8_t *filename, uint32_t base_addr );
  65. uint32_t load_sram_offload( uint8_t *filename, uint32_t base_addr );
  66. uint32_t load_sram_rle( uint8_t *filename, uint32_t base_addr );
  67. uint32_t load_bootrle( uint32_t base_addr );
  68. void load_dspx( const uint8_t *filename, uint8_t st0010 );
  69. void sram_hexdump( uint32_t addr, uint32_t len );
  70. uint8_t sram_readbyte( uint32_t addr );
  71. uint16_t sram_readshort( uint32_t addr );
  72. uint32_t sram_readlong( uint32_t addr );
  73. void sram_writebyte( uint8_t val, uint32_t addr );
  74. void sram_writeshort( uint16_t val, uint32_t addr );
  75. void sram_writelong( uint32_t val, uint32_t addr );
  76. void sram_readblock( void *buf, uint32_t addr, uint16_t size );
  77. void sram_readlongblock( uint32_t *buf, uint32_t addr, uint16_t count );
  78. void sram_writeblock( void *buf, uint32_t addr, uint16_t size );
  79. void save_sram( uint8_t *filename, uint32_t sram_size, uint32_t base_addr );
  80. uint32_t calc_sram_crc( uint32_t base_addr, uint32_t size );
  81. uint8_t sram_reliable( void );
  82. void sram_memset( uint32_t base_addr, uint32_t len, uint8_t val );
  83. uint64_t sram_gettime( uint32_t base_addr );
  84. void sram_readstrn( void *buf, uint32_t addr, uint16_t size );
  85. #endif