fpga.c 3.3 KB

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  1. // insert cool lenghty disclaimer here
  2. // fpga.c: FPGA (re)programming
  3. /*
  4. FPGA pin mapping
  5. ================
  6. PSM:
  7. ====
  8. FPGA AVR dir
  9. ------------------------
  10. PROG_B PD3 OUT
  11. CCLK PD4 OUT
  12. CS_B PD7 OUT
  13. INIT_B PB2 IN
  14. RDWR_B PB3 OUT
  15. D7 PC0 OUT
  16. D6 PC1 OUT
  17. D5 PC2 OUT
  18. D4 PC3 OUT
  19. D3 PC4 OUT
  20. D2 PC5 OUT
  21. D1 PC6 OUT
  22. D0 PC7 OUT
  23. SSM:
  24. ====
  25. PROG_B PD3 OUT
  26. CCLK PD4 OUT
  27. INIT_B PD7 IN
  28. DIN PC7 OUT
  29. */
  30. #include <avr/pgmspace.h>
  31. #include "fpga.h"
  32. #include "config.h"
  33. #include "uart.h"
  34. #include "sdcard.h"
  35. #include "diskio.h"
  36. #include "ff.h"
  37. #include "fileops.h"
  38. #include "fpga_spi.h"
  39. #include "spi.h"
  40. #include "avrcompat.h"
  41. DWORD get_fattime(void) {
  42. return 0L;
  43. }
  44. void set_prog_b(uint8_t val) {
  45. if(val) {
  46. PORTD |= _BV(PD3);
  47. } else {
  48. PORTD &= ~_BV(PD3);
  49. }
  50. }
  51. void set_cs_b(uint8_t val) {
  52. if(val) {
  53. PORTD |= _BV(PD7);
  54. } else {
  55. PORTD &= ~_BV(PD7);
  56. }
  57. }
  58. void set_rdwr_b(uint8_t val) {
  59. if(val) {
  60. PORTB |= _BV(PB3);
  61. } else {
  62. PORTB &= ~_BV(PB3);
  63. }
  64. }
  65. void set_cclk(uint8_t val) {
  66. if(val) {
  67. PORTD |= _BV(PD4);
  68. } else {
  69. PORTD &= ~_BV(PD4);
  70. }
  71. }
  72. void fpga_init() {
  73. DDRB |= _BV(PB3); // PB3 is output
  74. DDRD &= ~_BV(PD7); // PD7 is input
  75. DDRC = _BV(PC7); // for FPGA config, PC7 is output
  76. DDRD |= _BV(PD3) | _BV(PD4); // PD3, PD4 are outputs
  77. set_cclk(0); // initial clk=0
  78. }
  79. int fpga_get_done(void) {
  80. return 0;
  81. }
  82. void fpga_postinit() {
  83. DDRA |= _BV(PA0) | _BV(PA1) | _BV(PA2) | _BV(PA4) | _BV(PA5) | _BV(PA6); // MAPPER+NEXTADDR output
  84. DDRB |= _BV(PB2) | _BV(PB1) | _BV(PB0); // turn PB2 into output, enable AVR_BANK
  85. DDRD |= _BV(PD7); // turn PD7 into output
  86. }
  87. void fpga_pgm(char* filename) {
  88. set_prog_b(0);
  89. uart_putc('P');
  90. set_prog_b(1);
  91. loop_until_bit_is_set(PIND, PD7);
  92. uart_putc('p');
  93. // FIL in;
  94. // FRESULT res;
  95. UINT bytes_read;
  96. // open configware file
  97. // res=f_open(&in, filename, FA_READ);
  98. file_open(filename, FA_READ);
  99. if(file_res) {
  100. uart_putc('?');
  101. uart_putc(0x30+file_res);
  102. return;
  103. }
  104. // file open successful
  105. set_cs_b(0);
  106. set_rdwr_b(0);
  107. for (;;) {
  108. // res = f_read(&in, file_buf, sizeof(file_buf), &bytes_read);
  109. bytes_read = file_read();
  110. if (file_res || bytes_read == 0) break; // error or eof
  111. for(int i=0; i<bytes_read; i++) {
  112. //FPGA_SEND_BYTE(file_buf[i]);
  113. FPGA_SEND_BYTE_SERIAL(file_buf[i]);
  114. }
  115. }
  116. file_close();
  117. fpga_postinit();
  118. }
  119. void set_avr_read(uint8_t val) {
  120. if(val) {
  121. PORTB |= _BV(PB3);
  122. } else {
  123. PORTB &= ~_BV(PB3);
  124. }
  125. }
  126. void set_avr_write(uint8_t val) {
  127. if(val) {
  128. PORTB |= _BV(PB2);
  129. } else {
  130. PORTB &= ~_BV(PB2);
  131. }
  132. }
  133. void set_avr_ena(uint8_t val) {
  134. if(val) {
  135. PORTD |= _BV(PD7);
  136. } else {
  137. PORTD &= ~_BV(PD7);
  138. }
  139. }
  140. void set_avr_nextaddr(uint8_t val) {
  141. if(val) {
  142. PORTA |= _BV(PA4);
  143. } else {
  144. PORTA &= ~_BV(PA4);
  145. }
  146. }
  147. void set_avr_addr_reset(uint8_t val) {
  148. if(val) {
  149. PORTA |= _BV(PA5);
  150. } else {
  151. PORTA &= ~_BV(PA5);
  152. }
  153. }
  154. void set_avr_data(uint8_t data) {
  155. PORTC = data;
  156. }
  157. void set_avr_addr_en(uint8_t val) {
  158. if(val) {
  159. PORTA |= _BV(PA6);
  160. } else {
  161. PORTA &= ~_BV(PA6);
  162. }
  163. }
  164. void set_avr_mapper(uint8_t val) {
  165. SPI_SS_HIGH();
  166. FPGA_SS_LOW();
  167. spiTransferByte(0x30 | (val & 0x0f));
  168. FPGA_SS_HIGH();
  169. SPI_SS_LOW();
  170. }
  171. void set_avr_bank(uint8_t val) {
  172. PORTB &= 0xFC;
  173. PORTB |= val&0x03;
  174. }