fpga_spi.c 1.5 KB

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  1. // insert cool lengthy disclaimer here
  2. /*
  3. fpga_spi.c: SPI functions for SRAM interfacing and mapper config
  4. SPI commands
  5. cmd param function
  6. =============================================
  7. 00 bb[hh[ll]] set address to 0xbb0000, 0xbbhh00, or 0xbbhhll
  8. 10 bbhhll set SNES input address mask to 0xbbhhll
  9. 2s bbhhll set SRAM address mask for chip #s to 0xbbhhll
  10. 3m - set mapper to m
  11. 0=HiROM, 1=LoROM
  12. 80 - read with increment
  13. 81 - read w/o increment
  14. 90 {xx}* write xx with increment
  15. 91 {xx}* write xx w/o increment
  16. */
  17. #include <avr/pgmspace.h>
  18. #include <util/delay.h>
  19. #include "avrcompat.h"
  20. #include "fpga.h"
  21. #include "config.h"
  22. #include "uart.h"
  23. #include "spi.h"
  24. #include "fpga_spi.h"
  25. void spi_fpga(void) {
  26. SPI_SS_HIGH();
  27. FPGA_SS_LOW();
  28. }
  29. void spi_sd(void) {
  30. FPGA_SS_HIGH();
  31. SPI_SS_LOW();
  32. }
  33. void spi_none(void) {
  34. FPGA_SS_HIGH();
  35. SPI_SS_HIGH();
  36. }
  37. void fpga_spi_init(void) {
  38. DDRC = _BV(PC7);
  39. FPGA_SS_HIGH();
  40. }
  41. void set_avr_addr(uint32_t address) {
  42. spi_fpga();
  43. spiTransferByte(0x00);
  44. spiTransferByte((address>>16)&0xff);
  45. spiTransferByte((address>>8)&0xff);
  46. spiTransferByte((address)&0xff);
  47. spi_none();
  48. }
  49. void set_saveram_mask(uint32_t mask) {
  50. spi_fpga();
  51. spiTransferByte(0x20);
  52. spiTransferByte((mask>>16)&0xff);
  53. spiTransferByte((mask>>8)&0xff);
  54. spiTransferByte((mask)&0xff);
  55. spi_none();
  56. }
  57. void set_rom_mask(uint32_t mask) {
  58. spi_fpga();
  59. spiTransferByte(0x10);
  60. spiTransferByte((mask>>16)&0xff);
  61. spiTransferByte((mask>>8)&0xff);
  62. spiTransferByte((mask)&0xff);
  63. spi_none();
  64. }