fpga.h 2.2 KB

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  1. // insert cool lenghty disclaimer here
  2. // fpga.h
  3. #ifndef FPGA_H
  4. #define FPGA_H
  5. void fpga_init(void);
  6. uint8_t fpga_test(void);
  7. void fpga_postinit(void);
  8. void fpga_pgm(uint8_t* filename);
  9. void set_avr_read(uint8_t val);
  10. void set_avr_write(uint8_t val);
  11. void set_avr_ena(uint8_t val);
  12. void set_avr_nextaddr(uint8_t val);
  13. void set_avr_addr_reset(uint8_t val);
  14. void set_avr_data(uint8_t data);
  15. void set_avr_addr_en(uint8_t val);
  16. void set_avr_mapper(uint8_t val);
  17. void set_avr_bank(uint8_t val);
  18. // some macros for bulk transfers (faster)
  19. #define FPGA_SEND_BYTE(data) do {SET_AVR_DATA(data); CCLK();} while (0)
  20. #define FPGA_SEND_BYTE_SERIAL(data) do {SET_AVR_DATA(data); CCLK();\
  21. SET_AVR_DATA(data<<1); CCLK(); SET_AVR_DATA(data<<2); CCLK();\
  22. SET_AVR_DATA(data<<3); CCLK(); SET_AVR_DATA(data<<4); CCLK();\
  23. SET_AVR_DATA(data<<5); CCLK(); SET_AVR_DATA(data<<6); CCLK();\
  24. SET_AVR_DATA(data<<7); CCLK();} while (0)
  25. #define SET_CCLK() do {PORTD |= _BV(PD4);} while (0)
  26. #define CLR_CCLK() do {PORTD &= ~_BV(PD4);} while (0)
  27. #define CCLK() do {SET_CCLK(); CLR_CCLK();} while (0)
  28. #define SET_AVR_READ() do {PORTB |= _BV(PB3);} while (0)
  29. #define CLR_AVR_READ() do {PORTB &= ~_BV(PB3);} while (0)
  30. #define SET_AVR_WRITE() do {PORTB |= _BV(PB2);} while (0)
  31. #define CLR_AVR_WRITE() do {PORTB &= ~_BV(PB2);} while (0)
  32. #define SET_AVR_EXCL() do {PORTD |= _BV(PD7);} while (0)
  33. #define CLR_AVR_EXCL() do {PORTD &= ~_BV(PD7);} while (0)
  34. #define SET_AVR_NEXTADDR() do {PORTA |= _BV(PA4);} while (0)
  35. #define CLR_AVR_NEXTADDR() do {PORTA &= ~_BV(PA4);} while (0)
  36. #define SET_AVR_ADDR_RESET() do {PORTA |= _BV(PA5);} while (0)
  37. #define CLR_AVR_ADDR_RESET() do {PORTA &= ~_BV(PA5);} while (0)
  38. #define SET_AVR_ADDR_EN() do {PORTA |= _BV(PA6);} while (0)
  39. #define CLR_AVR_ADDR_EN() do {PORTA &= ~_BV(PA6);} while (0)
  40. #define AVR_NEXTADDR() do {SET_AVR_NEXTADDR(); CLR_AVR_NEXTADDR();} while (0)
  41. #define AVR_ADDR_RESET() do {CLR_AVR_ADDR_RESET();\
  42. AVR_NEXTADDR();SET_AVR_ADDR_RESET();} while (0)
  43. #define SET_AVR_DATA(data) do {PORTC = (uint8_t)data;} while (0)
  44. #define AVR_READ() do {CLR_AVR_READ(); SET_AVR_READ();} while (0)
  45. #define AVR_WRITE() do {CLR_AVR_WRITE(); SET_AVR_WRITE();} while (0)
  46. #define AVR_DATA (PINC)
  47. #endif