main.c 8.5 KB

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  1. #include <arm/NXP/LPC17xx/LPC17xx.h>
  2. #include <string.h>
  3. #include "config.h"
  4. #include "obj/autoconf.h"
  5. #include "clock.h"
  6. #include "uart.h"
  7. #include "bits.h"
  8. #include "power.h"
  9. #include "timer.h"
  10. #include "ff.h"
  11. #include "diskio.h"
  12. #include "spi.h"
  13. #include "fileops.h"
  14. #include "fpga.h"
  15. #include "fpga_spi.h"
  16. #include "filetypes.h"
  17. #include "memory.h"
  18. #include "snes.h"
  19. #include "led.h"
  20. #include "sort.h"
  21. #include "cic.h"
  22. #include "tests.h"
  23. #include "cli.h"
  24. #include "sdnative.h"
  25. #include "crc.h"
  26. #include "smc.h"
  27. #include "msu1.h"
  28. #include "rtc.h"
  29. #define EMC0TOGGLE (3<<4)
  30. #define MR0R (1<<1)
  31. int i;
  32. int sd_offload = 0, ff_sd_offload = 0, sd_offload_tgt = 0;
  33. int sd_offload_partial = 0;
  34. uint16_t sd_offload_partial_start = 0;
  35. uint16_t sd_offload_partial_end = 0;
  36. volatile enum diskstates disk_state;
  37. extern volatile tick_t ticks;
  38. extern snes_romprops_t romprops;
  39. extern volatile int reset_changed;
  40. enum system_states {
  41. SYS_RTC_STATUS = 0
  42. };
  43. int main(void) {
  44. LPC_GPIO2->FIODIR = BV(4) | BV(5);
  45. LPC_GPIO1->FIODIR = BV(23);
  46. LPC_GPIO0->FIODIR = BV(16);
  47. /* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
  48. LPC_PINCON->PINSEL1 = BV(18) | BV(19) | BV(20) | BV(21) /* UART3 */
  49. | BV(3) | BV(5); /* SSP0 (FPGA) except SS */
  50. LPC_PINCON->PINSEL0 = BV(31); /* SSP0 */
  51. /* | BV(13) | BV(15) | BV(17) | BV(19) SSP1 (SD) */
  52. /* pull-down CIC data lines */
  53. LPC_PINCON->PINMODE0 = BV(0) | BV(1) | BV(2) | BV(3);
  54. clock_disconnect();
  55. snes_init();
  56. snes_reset(1);
  57. power_init();
  58. timer_init();
  59. uart_init();
  60. fpga_spi_init();
  61. spi_preinit();
  62. led_init();
  63. /* do this last because the peripheral init()s change PCLK dividers */
  64. clock_init();
  65. LPC_PINCON->PINSEL0 |= BV(20) | BV(21); /* MAT3.0 (FPGA clock) */
  66. led_pwm();
  67. sdn_init();
  68. printf("\n\nsd2snes mk.2\n============\nfw ver.: " VER "\ncpu clock: %d Hz\n", CONFIG_CPU_FREQUENCY);
  69. printf("PCONP=%lx\n", LPC_SC->PCONP);
  70. file_init();
  71. cic_init(1);
  72. /* setup timer (fpga clk) */
  73. LPC_TIM3->CTCR=0;
  74. LPC_TIM3->EMR=EMC0TOGGLE;
  75. LPC_TIM3->MCR=MR0R;
  76. LPC_TIM3->MR0=1;
  77. LPC_TIM3->TCR=1;
  78. fpga_init();
  79. fpga_rompgm();
  80. sram_writebyte(0, SRAM_CMD_ADDR);
  81. while(1) {
  82. set_mcu_ovr(1);
  83. if(disk_state == DISK_CHANGED) {
  84. sdn_init();
  85. newcard = 1;
  86. }
  87. load_bootrle(SRAM_MENU_ADDR);
  88. set_saveram_mask(0x1fff);
  89. set_rom_mask(0x3fffff);
  90. set_mapper(0x7);
  91. set_mcu_ovr(0);
  92. snes_reset(0);
  93. delay_ms(100);
  94. while(get_cic_state() == CIC_FAIL) {
  95. rdyled(0);
  96. readled(0);
  97. writeled(0);
  98. delay_ms(500);
  99. rdyled(1);
  100. readled(1);
  101. writeled(1);
  102. delay_ms(500);
  103. }
  104. /* some sanity checks */
  105. uint8_t card_go = 0;
  106. while(!card_go) {
  107. if(disk_status(0) & (STA_NOINIT|STA_NODISK)) {
  108. snes_bootprint(" No SD Card found! \0");
  109. while(disk_status(0) & (STA_NOINIT|STA_NODISK));
  110. delay_ms(200);
  111. }
  112. file_open((uint8_t*)"/sd2snes/menu.bin", FA_READ);
  113. if(file_status != FILE_OK) {
  114. snes_bootprint(" /sd2snes/menu.bin not found! \0");
  115. while(disk_status(0) == RES_OK);
  116. } else {
  117. card_go = 1;
  118. }
  119. file_close();
  120. }
  121. snes_bootprint(" Loading ... \0");
  122. if(get_cic_state() == CIC_PAIR) {
  123. printf("PAIR MODE ENGAGED!\n");
  124. cic_pair(CIC_NTSC, CIC_NTSC);
  125. }
  126. rdyled(1);
  127. readled(0);
  128. writeled(0);
  129. /* exclusive mode */
  130. set_mcu_ovr(1);
  131. *fs_path=0;
  132. uint32_t saved_dir_id;
  133. get_db_id(&saved_dir_id);
  134. uint32_t mem_dir_id = sram_readlong(SRAM_DIRID);
  135. uint32_t mem_magic = sram_readlong(SRAM_SCRATCHPAD);
  136. printf("mem_magic=%lx mem_dir_id=%lx saved_dir_id=%lx\n", mem_magic, mem_dir_id, saved_dir_id);
  137. if((mem_magic != 0x12345678) || (mem_dir_id != saved_dir_id) || (newcard)) {
  138. newcard = 0;
  139. /* generate fs footprint (interesting files only) */
  140. uint32_t curr_dir_id = scan_dir(fs_path, 0, 0);
  141. printf("curr dir id = %lx\n", curr_dir_id);
  142. /* files changed or no database found? */
  143. if((get_db_id(&saved_dir_id) != FR_OK)
  144. || saved_dir_id != curr_dir_id) {
  145. /* rebuild database */
  146. printf("saved dir id = %lx\n", saved_dir_id);
  147. printf("rebuilding database...");
  148. snes_bootprint(" rebuilding database ... \0");
  149. curr_dir_id = scan_dir(fs_path, 1, 0);
  150. sram_writeblock(&curr_dir_id, SRAM_DB_ADDR, 4);
  151. uint32_t endaddr, direndaddr;
  152. sram_readblock(&endaddr, SRAM_DB_ADDR+4, 4);
  153. sram_readblock(&direndaddr, SRAM_DB_ADDR+8, 4);
  154. printf("%lx %lx\n", endaddr, direndaddr);
  155. printf("sorting database...");
  156. snes_bootprint(" sorting database ... \0");
  157. sort_all_dir(direndaddr);
  158. printf("done\n");
  159. snes_bootprint(" saving database ... \0");
  160. save_sram((uint8_t*)"/sd2snes/sd2snes.db", endaddr-SRAM_DB_ADDR, SRAM_DB_ADDR);
  161. save_sram((uint8_t*)"/sd2snes/sd2snes.dir", direndaddr-(SRAM_DIR_ADDR), SRAM_DIR_ADDR);
  162. printf("done\n");
  163. } else {
  164. printf("saved dir id = %lx\n", saved_dir_id);
  165. printf("different card, consistent db, loading db...\n");
  166. load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
  167. load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
  168. }
  169. sram_writelong(curr_dir_id, SRAM_DIRID);
  170. sram_writelong(0x12345678, SRAM_SCRATCHPAD);
  171. } else {
  172. printf("same card, loading db...\n");
  173. load_sram((uint8_t*)"/sd2snes/sd2snes.db", SRAM_DB_ADDR);
  174. load_sram((uint8_t*)"/sd2snes/sd2snes.dir", SRAM_DIR_ADDR);
  175. }
  176. /* cli_loop(); */
  177. /* load menu */
  178. fpga_pgm((uint8_t*)"/sd2snes/fpga_base.bit");
  179. fpga_dspx_reset(1);
  180. uart_putc('(');
  181. load_rom((uint8_t*)"/sd2snes/menu.bin", SRAM_MENU_ADDR, 0);
  182. /* force memory size + mapper */
  183. set_rom_mask(0x3fffff);
  184. set_mapper(0x7);
  185. uart_putc(')');
  186. uart_putcrlf();
  187. sram_writebyte(0, SRAM_CMD_ADDR);
  188. /* shared mode */
  189. set_mcu_ovr(0);
  190. if((rtc_state = rtc_isvalid()) != RTC_OK) {
  191. printf("RTC invalid!\n");
  192. sram_writebyte(0xff, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
  193. set_bcdtime(0x20110401000000LL);
  194. set_fpga_time(0x20110401000000LL);
  195. invalidate_rtc();
  196. } else {
  197. printf("RTC valid!\n");
  198. sram_writebyte(0x00, SRAM_STATUS_ADDR+SYS_RTC_STATUS);
  199. set_fpga_time(get_bcdtime());
  200. }
  201. printf("SNES GO!\n");
  202. snes_reset(1);
  203. delay_ms(1);
  204. snes_reset(0);
  205. uint8_t cmd = 0;
  206. uint64_t btime = 0;
  207. uint32_t filesize=0;
  208. sram_writebyte(32, SRAM_CMD_ADDR);
  209. printf("test sram\n");
  210. while(!sram_reliable()) cli_entrycheck();
  211. printf("ok\n");
  212. sram_hexdump(SRAM_DIR_ADDR, 0x300);
  213. //while(1) {
  214. // delay_ms(1000);
  215. // printf("Estimated SNES master clock: %ld Hz\n", get_snes_sysclk());
  216. //}
  217. //sram_hexdump(SRAM_DB_ADDR, 0x200);
  218. //sram_hexdump(SRAM_MENU_ADDR, 0x400);
  219. while(!cmd) {
  220. cmd=menu_main_loop();
  221. printf("cmd: %d\n", cmd);
  222. uart_putc('-');
  223. switch(cmd) {
  224. case SNES_CMD_LOADROM:
  225. get_selected_name(file_lfn);
  226. set_mcu_ovr(1);
  227. printf("Selected name: %s\n", file_lfn);
  228. filesize = load_rom(file_lfn, SRAM_ROM_ADDR, LOADROM_WITH_SRAM | LOADROM_WITH_RESET);
  229. break;
  230. case SNES_CMD_SETRTC:
  231. /* get time from RAM */
  232. btime = sram_gettime(SRAM_PARAM_ADDR);
  233. /* set RTC */
  234. set_bcdtime(btime);
  235. set_fpga_time(btime);
  236. cmd=0; /* stay in loop */
  237. break;
  238. default:
  239. printf("unknown cmd: %d\n", cmd);
  240. cmd=0; /* unknown cmd: stay in loop */
  241. break;
  242. }
  243. }
  244. printf("cmd was %x, going to snes main loop\n", cmd);
  245. if(romprops.has_msu1 && msu1_loop()) {
  246. prepare_reset();
  247. continue;
  248. }
  249. cmd=0;
  250. uint8_t snes_reset_prev=0, snes_reset_now=0, snes_reset_state=0;
  251. uint16_t reset_count=0;
  252. while(fpga_test() == FPGA_TEST_TOKEN) {
  253. cli_entrycheck();
  254. sleep_ms(250);
  255. sram_reliable();
  256. printf("%s ", get_cic_statename(get_cic_state()));
  257. if(reset_changed) {
  258. printf("reset\n");
  259. reset_changed = 0;
  260. fpga_reset_srtc_state();
  261. }
  262. snes_reset_now=get_snes_reset();
  263. if(snes_reset_now) {
  264. if(!snes_reset_prev) {
  265. printf("RESET BUTTON DOWN\n");
  266. snes_reset_state=1;
  267. reset_count=0;
  268. }
  269. } else {
  270. if(snes_reset_prev) {
  271. printf("RESET BUTTON UP\n");
  272. snes_reset_state=0;
  273. }
  274. }
  275. if(snes_reset_state) {
  276. reset_count++;
  277. } else {
  278. sram_reliable();
  279. snes_main_loop();
  280. }
  281. if(reset_count>4) {
  282. reset_count=0;
  283. prepare_reset();
  284. break;
  285. }
  286. snes_reset_prev = snes_reset_now;
  287. }
  288. /* fpga test fail: panic */
  289. if(fpga_test() != FPGA_TEST_TOKEN){
  290. led_panic();
  291. }
  292. /* else reset */
  293. }
  294. }