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@@ -48,7 +48,9 @@ module mcu_cmd(
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output SD_DMA_PARTIAL,
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output [10:0] SD_DMA_PARTIAL_START,
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output [10:0] SD_DMA_PARTIAL_END,
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-
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+ output reg SD_DMA_START_MID_BLOCK,
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+ output reg SD_DMA_END_MID_BLOCK,
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+
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// DAC
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output [10:0] dac_addr_out,
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input DAC_STATUS,
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@@ -103,6 +105,8 @@ initial begin
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dspx_dat_addr_out = 10'b0000000000;
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dspx_reset_out = 1'b1;
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region_out = 0;
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+ SD_DMA_START_MID_BLOCK = 0;
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+ SD_DMA_END_MID_BLOCK = 0;
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end
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wire [31:0] snes_sysclk_freq;
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@@ -179,6 +183,7 @@ initial begin
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MSU_ADDR_OUT_BUF = 0;
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SD_DMA_ENr = 0;
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MAPPER_BUF = 1;
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+ SD_DMA_PARTIALr = 0;
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end
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// command interpretation
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@@ -221,12 +226,16 @@ always @(posedge clk) begin
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SD_DMA_ENr <= 1'b0;
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8'h6x:
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case (spi_byte_cnt)
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- 32'h2:
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+ 32'h2: begin
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+ SD_DMA_START_MID_BLOCK <= param_data[7];
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SD_DMA_PARTIAL_STARTr[10:9] <= param_data[1:0];
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+ end
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32'h3:
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SD_DMA_PARTIAL_STARTr[8:0] <= {param_data, 1'b0};
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- 32'h4:
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+ 32'h4: begin
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+ SD_DMA_END_MID_BLOCK <= param_data[7];
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SD_DMA_PARTIAL_ENDr[10:9] <= param_data[1:0];
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+ end
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32'h5:
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SD_DMA_PARTIAL_ENDr[8:0] <= {param_data, 1'b0};
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endcase
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