Bladeren bron

pcb wip (resistors for FPGA JTAG)

Maximilian Rehkopf 14 jaren geleden
bovenliggende
commit
8f0226c90a

File diff suppressed because it is too large
+ 268 - 256
pcb/kicad/$savepcb.brd


+ 57 - 24
pcb/kicad/fpga.bak

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 09:27:38 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 14:05:50 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A3 16535 11700
 Sheet 6 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -54,10 +54,12 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
-Text GLabel 5800 8400 0    50   BiDi ~ 0
-SD_DAT1
-Text GLabel 5800 7100 0    50   BiDi ~ 0
-SD_DAT2
+Wire Wire Line
+	5550 1450 6200 1450
+Wire Wire Line
+	5550 1750 6200 1750
+Wire Wire Line
+	4950 1650 5050 1650
 Wire Wire Line
 	6200 7100 5800 7100
 Connection ~ 4850 10950
@@ -68,10 +70,6 @@ Wire Wire Line
 Connection ~ 4850 10350
 Wire Wire Line
 	4850 10350 4850 10450
-Wire Wire Line
-	6200 1650 5650 1650
-Wire Wire Line
-	6200 1450 5650 1450
 Wire Wire Line
 	5800 3800 6200 3800
 Wire Wire Line
@@ -343,9 +341,9 @@ Wire Wire Line
 Wire Wire Line
 	6900 1050 6900 950 
 Wire Wire Line
-	4350 11100 4350 10850
+	4350 10850 4350 11100
 Wire Wire Line
-	4350 10450 4350 10200
+	4350 10200 4350 10450
 Connection ~ 3500 10950
 Wire Wire Line
 	3500 10950 3500 10850
@@ -358,7 +356,7 @@ Wire Wire Line
 Wire Wire Line
 	3750 10350 3000 10350
 Wire Wire Line
-	3000 10450 3000 10200
+	3000 10200 3000 10450
 Connection ~ 1900 10950
 Wire Wire Line
 	2150 10950 2150 10850
@@ -383,9 +381,9 @@ Wire Wire Line
 Wire Wire Line
 	2400 10350 650  10350
 Wire Wire Line
-	650  10200 650  10450
+	650  10450 650  10200
 Wire Wire Line
-	650  10850 650  11100
+	650  11100 650  10850
 Wire Wire Line
 	2150 10350 2150 10450
 Connection ~ 2150 10350
@@ -410,7 +408,7 @@ Wire Wire Line
 	2400 10950 2400 10850
 Connection ~ 2150 10950
 Wire Wire Line
-	3000 11100 3000 10850
+	3000 10850 3000 11100
 Wire Wire Line
 	3500 10350 3500 10450
 Connection ~ 3500 10350
@@ -625,19 +623,54 @@ Wire Wire Line
 Wire Wire Line
 	10900 5750 10500 5750
 Wire Wire Line
-	6200 1550 5650 1550
-Wire Wire Line
-	6200 1750 5650 1750
+	6200 1550 4950 1550
 Wire Wire Line
 	4350 10350 5100 10350
 Wire Wire Line
 	5100 10350 5100 10450
 Connection ~ 4600 10350
 Wire Wire Line
-	4850 10950 4850 10850
+	4850 10850 4850 10950
 Connection ~ 4600 10950
 Wire Wire Line
 	6200 8400 5800 8400
+Wire Wire Line
+	5050 1450 4950 1450
+Wire Wire Line
+	5050 1750 4950 1750
+Wire Wire Line
+	5550 1650 6200 1650
+$Comp
+L R R19
+U 1 1 4C501B8C
+P 5300 1750
+F 0 "R19" V 5250 1500 50  0000 C CNN
+F 1 "100" V 5300 1750 50  0000 C CNN
+	1    5300 1750
+	0    1    1    0   
+$EndComp
+$Comp
+L R R18
+U 1 1 4C501B89
+P 5300 1650
+F 0 "R18" V 5250 1400 50  0000 C CNN
+F 1 "100" V 5300 1650 50  0000 C CNN
+	1    5300 1650
+	0    1    1    0   
+$EndComp
+$Comp
+L R R17
+U 1 1 4C501B82
+P 5300 1450
+F 0 "R17" V 5250 1200 50  0000 C CNN
+F 1 "100" V 5300 1450 50  0000 C CNN
+	1    5300 1450
+	0    1    1    0   
+$EndComp
+Text GLabel 5800 8400 0    50   BiDi ~ 0
+SD_DAT1
+Text GLabel 5800 7100 0    50   BiDi ~ 0
+SD_DAT2
 Text Notes 11850 10450 0    500  ~ 100
 FPGA
 Text Notes 12800 8150 1    50   ~ 0
@@ -672,13 +705,13 @@ F 2 "SM0805_FIXEDMASK" H 4850 10650 60  0001 C CNN
 	1    4850 10650
 	1    0    0    -1  
 $EndComp
-Text GLabel 5650 1450 0    50   Input ~ 0
+Text GLabel 4950 1450 0    50   Input ~ 0
 TMS
-Text GLabel 5650 1550 0    50   Output ~ 0
+Text GLabel 4950 1550 0    50   Output ~ 0
 EXT_TDO
-Text GLabel 5650 1650 0    50   Input ~ 0
+Text GLabel 4950 1650 0    50   Input ~ 0
 MCU_TDO
-Text GLabel 5650 1750 0    50   Input ~ 0
+Text GLabel 4950 1750 0    50   Input ~ 0
 TCK
 Text GLabel 5650 2200 0    50   Input ~ 0
 CCLK

+ 57 - 24
pcb/kicad/fpga.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 15:28:41 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A3 16535 11700
 Sheet 6 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -54,10 +54,12 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
-Text GLabel 5800 8400 0    50   BiDi ~ 0
-SD_DAT1
-Text GLabel 5800 7100 0    50   BiDi ~ 0
-SD_DAT2
+Wire Wire Line
+	5550 1450 6200 1450
+Wire Wire Line
+	5550 1750 6200 1750
+Wire Wire Line
+	4950 1650 5050 1650
 Wire Wire Line
 	6200 7100 5800 7100
 Connection ~ 4850 10950
@@ -68,10 +70,6 @@ Wire Wire Line
 Connection ~ 4850 10350
 Wire Wire Line
 	4850 10350 4850 10450
-Wire Wire Line
-	6200 1650 5650 1650
-Wire Wire Line
-	6200 1450 5650 1450
 Wire Wire Line
 	5800 3800 6200 3800
 Wire Wire Line
@@ -343,9 +341,9 @@ Wire Wire Line
 Wire Wire Line
 	6900 1050 6900 950 
 Wire Wire Line
-	4350 11100 4350 10850
+	4350 10850 4350 11100
 Wire Wire Line
-	4350 10450 4350 10200
+	4350 10200 4350 10450
 Connection ~ 3500 10950
 Wire Wire Line
 	3500 10950 3500 10850
@@ -358,7 +356,7 @@ Wire Wire Line
 Wire Wire Line
 	3750 10350 3000 10350
 Wire Wire Line
-	3000 10450 3000 10200
+	3000 10200 3000 10450
 Connection ~ 1900 10950
 Wire Wire Line
 	2150 10950 2150 10850
@@ -383,9 +381,9 @@ Wire Wire Line
 Wire Wire Line
 	2400 10350 650  10350
 Wire Wire Line
-	650  10200 650  10450
+	650  10450 650  10200
 Wire Wire Line
-	650  10850 650  11100
+	650  11100 650  10850
 Wire Wire Line
 	2150 10350 2150 10450
 Connection ~ 2150 10350
@@ -410,7 +408,7 @@ Wire Wire Line
 	2400 10950 2400 10850
 Connection ~ 2150 10950
 Wire Wire Line
-	3000 11100 3000 10850
+	3000 10850 3000 11100
 Wire Wire Line
 	3500 10350 3500 10450
 Connection ~ 3500 10350
@@ -625,19 +623,54 @@ Wire Wire Line
 Wire Wire Line
 	10900 5750 10500 5750
 Wire Wire Line
-	6200 1550 5650 1550
-Wire Wire Line
-	6200 1750 5650 1750
+	6200 1550 4950 1550
 Wire Wire Line
 	4350 10350 5100 10350
 Wire Wire Line
 	5100 10350 5100 10450
 Connection ~ 4600 10350
 Wire Wire Line
-	4850 10950 4850 10850
+	4850 10850 4850 10950
 Connection ~ 4600 10950
 Wire Wire Line
 	6200 8400 5800 8400
+Wire Wire Line
+	5050 1450 4950 1450
+Wire Wire Line
+	5050 1750 4950 1750
+Wire Wire Line
+	5550 1650 6200 1650
+$Comp
+L R R19
+U 1 1 4C501B8C
+P 5300 1750
+F 0 "R19" V 5250 1500 50  0000 C CNN
+F 1 "100" V 5300 1750 50  0000 C CNN
+	1    5300 1750
+	0    1    1    0   
+$EndComp
+$Comp
+L R R18
+U 1 1 4C501B89
+P 5300 1650
+F 0 "R18" V 5250 1400 50  0000 C CNN
+F 1 "100" V 5300 1650 50  0000 C CNN
+	1    5300 1650
+	0    1    1    0   
+$EndComp
+$Comp
+L R R17
+U 1 1 4C501B82
+P 5300 1450
+F 0 "R17" V 5250 1200 50  0000 C CNN
+F 1 "100" V 5300 1450 50  0000 C CNN
+	1    5300 1450
+	0    1    1    0   
+$EndComp
+Text GLabel 5800 8400 0    50   BiDi ~ 0
+SD_DAT1
+Text GLabel 5800 7100 0    50   BiDi ~ 0
+SD_DAT2
 Text Notes 11850 10450 0    500  ~ 100
 FPGA
 Text Notes 12800 8150 1    50   ~ 0
@@ -672,13 +705,13 @@ F 2 "SM0805_FIXEDMASK" H 4850 10650 60  0001 C CNN
 	1    4850 10650
 	1    0    0    -1  
 $EndComp
-Text GLabel 5650 1450 0    50   Input ~ 0
+Text GLabel 4950 1450 0    50   Input ~ 0
 TMS
-Text GLabel 5650 1550 0    50   Output ~ 0
+Text GLabel 4950 1550 0    50   Output ~ 0
 EXT_TDO
-Text GLabel 5650 1650 0    50   Input ~ 0
+Text GLabel 4950 1650 0    50   Input ~ 0
 MCU_TDO
-Text GLabel 5650 1750 0    50   Input ~ 0
+Text GLabel 4950 1750 0    50   Input ~ 0
 TCK
 Text GLabel 5650 2200 0    50   Input ~ 0
 CCLK

+ 4 - 4
pcb/kicad/mcu.bak

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 09:27:38 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 14:05:50 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 4 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -610,7 +610,7 @@ L R R8
 U 1 1 4BF850D1
 P 7250 3300
 F 0 "R8" V 7200 3550 50  0000 C CNN
-F 1 "270" V 7250 3300 50  0000 C CNN
+F 1 "100" V 7250 3300 50  0000 C CNN
 F 2 "SM0805_FIXEDMASK" H 7250 3300 60  0001 C CNN
 	1    7250 3300
 	0    1    1    0   
@@ -620,7 +620,7 @@ L R R7
 U 1 1 4BF850A9
 P 7450 5000
 F 0 "R7" V 7350 5000 50  0000 C CNN
-F 1 "270" V 7450 5000 50  0000 C CNN
+F 1 "100" V 7450 5000 50  0000 C CNN
 F 2 "SM0805_FIXEDMASK" H 7450 5000 60  0001 C CNN
 	1    7450 5000
 	0    -1   1    0   

+ 4 - 4
pcb/kicad/mcu.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 15:28:41 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 4 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""
@@ -610,7 +610,7 @@ L R R8
 U 1 1 4BF850D1
 P 7250 3300
 F 0 "R8" V 7200 3550 50  0000 C CNN
-F 1 "270" V 7250 3300 50  0000 C CNN
+F 1 "100" V 7250 3300 50  0000 C CNN
 F 2 "SM0805_FIXEDMASK" H 7250 3300 60  0001 C CNN
 	1    7250 3300
 	0    1    1    0   
@@ -620,7 +620,7 @@ L R R7
 U 1 1 4BF850A9
 P 7450 5000
 F 0 "R7" V 7350 5000 50  0000 C CNN
-F 1 "270" V 7450 5000 50  0000 C CNN
+F 1 "100" V 7450 5000 50  0000 C CNN
 F 2 "SM0805_FIXEDMASK" H 7450 5000 60  0001 C CNN
 	1    7450 5000
 	0    -1   1    0   

+ 2 - 2
pcb/kicad/memory.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 15:28:41 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 3 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

+ 2 - 2
pcb/kicad/pwr_misc.bak

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 09:27:38 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 14:05:50 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 5 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

+ 2 - 2
pcb/kicad/pwr_misc.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 15:28:41 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 5 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

+ 1 - 1
pcb/kicad/sd2snes-cache.bak

@@ -1,4 +1,4 @@
-EESchema-LIBRARY Version 2.3  Date: Tue 27 Jul 2010 09:27:38 PM CEST
+EESchema-LIBRARY Version 2.3  Date: Wed 28 Jul 2010 14:05:50 CEST
 #
 # +1.2V
 #

+ 1 - 1
pcb/kicad/sd2snes-cache.lib

@@ -1,4 +1,4 @@
-EESchema-LIBRARY Version 2.3  Date: Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema-LIBRARY Version 2.3  Date: Wed 28 Jul 2010 15:28:41 CEST
 #
 # +1.2V
 #

+ 2 - 2
pcb/kicad/sd2snes.bak

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 09:27:38 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 14:05:50 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 1 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

File diff suppressed because it is too large
+ 267 - 255
pcb/kicad/sd2snes.brd


+ 24 - 3
pcb/kicad/sd2snes.cmp

@@ -1,4 +1,4 @@
-Cmp-Mod V01 Created by CvPCB (2010-03-14)-final date = Mon 26 Jul 2010 02:34:20 PM CEST
+Cmp-Mod V01 Created by CvPCB (2010-07-23 BZR 2422)-unstable date = Wed 28 Jul 2010 14:05:47 CEST
 
 BeginCmp
 TimeStamp = /4B6EC9C3/4BAF2EAF;
@@ -563,14 +563,14 @@ EndCmp
 BeginCmp
 TimeStamp = /4B6ED75B/4BF850A9;
 Reference = R7;
-ValeurCmp = 270;
+ValeurCmp = 100;
 IdModule  = SM0805_FIXEDMASK;
 EndCmp
 
 BeginCmp
 TimeStamp = /4B6ED75B/4BF850D1;
 Reference = R8;
-ValeurCmp = 270;
+ValeurCmp = 100;
 IdModule  = SM0805_FIXEDMASK;
 EndCmp
 
@@ -630,6 +630,27 @@ ValeurCmp = 680;
 IdModule  = SM0805_FIXEDMASK;
 EndCmp
 
+BeginCmp
+TimeStamp = /4B6E18FC/4C501B82;
+Reference = R17;
+ValeurCmp = 100;
+IdModule  = SM0805_FIXEDMASK;
+EndCmp
+
+BeginCmp
+TimeStamp = /4B6E18FC/4C501B89;
+Reference = R18;
+ValeurCmp = 100;
+IdModule  = SM0805_FIXEDMASK;
+EndCmp
+
+BeginCmp
+TimeStamp = /4B6E18FC/4C501B8C;
+Reference = R19;
+ValeurCmp = 100;
+IdModule  = SM0805_FIXEDMASK;
+EndCmp
+
 BeginCmp
 TimeStamp = /4B6E16F2/4B6E1740;
 Reference = U1;

File diff suppressed because it is too large
+ 426 - 414
pcb/kicad/sd2snes.net


+ 2 - 2
pcb/kicad/sd2snes.pro

@@ -1,4 +1,4 @@
-update=Sun 25 Jul 2010 11:01:51 PM CEST
+update=Wed 28 Jul 2010 15:30:01 CEST
 version=1
 last_client=pcbnew
 [general]
@@ -102,7 +102,7 @@ DrawLar=59
 EdgeLar=150
 TxtLar=60
 MSegLar=120
-LastNetListRead=
+LastNetListRead=sd2snes.net
 [pcbnew/libraries]
 LibDir=
 LibName1=sockets

+ 2 - 2
pcb/kicad/sd2snes.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 15:28:41 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 1 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

+ 2 - 2
pcb/kicad/snesslot.bak

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 09:27:38 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 14:05:50 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 2 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

+ 2 - 2
pcb/kicad/snesslot.sch

@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Tue 27 Jul 2010 10:18:35 PM CEST
+EESchema Schematic File Version 2  date Wed 28 Jul 2010 15:28:41 CEST
 LIBS:power
 LIBS:device
 LIBS:transistors
@@ -46,7 +46,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 2 6
 Title "sd2snes Mark II"
-Date "27 jul 2010"
+Date "28 jul 2010"
 Rev "A"
 Comp "Maximilian Rehkopf"
 Comment1 ""

Some files were not shown because too many files changed in this diff