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firmware: add some FPGA sanity checks; fix led_panic behavior

ikari 12 gadi atpakaļ
vecāks
revīzija
3ecf4954a0
2 mainītis faili ar 21 papildinājumiem un 6 dzēšanām
  1. 12 0
      src/fpga.c
  2. 9 6
      src/led.c

+ 12 - 0
src/fpga.c

@@ -102,6 +102,10 @@ void fpga_pgm(uint8_t* filename) {
     i=0;
     timeout = getticks() + 100;
     fpga_set_prog_b(0);
+if(BITBAND(PROGBREG->FIOPIN, PROGBBIT)) {
+  printf("PROGB is stuck high!\n");
+  led_panic();
+}
     uart_putc('P');
     fpga_set_prog_b(1);
     while(!fpga_get_initb()){
@@ -110,6 +114,10 @@ void fpga_pgm(uint8_t* filename) {
         led_panic();
       }
     };
+    if(fpga_get_done()) {
+      printf("DONE is stuck high!\n");
+      led_panic();
+    }
     LPC_GPIO2->FIOMASK1 = ~(BV(0));
     uart_putc('p');
 
@@ -160,6 +168,10 @@ void fpga_rompgm() {
         led_panic();
       }
     };
+    if(fpga_get_done()) {
+      printf("DONE is stuck high!\n");
+      led_panic();
+    }
     LPC_GPIO2->FIOMASK1 = ~(BV(0));
     uart_putc('p');
 

+ 9 - 6
src/led.c

@@ -86,13 +86,16 @@ void toggle_write_led() {
 }
 
 void led_panic() {
+  led_std();
   while(1) {
-    LPC_GPIO2->FIODIR |= BV(4) | BV(5);
-    LPC_GPIO1->FIODIR |= BV(23);
-    delay_ms(350);
-    LPC_GPIO2->FIODIR &= ~(BV(4) | BV(5));
-    LPC_GPIO1->FIODIR &= ~BV(23);
-    delay_ms(350);
+    rdyled(1);
+    readled(1);
+    writeled(1);
+    delay_ms(100);
+    rdyled(0);
+    readled(0);
+    writeled(0);
+    delay_ms(100);
     cli_entrycheck();
   }
 }