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@@ -199,7 +199,6 @@ void set_mapper(uint8_t val) {
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uint8_t fpga_test() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF0); /* TEST */
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- FPGA_TX_BYTE(0x00); /* dummy */
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uint8_t result = FPGA_RX_BYTE();
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FPGA_DESELECT();
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return result;
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@@ -208,7 +207,6 @@ uint8_t fpga_test() {
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uint16_t fpga_status() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF1); /* STATUS */
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- FPGA_TX_BYTE(0x00); /* dummy */
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uint16_t result = (FPGA_RX_BYTE()) << 8;
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result |= FPGA_RX_BYTE();
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FPGA_DESELECT();
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@@ -237,12 +235,12 @@ void fpga_sddma(uint8_t tgt, uint8_t partial) {
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FPGA_DESELECT();
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF1); /* STATUS */
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- FPGA_TX_BYTE(0x00); /* dummy */
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DBG_SD printf("FPGA DMA request sent, wait for completion...");
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while((status=FPGA_RX_BYTE()) & 0x80) {
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FPGA_RX_BYTE(); /* eat the 2nd status byte */
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test++;
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}
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+
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DBG_SD printf("...complete\n");
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FPGA_DESELECT();
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// if(test<5)printf("loopy: %ld %02x\n", test, status);
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@@ -302,7 +300,6 @@ void set_msu_status(uint8_t set, uint8_t reset) {
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uint8_t get_msu_volume() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF4); /* MSU_VOLUME */
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- FPGA_TX_BYTE(0x00); /* dummy */
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uint8_t result = FPGA_RX_BYTE();
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FPGA_DESELECT();
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return result;
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@@ -311,7 +308,6 @@ uint8_t get_msu_volume() {
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uint16_t get_msu_track() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF3); /* MSU_TRACK */
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- FPGA_TX_BYTE(0x00); /* dummy */
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uint16_t result = (FPGA_RX_BYTE()) << 8;
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result |= FPGA_RX_BYTE();
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FPGA_DESELECT();
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@@ -321,7 +317,6 @@ uint16_t get_msu_track() {
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uint32_t get_msu_offset() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xF2); /* MSU_OFFSET */
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- FPGA_TX_BYTE(0x00); /* dummy */
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uint32_t result = (FPGA_RX_BYTE()) << 24;
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result |= (FPGA_RX_BYTE()) << 16;
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result |= (FPGA_RX_BYTE()) << 8;
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@@ -333,8 +328,7 @@ uint32_t get_msu_offset() {
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uint32_t get_snes_sysclk() {
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FPGA_SELECT();
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FPGA_TX_BYTE(0xFE); /* GET_SYSCLK */
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- FPGA_TX_BYTE(0x00); /* dummy */
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- FPGA_TX_BYTE(0x00); /* dummy */
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+ FPGA_TX_BYTE(0x00); /* dummy (copy current sysclk count to register) */
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uint32_t result = (FPGA_RX_BYTE()) << 24;
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result |= (FPGA_RX_BYTE()) << 16;
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result |= (FPGA_RX_BYTE()) << 8;
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