init.inc 7.3 KB

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  1. ;------------------------------------------------------------------------
  2. ;- Written by: Neviksti
  3. ;- If you use my code, please share your creations with me
  4. ;- as I am always curious :)
  5. ;------------------------------------------------------------------------
  6. ;----------------------------------------------------------------------------
  7. ; InitSNES -- my "standard" initialization of SNES memory and registers
  8. ;----------------------------------------------------------------------------
  9. .MACRO InitSNES
  10. sei ;disable interrupts
  11. clc ;switch to native mode
  12. xce
  13. REP #$38 ; mem/A = 16 bit, X/Y = 16 bit
  14. ;decimal mode off
  15. LDX #$1FFF ;Setup the stack
  16. TXS ;Transfer Index X to Stack Pointer Register
  17. ;do the rest of the initialization in a routine
  18. JSL $008000
  19. SEP #$20 ; mem/A = 8 bit
  20. .ENDM
  21. ;----------------------------------------------------------------------------
  22. .BANK 0 SLOT 0
  23. .ORG 0
  24. .SECTION "InitializeSNESCode" FORCE
  25. InitializeSNES:
  26. PHK ;set Data Bank = Program Bank
  27. PLB
  28. LDA #$0000 ;set Direct Page = $0000
  29. TCD ;Transfer Accumulator to Direct Register
  30. LDX $1FFD ;we clear all the mem at one point ...
  31. STX $4372 ;so save the return address in a place that won't get overwritten
  32. LDX $1FFF
  33. STX $4374
  34. SEP #$20 ; mem/A = 8 bit
  35. REP #$10
  36. LDA #$8F
  37. STA $2100 ;turn screen off for now, set brightness to normal
  38. LDX #$2101
  39. _Loop00: ;regs $2101-$210C
  40. STZ $00,X ;set Sprite,Character,Tile sizes to lowest, and set addresses to $0000
  41. INX
  42. CPX #$210D
  43. BNE _Loop00
  44. _Loop01: ;regs $210D-$2114
  45. STZ $00,X ;Set all BG scroll values to $0000
  46. STZ $00,X
  47. INX
  48. CPX #$2115
  49. BNE _Loop01
  50. LDA #$80 ;reg $2115
  51. STA $2115 ; Initialize VRAM transfer mode to word-access, increment by 1
  52. STZ $2116 ;regs $2117-$2117
  53. STZ $2117 ;VRAM address = $0000
  54. ;reg $2118-$2119
  55. ;VRAM write register... don't need to initialize
  56. STZ $211A ;clear Mode7 setting
  57. LDX #$211B
  58. _Loop02: ;regs $211B-$2120
  59. STZ $00,X ;clear out the Mode7 matrix values
  60. STZ $00,X
  61. INX
  62. CPX #$2121
  63. BNE _Loop02
  64. ;reg $2121 - Color address, doesn't need initilaizing
  65. ;reg $2122 - Color data, is initialized later
  66. LDX #$2123
  67. _Loop03: ;regs $2123-$2133
  68. STZ $00,X ;turn off windows, main screens, sub screens, color addition,
  69. INX ;fixed color = $00, no super-impose (external synchronization),
  70. CPX #$2134 ;no interlaced mode, normal resolution
  71. BNE _Loop03
  72. ;regs $2134-$2136 - multiplication result, no initialization needed
  73. ;reg $2137 - software H/V latch, no initialization needed
  74. ;reg $2138 - Sprite data read, no initialization needed
  75. ;regs $2139-$213A - VRAM data read, no initialization needed
  76. ;reg $213B - Color RAM data read, no initialization needed
  77. ;regs $213C-$213D - H/V latched data read, no initialization needed
  78. STZ $213E ;reg $213E - might not be necesary, but selects PPU master/slave mode
  79. ;reg $213F - PPU status flag, no initialization needed
  80. ;reg $2140-$2143 - APU communication regs, no initialization required
  81. ;reg $2180 - read/write WRAM register, no initialization required
  82. ;reg $2181-$2183 - WRAM address, no initialization required
  83. ;reg $4016-$4017 - serial JoyPad read registers, no need to initialize
  84. STZ $4200 ;reg $4200 - disable timers, NMI,and auto-joyread
  85. LDA #$FF
  86. STA $4201 ;reg $4201 - programmable I/O write port, initalize to allow reading at in-port
  87. ;regs $4202-$4203 - multiplication registers, no initialization required
  88. ;regs $4204-$4206 - division registers, no initialization required
  89. ;regs $4207-$4208 - Horizontal-IRQ timer setting, since we disabled this, it is OK to not init
  90. ;regs $4209-$420A - Vertical-IRQ timer setting, since we disabled this, it is OK to not init
  91. STZ $420B ;reg $420B - turn off all general DMA channels
  92. STZ $420C ;reg $420C - turn off all H-MA channels
  93. STZ $420D ;reg $420D - ROM access time to slow (2.68Mhz)
  94. LDA $4210 ;reg $4210 - NMI status, reading resets
  95. ;reg $4211 - IRQ status, no need to initialize
  96. ;reg $4212 - H/V blank and JoyRead status, no need to initialize
  97. ;reg $4213 - programmable I/O inport, no need to initialize
  98. ;reg $4214-$4215 - divide results, no need to initialize
  99. ;reg $4216-$4217 - multiplication or remainder results, no need to initialize
  100. ;regs $4218-$421f - JoyPad read registers, no need to initialize
  101. ;regs $4300-$437F
  102. ;no need to intialize because DMA was disabled above
  103. ;also, we're not sure what all of the registers do, so it is better to leave them at
  104. ;their reset state value
  105. JSR ClearVRAM ;Reset VRAM
  106. JSR ClearPalette ;Reset colors
  107. ;**** clear Sprite tables ********
  108. STZ $2102 ;sprites initialized to be off the screen, palette 0, character 0
  109. STZ $2103
  110. LDX #$0080
  111. LDA #$F0
  112. _Loop08:
  113. STA $2104 ;set X = 240
  114. STA $2104 ;set Y = 240
  115. STZ $2104 ;set character = $00
  116. STZ $2104 ;set priority=0, no flips
  117. DEX
  118. BNE _Loop08
  119. LDX #$0020
  120. _Loop09:
  121. STZ $2104 ;set size bit=0, x MSB = 0
  122. DEX
  123. BNE _Loop09
  124. ;**** clear WRAM ********
  125. STZ $2181 ;set WRAM address to $000000
  126. STZ $2182
  127. STZ $2183
  128. LDX #$8008
  129. STX $4300 ;Set DMA mode to fixed source, BYTE to $2180
  130. LDX #wram_fill_byte
  131. STX $4302 ;Set source offset
  132. LDA #:wram_fill_byte
  133. STA $4304 ;Set source bank
  134. LDX #$0000
  135. STX $4305 ;Set transfer size to 64k bytes
  136. LDA #$01
  137. STA $420B ;Initiate transfer
  138. LDA #$01 ;now set the next 64k bytes
  139. STA $420B ;Initiate transfer
  140. PHK ;make sure Data Bank = Program Bank
  141. PLB
  142. CLI ;enable interrupts again
  143. LDX $4372 ;get our return address...
  144. STX $1FFD
  145. LDA $4374
  146. STA $1FFF
  147. RTL
  148. wram_fill_byte:
  149. .db $00
  150. ;----------------------------------------------------------------------------
  151. ; ClearVRAM -- Sets every byte of VRAM to zero
  152. ; In: None
  153. ; Out: None
  154. ; Modifies: flags
  155. ;----------------------------------------------------------------------------
  156. ClearVRAM:
  157. pha
  158. phx
  159. php
  160. REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
  161. SEP #$20
  162. LDA #$80
  163. STA $2115 ;Set VRAM port to word access
  164. LDX #$1809
  165. STX $4300 ;Set DMA mode to fixed source, WORD to $2118/9
  166. LDX #$0000
  167. STX $2116 ;Set VRAM port address to $0000
  168. STX $0000 ;Set $00:0000 to $0000 (assumes scratchpad ram)
  169. STX $4302 ;Set source address to $xx:0000
  170. LDA #$00
  171. STA $4304 ;Set source bank to $00
  172. LDX #$FFFF
  173. STX $4305 ;Set transfer size to 64k-1 bytes
  174. LDA #$01
  175. STA $420B ;Initiate transfer
  176. STZ $2119 ;clear the last byte of the VRAM
  177. plp
  178. plx
  179. pla
  180. RTS
  181. ;----------------------------------------------------------------------------
  182. ; ClearPalette -- Reset all palette colors to zero
  183. ; In: None
  184. ; Out: None
  185. ; Modifies: flags
  186. ;----------------------------------------------------------------------------
  187. ClearPalette:
  188. PHX
  189. PHP
  190. REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
  191. SEP #$20
  192. STZ $2121
  193. LDX #$0100
  194. ClearPaletteLoop:
  195. STZ $2122
  196. STZ $2122
  197. DEX
  198. BNE ClearPaletteLoop
  199. PLP
  200. PLX
  201. RTS
  202. .ENDS