sram.h 7.5 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #ifndef __SRAM_H__
  21. #define __SRAM_H__
  22. #include <stdlib.h>
  23. #include <stdint.h>
  24. #include <avr/io.h>
  25. /*
  26. * ---------------------------- PORT A ----------------------------
  27. */
  28. #define AVR_DATA_PORT PORTA
  29. #define AVR_DATA_DIR DDRA
  30. #define AVR_DATA_PIN PINA
  31. #define avr_data_in() ((AVR_DATA_DIR = 0x00),\
  32. (AVR_DATA_PORT = 0x00))
  33. #define avr_data_out() (AVR_DATA_DIR = 0xff)
  34. /*
  35. * ---------------------------- PORT B ----------------------------
  36. */
  37. #define AVR_PORT PORTB
  38. #define AVR_DIR DDRB
  39. #define AVR_RD_PORT PORTB
  40. #define AVR_RD_DIR DDRB
  41. #define AVR_RD_PIN PB2
  42. #define avr_rd_hi() (AVR_RD_PORT |= (1 << AVR_RD_PIN))
  43. #define avr_rd_lo() (AVR_RD_PORT &= ~(1 << AVR_RD_PIN))
  44. #define AVR_WR_PORT PORTB
  45. #define AVR_WR_DIR DDRB
  46. #define AVR_WR_PIN PB1
  47. #define avr_wr_hi() (AVR_WR_PORT |= (1 << AVR_WR_PIN))
  48. #define avr_wr_lo() (AVR_WR_PORT &= ~(1 << AVR_WR_PIN))
  49. #define AVR_CS_PORT PORTB
  50. #define AVR_CS_DIR DDRB
  51. #define AVR_CS_PIN PB0
  52. #define avr_cs_hi() (AVR_CS_PORT |= (1 << AVR_CS_PIN))
  53. #define avr_cs_lo() (AVR_CS_PORT &= ~(1 << AVR_CS_PIN))
  54. #define SNES_IRQ_PORT PORTB
  55. #define SNES_IRQ_DIR DDRB
  56. #define SNES_IRQ_PIN PB3
  57. #define snes_irq_on() (SNES_IRQ_DIR |= (1 << SNES_IRQ_PIN))
  58. #define snes_irq_hi() (SNES_IRQ_PORT |= (1 << SNES_IRQ_PIN))
  59. #define snes_irq_off() (SNES_IRQ_DIR &= ~(1 << SNES_IRQ_PIN))
  60. #define snes_irq_lo() (SNES_IRQ_PORT &= ~(1 << SNES_IRQ_PIN))
  61. /*
  62. * ---------------------------- PORT C ----------------------------
  63. */
  64. #define AVR_ADDR_PORT PORTC
  65. #define AVR_ADDR_DIR DDRC
  66. #define AVR_ADDR_LATCH_PORT PORTC
  67. #define AVR_ADDR_LATCH_DIR DDRC
  68. #define AVR_ADDR_LATCH_PIN PC6
  69. #define avr_addr_latch_hi() (AVR_ADDR_LATCH_PORT |= (1 << AVR_ADDR_LATCH_PIN))
  70. #define avr_addr_latch_lo() (AVR_ADDR_LATCH_PORT &= ~(1 << AVR_ADDR_LATCH_PIN))
  71. #define AVR_ADDR_SCK_PORT PORTC
  72. #define AVR_ADDR_SCK_DIR DDRC
  73. #define AVR_ADDR_SCK_PIN PC5
  74. #define avr_addr_sck_hi() (AVR_ADDR_SCK_PORT |= (1 << AVR_ADDR_SCK_PIN))
  75. #define avr_addr_sck_lo() (AVR_ADDR_SCK_PORT &= ~(1 << AVR_ADDR_SCK_PIN))
  76. #define AVR_ADDR_SER_PORT PORTC
  77. #define AVR_ADDR_SER_DIR DDRC
  78. #define AVR_ADDR_SER_PIN PC4
  79. #define avr_addr_ser_hi() (AVR_ADDR_SER_PORT |= (1 << AVR_ADDR_SER_PIN))
  80. #define avr_addr_ser_lo() (AVR_ADDR_SER_PORT &= ~(1 << AVR_ADDR_SER_PIN))
  81. #define AVR_ADDR_LOAD_PORT PORTC
  82. #define AVR_ADDR_LOAD_DIR DDRC
  83. #define AVR_ADDR_LOAD_PIN PC2
  84. #define counter_load() ((AVR_ADDR_LOAD_PORT &= ~(1 << AVR_ADDR_LOAD_PIN)),\
  85. (AVR_ADDR_LOAD_PORT |= (1 << AVR_ADDR_LOAD_PIN)))
  86. #define AVR_BTLDR_EN_PORT PORTC
  87. #define AVR_BTLDR_EN_DIR DDRC
  88. #define AVR_BTLDR_EN_PIN PC1
  89. #define btldr_down() ((AVR_BTLDR_EN_PORT &= ~(1 << AVR_BTLDR_EN_PIN)),\
  90. (AVR_BTLDR_EN_PORT |= (1 << AVR_BTLDR_EN_PIN)))
  91. #define AVR_ADDR_UP_PORT PORTC
  92. #define AVR_ADDR_UP_DIR DDRC
  93. #define AVR_ADDR_UP_PIN PC0
  94. #define counter_up() ((AVR_ADDR_UP_PORT &= ~(1 << AVR_ADDR_UP_PIN)),\
  95. (AVR_ADDR_UP_PORT |= (1 << AVR_ADDR_UP_PIN)))
  96. #define SNES_WR_PORT PORTC
  97. #define SNES_WR_DIR DDRC
  98. #define SNES_WR_PIN PC3
  99. #define LED_PORT PORTC
  100. #define LED_DIR DDRC
  101. #define LED_PIN PC7
  102. #define led_on() ((LED_PORT &=~ (1 << LED_PIN)),\
  103. (LED_DIR &=~ (1 << LED_PIN)))
  104. #define led_off() ((LED_PORT &=~ (1 << LED_PIN)),\
  105. (LED_DIR |= (1 << LED_PIN)))
  106. #define led_pwm_on() (LED_DIR &=~ (1 << LED_PIN))
  107. #define led_pwm_off() (LED_DIR |= (1 << LED_PIN))
  108. /*
  109. * ---------------------------- PORT D ----------------------------
  110. */
  111. #define AVR_SNES_PORT PORTD
  112. #define AVR_SNES_DIR DDRD
  113. #define AVR_SNES_SW_PORT PORTD
  114. #define AVR_SNES_SW_DIR DDRD
  115. #define AVR_SNES_SW_PIN PD5
  116. #define avr_bus_active() ((AVR_SNES_SW_PORT &= ~(1 << AVR_SNES_SW_PIN)),\
  117. (HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN)),\
  118. (AVR_CS_DIR |= (1 << AVR_CS_PIN)))
  119. #define snes_bus_active() ((AVR_SNES_SW_PORT |= (1 << AVR_SNES_SW_PIN)),\
  120. (AVR_CS_DIR &= ~(1 << AVR_CS_PIN)),\
  121. (AVR_CS_PORT |= (1 << AVR_CS_PIN)))
  122. #define HI_LOROM_SW_PORT PORTD
  123. #define HI_LOROM_SW_DIR DDRD
  124. #define HI_LOROM_SW_PIN PD6
  125. #define snes_hirom() (HI_LOROM_SW_PORT &= ~(1 << HI_LOROM_SW_PIN))
  126. #define snes_lorom() (HI_LOROM_SW_PORT |= (1 << HI_LOROM_SW_PIN))
  127. #define SNES_WR_EN_PORT PORTD
  128. #define SNES_WR_EN_DIR DDRD
  129. #define SNES_WR_EN_PIN PD7
  130. #define snes_wr_disable() (SNES_WR_EN_PORT &= ~(1 << SNES_WR_EN_PIN))
  131. #define snes_wr_enable() (SNES_WR_EN_PORT |= (1 << SNES_WR_EN_PIN))
  132. #define SNES_RESET_PORT PORTD
  133. #define SNES_RESET_DIR DDRD
  134. #define SNES_RESET_PIN PD3
  135. #define SNES_RESET_INP PIND
  136. #define snes_reset_on() (SNES_RESET_DIR |= (1 << SNES_RESET_PIN))
  137. #define snes_reset_hi() (SNES_RESET_PORT |= (1 << SNES_RESET_PIN))
  138. #define snes_reset_off() (SNES_RESET_DIR &= ~(1 << SNES_RESET_PIN))
  139. #define snes_reset_lo() (SNES_RESET_PORT &= ~(1 << SNES_RESET_PIN))
  140. #define snes_reset_test() ((SNES_RESET_INP & (1 << SNES_RESET_PIN)) == 0)
  141. #define MMC_PORT PORTB
  142. #define MMC_DIR DDRB
  143. #define MMC_MISO_PIN PB6
  144. #define MMC_MOSI_PIN PB5
  145. #define MMC_SCK_PIN PB7
  146. #define MMC_CS_PIN PB4
  147. void sram_init(void);
  148. void sreg_set(uint32_t addr);
  149. uint8_t sram_read(uint32_t addr);
  150. void sram_write(uint32_t addr, uint8_t data);
  151. void sram_bulk_read_start(uint32_t addr);
  152. inline void sram_bulk_read_next(void);
  153. inline void sram_bulk_read_end(void);
  154. uint8_t sram_bulk_read(void);
  155. uint16_t sram_read16_be(uint32_t addr);
  156. void sram_bulk_write_start(uint32_t addr);
  157. inline void sram_bulk_write_next(void);
  158. inline void sram_bulk_write_end(void);
  159. void sram_bulk_write(uint8_t data);
  160. void sram_bulk_copy_from_buffer(uint32_t addr, uint8_t * src, uint32_t len);
  161. void sram_bulk_copy_into_buffer(uint32_t addr, uint8_t * dst, uint32_t len);
  162. void sram_bulk_set(uint32_t addr, uint32_t len, uint8_t value);
  163. inline void sram_bulk_addr_save();
  164. inline void sram_bulk_addr_restore();
  165. #endif