SNESROM.PIN 1.2 KB

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  1. Here's the pinout to a 4Mbit/*Mbit mask Rom used in SNES carts as I've
  2. deduced from various specs and actual testing.
  3. 1 A17 ------\__/------ +5v 32
  4. 2 A18 | | *OE 31
  5. 3 A15 A19 30
  6. 4 A12 A14 29
  7. 5 A7 A13 28
  8. 6 A6 A8 27
  9. 7 A5 A9 26
  10. 8 A4 A11 25
  11. 9 A3 A16 24
  12. 10 A2 A10 23
  13. 11 A1 *CE 22
  14. 12 A0 D7 21
  15. 13 D0 D6 20
  16. 14 D1 D5 19
  17. 15 D2 D4 18
  18. 16 GND |---------------| D3 17
  19. The design approximates std EPROM/SRAM pinouts except for the upper address
  20. lines (A16-A19), and OE which sits where VPP or PRGM usually is for an EPROM.
  21. This pinout approximates Fujitsu's tentative mask ROM pinouts (a package
  22. called GAMEMEDC.ZIP seems to base itself on this and is consequently wrong).
  23. Nintendo uses Fujitsu chips in some carts, but from my testing and card-edge
  24. pinouts provided by other users, I conclude that Fujitsu must have modified
  25. the designs.
  26. NOTE!: Card-edge pin #40, address line 15 (A15) is not used by any cart I've
  27. seen. And ROM pin #3 (see above) that I've determined to be A15 is connected
  28. to card-edge pin#41, labeled on many pinouts schems as A16..not A15!!!
  29. Would some one please verify this inconsistency.
  30. PS: How many Megabits can the Snes address?