mnemonic.txt 3.5 KB

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  1. Table 4. G65SC802 and G65SC816 Instruction Set -- Alphabetical Sequence
  2. ADC Add Memory to Accumulator with Carry
  3. AND "AND" Memory with Accumulator
  4. ASL Shift One Bit Left, Memory or Accumulator
  5. BCC* Branch on Carry Clear (Pe = O)
  6. BCS* Branch on Carry Set (Pe = 1)
  7. BEQ Branch if Equal (Pz = 1)
  8. BIT Bit Test
  9. BMI Branch if Result Minus (PN = 1)
  10. BNE Branch if Not Equal (Pz = 0)
  11. BPL Branch if Result Plus (PN = 0)
  12. BRA Branch Always
  13. BRK Force Break
  14. BRL Branch Always Long
  15. BVC Branch on Overflow Clear (Pv = 0)
  16. BVS Branch on Overflow Set (Pv = 1)
  17. CLC Clear Carry Flag
  18. CLD Clear Decimal Mode
  19. CLI Clear Interrupt Disable Bit
  20. CLV Clear Overflow Flag
  21. CMP* Compare Memory and Accumulator
  22. COP Coprocessor
  23. CPX Compare Memory and Index X
  24. CPY Compare Memory and Index Y
  25. DEC* Decrement Memory or Accumulator by One
  26. DEX Decrement Index X by One
  27. DEY Decrement Index Y by One
  28. EOR Exclusive "OR" Memory with Accumulator
  29. INC* Increment Memory or Accumulator by One
  30. INX Increment Index X by One
  31. INY Increment Index Y by One
  32. JML** Jump Long
  33. JMP Jump to New Location
  34. JSL** Jump Subroutine Long
  35. JSR Jump to New Location Saving Return Address
  36. LDA Load Accumulator with Memory
  37. LDX Load Index X with Memory
  38. LDY Load Index Y with Memory
  39. LSR Shift One Bit Right (Memory or Accumulator)
  40. MVN Block Move Negative
  41. MVP Block Move Positive
  42. NOP No Operation
  43. ORA "OR" Memory with Accumulator
  44. PEA Push Effective Absolute Address on Stack (or Push Immediate Data on Stack)
  45. PEI Push Effective Indirect Address on Stack (add one cycle if DL f 0)
  46. PER Push Effective Program Counter Relative Address on Stack
  47. PHA Push Accumulator on Stack
  48. PHB Push Data Bank Register on Stack
  49. PHD Push Direct Register on Stack
  50. PHK Push Program Bank Register on Stack
  51. PHP Push Processor Status on Stack
  52. PHX Push Index X on Stack
  53. PHY Push index Y on Stack
  54. PLA Pull Accumulator from Stack
  55. PLB Pull Data Bank Register from Stack
  56. PLD Pull Direct Register from Stack
  57. PLP Pull Processor Status from Stack
  58. PLX Pull Index X from Stack
  59. PLY Pull Index Y form Stack
  60. REP Reset Status Bits
  61. ROL Rotate One Bit Left (Memory or Accumulator)
  62. ROR Rotate One Bit Right (Memory or Accumulator)
  63. RTI Return from Interrupt
  64. RTL Return from Subroutine Long
  65. RTS Return from Subroutine
  66. SBC Subtract Memory from Accumulator with Borrow
  67. SEC Set Carry Flag
  68. SED Set Decimal Mode
  69. SEI Set Interrupt Disable Status
  70. SEP Set Processor Status Bits
  71. STA Store Accumulator in Memory
  72. STP Stop the Clock
  73. STX Store Index X in Memory
  74. STY Store Index Y in Memory
  75. STZ Store Zero in Memory
  76. TAX Transfer Accumulator to Index X
  77. TAY Transfer Accumulator to Index Y
  78. TCD* Transfer Accumulator to Direct Register
  79. TCS* Transfer Accumulator to Stack Pointer Register
  80. TDC* Transfer Direct Register to Accumulator
  81. TRB Test and Reset Bit
  82. TSB Test and Set Bit
  83. TSC* Transfer Stack Pointer Register to Accumulator
  84. TSX Transfer Stack Pointer Register to Index X
  85. TXA Transfer Index X to Accumulator
  86. TXS Transfer Index X to Stack Polnter Register
  87. TXY Transfer Index X to Index Y
  88. TYA Transfer Index Y to Accumulator
  89. TYX Transfer Index Y to Index X
  90. WAI Wait for Interrupt
  91. XBA* Exchange AH and AL
  92. XCE Exchange Carry and Emulation Bits
  93. *) Common Mnemonic Aliases
  94. Mnemonic Alias
  95. BCC BLT
  96. BCS BGE
  97. CMP CPA
  98. DEC A DEA
  99. INC A INA
  100. TCD TAD
  101. TCS TAS
  102. TDC TDA
  103. TSC TSA
  104. XBA SWA
  105. **) JSL should be recognized as equivalent to JSR
  106. when it is specified with long absolute addresses.
  107. JML is equivalent to JMP with long addressing forced.
  108. -13-