main.c 9.5 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #include <avr/io.h>
  21. #include <avr/interrupt.h>
  22. #include <util/delay.h>
  23. #include <stdlib.h>
  24. #include <avr/pgmspace.h>
  25. #include <avr/eeprom.h>
  26. #include <string.h>
  27. #include "usbdrv.h"
  28. #include "oddebug.h"
  29. #include "config.h"
  30. #include "requests.h"
  31. #include "uart.h"
  32. #include "sram.h"
  33. #include "debug.h"
  34. #include "info.h"
  35. #include "dump.h"
  36. #include "crc.h"
  37. #include "usb_bulk.h"
  38. #include "timer.h"
  39. #include "watchdog.h"
  40. #include "rle.h"
  41. #include "loader.h"
  42. #include "command.h"
  43. #include "shared_memory.h"
  44. #include "irq.h"
  45. #include "pwm.h"
  46. #include "testing.h"
  47. #include "shell.h"
  48. #include "system.h"
  49. #ifndef NO_DEBUG
  50. extern FILE uart_stdout;
  51. #endif
  52. extern system_t system;
  53. uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC);
  54. usb_transaction_t usb_trans;
  55. usbMsgLen_t usbFunctionSetup(uchar data[8])
  56. {
  57. usbRequest_t *rq = (void *) data;
  58. uint8_t ret_len = 0;
  59. if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
  60. usb_trans.req_bank = 0;
  61. usb_trans.rx_remaining = 0;
  62. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_INIT: %i %i\n"), rq->wValue.word,
  63. rq->wIndex.word);
  64. usb_trans.req_bank_size = (uint32_t) (1L << rq->wValue.word);
  65. usb_trans.req_bank_cnt = rq->wIndex.word;
  66. usb_trans.req_addr_end = (uint32_t) usb_trans.req_bank_size * usb_trans.req_bank_cnt;
  67. usb_trans.req_percent = 0;
  68. usb_trans.req_percent_last = 0;
  69. usb_trans.sync_errors = 0;
  70. debug_P(DEBUG_USB,
  71. PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
  72. usb_trans.req_bank_size, usb_trans.req_bank_cnt, usb_trans.req_addr_end);
  73. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
  74. shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, usb_trans.req_bank_cnt);
  75. #if DO_TIMER
  76. if (usb_trans.req_addr == 0x000000) {
  77. #ifndef NO_DEBUG
  78. timer_start();
  79. #endif
  80. }
  81. #endif
  82. /*
  83. * -------------------------------------------------------------------------
  84. */
  85. } else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
  86. usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
  87. usb_trans.req_addr = rq->wValue.word;
  88. usb_trans.req_addr = usb_trans.req_addr << 16;
  89. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  90. usb_trans.rx_remaining = rq->wLength.word;
  91. if (usb_trans.req_addr && usb_trans.req_addr % usb_trans.req_bank_size == 0) {
  92. #if DO_TIMER
  93. #ifndef NO_DEBUG
  94. #ifdef FLT_DEBUG
  95. debug_P(DEBUG_USB,
  96. PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  97. usb_trans.req_bank, usb_trans.req_addr, timer_stop());
  98. #else
  99. debug_P(DEBUG_USB,
  100. PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  101. usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
  102. #endif
  103. timer_start();
  104. #endif
  105. #endif
  106. usb_trans.req_bank++;
  107. } else {
  108. sram_bulk_write_start(usb_trans.req_addr);
  109. }
  110. ret_len = USB_MAX_TRANS;
  111. /*
  112. * -------------------------------------------------------------------------
  113. */
  114. } else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
  115. usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
  116. usb_trans.req_addr = rq->wValue.word;
  117. usb_trans.req_addr = usb_trans.req_addr << 16;
  118. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  119. usb_trans.rx_remaining = rq->wLength.word;
  120. #if DO_SHM
  121. usb_trans.req_percent = (uint32_t)( 100 * usb_trans.req_addr ) / usb_trans.req_addr_end;
  122. if (usb_trans.req_percent!=usb_trans.req_percent_last){
  123. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, usb_trans.req_percent);
  124. }
  125. usb_trans.req_percent_last = usb_trans.req_percent;
  126. shared_memory_scratchpad_region_save_helper(usb_trans.req_addr);
  127. #endif
  128. if (usb_trans.req_addr && (usb_trans.req_addr % usb_trans.req_bank_size) == 0) {
  129. #if DO_TIMER
  130. #ifndef NO_DEBUG
  131. #ifdef FLT_DEBUG
  132. debug_P(DEBUG_USB,
  133. PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  134. usb_trans.req_bank, usb_trans.req_addr, timer_stop());
  135. #else
  136. debug_P(DEBUG_USB,
  137. PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  138. usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
  139. #endif
  140. timer_start();
  141. #endif
  142. #endif
  143. usb_trans.req_bank++;
  144. #if DO_SHM
  145. shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, usb_trans.req_bank);
  146. #endif
  147. }
  148. ret_len = USB_MAX_TRANS;
  149. /*
  150. * -------------------------------------------------------------------------
  151. */
  152. } else if (rq->bRequest == USB_BULK_UPLOAD_END) {
  153. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_END:\n"));
  154. usb_trans.req_state = REQ_STATUS_IDLE;
  155. sram_bulk_write_end();
  156. #if DO_SHM
  157. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_END, 0);
  158. #endif
  159. ret_len = 0;
  160. /*
  161. * -------------------------------------------------------------------------
  162. */
  163. } else if (rq->bRequest == USB_CRC) {
  164. usb_trans.req_addr = rq->wValue.word;
  165. usb_trans.req_addr = usb_trans.req_addr << 16;
  166. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  167. debug_P(DEBUG_USB, PSTR("USB_CRC: addr=0x%08lx \n"), usb_trans.req_addr);
  168. crc_check_bulk_memory(0x000000, usb_trans.req_addr, usb_trans.req_bank_size);
  169. ret_len = 0;
  170. /*
  171. * -------------------------------------------------------------------------
  172. */
  173. } else if (rq->bRequest == USB_MODE_SNES) {
  174. usb_trans.req_state = REQ_STATUS_SNES;
  175. debug_P(DEBUG_USB, PSTR("USB_MODE_SNES:\n"));
  176. ret_len = 0;
  177. /*
  178. * -------------------------------------------------------------------------
  179. */
  180. } else if (rq->bRequest == USB_MODE_AVR) {
  181. usb_trans.req_state = REQ_STATUS_AVR;
  182. debug_P(DEBUG_USB, PSTR("USB_MODE_AVR:\n"));
  183. ret_len = 0;
  184. /*
  185. * -------------------------------------------------------------------------
  186. */
  187. } else if (rq->bRequest == USB_AVR_RESET) {
  188. debug_P(DEBUG_USB, PSTR("USB_AVR_RESET:\n"));
  189. soft_reset();
  190. ret_len = 0;
  191. /*
  192. * -------------------------------------------------------------------------
  193. */
  194. } else if (rq->bRequest == USB_SET_LAODER) {
  195. debug_P(DEBUG_USB, PSTR("USB_SET_LAODER:\n"));
  196. usb_trans.loader_enabled = rq->wValue.word;
  197. ret_len = 0;
  198. }
  199. usbMsgPtr = usb_trans.rx_buffer;
  200. return ret_len;
  201. }
  202. /*
  203. * -------------------------------------------------------------------------
  204. */
  205. void globals_init(){
  206. memset(&usb_trans,0,sizeof(usb_transaction_t));
  207. usb_trans.req_addr = 0;
  208. usb_trans.req_addr_end = 0;
  209. usb_trans.req_state = REQ_STATUS_IDLE;
  210. usb_trans.rx_remaining = 0;
  211. usb_trans.tx_remaining = 0;
  212. usb_trans.sync_errors = 0;
  213. usb_trans.loader_enabled = 1;
  214. }
  215. int main(void)
  216. {
  217. #ifndef NO_DEBUG
  218. uart_init();
  219. stdout = &uart_stdout;
  220. banner();
  221. #endif
  222. shared_memory_init();
  223. system_init();
  224. sram_init();
  225. pwm_init();
  226. irq_init();
  227. boot_startup_rom(50);
  228. globals_init();
  229. pwm_stop();
  230. usbInit();
  231. usb_connect();
  232. sei();
  233. while (1) {
  234. system_set_bus_avr();
  235. system_set_wr_disable();
  236. while (usb_trans.req_state != REQ_STATUS_SNES) {
  237. usbPoll();
  238. #if DO_SHELL
  239. #ifndef NO_DEBUG
  240. shell_run();
  241. #endif
  242. #endif
  243. }
  244. #if DO_SHM
  245. shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
  246. #endif
  247. #if DO_SHM_SCRATCHPAD
  248. shared_memory_scratchpad_region_tx_restore();
  249. shared_memory_scratchpad_region_rx_restore();
  250. #endif
  251. #if DO_CRC_CHECK
  252. info_P(PSTR("-->CRC Check\n"));
  253. crc_check_bulk_memory(0x000000, usb_trans.req_bank_size * usb_trans.req_bank_cnt, usb_trans.req_bank_size);
  254. #endif
  255. system_set_rom_mode(&usb_trans);
  256. system_set_wr_disable();
  257. system_set_bus_snes();
  258. system_send_snes_reset();
  259. irq_stop();
  260. while ((usb_trans.req_state != REQ_STATUS_AVR)) {
  261. usbPoll();
  262. #if DO_SHELL
  263. #ifndef NO_DEBUG
  264. shell_run();
  265. #endif
  266. #endif
  267. }
  268. info_P(PSTR("-->Switch TO AVR\n"));
  269. shared_memory_init();
  270. irq_init();
  271. if(usb_trans.loader_enabled) {
  272. boot_startup_rom(50);
  273. } else {
  274. system_set_bus_avr();
  275. system_send_snes_reset();
  276. }
  277. globals_init();
  278. }
  279. return 0;
  280. }