main.c 9.7 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #include <avr/io.h>
  21. #include <avr/interrupt.h>
  22. #include <util/delay.h>
  23. #include <stdlib.h>
  24. #include <avr/pgmspace.h>
  25. #include <avr/eeprom.h>
  26. #include <string.h>
  27. #include "usbdrv.h"
  28. #include "oddebug.h"
  29. #include "config.h"
  30. #include "requests.h"
  31. #include "uart.h"
  32. #include "sram.h"
  33. #include "debug.h"
  34. #include "info.h"
  35. #include "dump.h"
  36. #include "crc.h"
  37. #include "usb_bulk.h"
  38. #include "timer.h"
  39. #include "watchdog.h"
  40. #include "rle.h"
  41. #include "loader.h"
  42. #include "command.h"
  43. #include "shared_memory.h"
  44. #include "irq.h"
  45. #include "pwm.h"
  46. #include "testing.h"
  47. #include "shell.h"
  48. #include "system.h"
  49. #ifndef NO_DEBUG
  50. extern FILE uart_stdout;
  51. #endif
  52. extern system_t system;
  53. uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC);
  54. usb_transaction_t usb_trans;
  55. usbMsgLen_t usbFunctionSetup(uchar data[8])
  56. {
  57. usbRequest_t *rq = (void *) data;
  58. uint8_t ret_len = 0;
  59. if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
  60. usb_trans.req_bank = 0;
  61. usb_trans.rx_remaining = 0;
  62. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_INIT: %i %i\n"),
  63. rq->wValue.word, rq->wIndex.word);
  64. usb_trans.req_bank_size = (uint32_t) (1L << rq->wValue.word);
  65. usb_trans.req_bank_cnt = rq->wIndex.word;
  66. usb_trans.req_addr_end =
  67. (uint32_t) usb_trans.req_bank_size * usb_trans.req_bank_cnt;
  68. usb_trans.req_percent = 0;
  69. usb_trans.req_percent_last = 0;
  70. usb_trans.sync_errors = 0;
  71. debug_P(DEBUG_USB,
  72. PSTR
  73. ("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
  74. usb_trans.req_bank_size, usb_trans.req_bank_cnt,
  75. usb_trans.req_addr_end);
  76. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
  77. shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT,
  78. usb_trans.req_bank_cnt);
  79. #if DO_TIMER
  80. if (usb_trans.req_addr == 0x000000) {
  81. #ifndef NO_DEBUG
  82. timer_start();
  83. #endif
  84. }
  85. #endif
  86. /*
  87. * -------------------------------------------------------------------------
  88. */
  89. } else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
  90. usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
  91. usb_trans.req_addr = rq->wValue.word;
  92. usb_trans.req_addr = usb_trans.req_addr << 16;
  93. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  94. usb_trans.rx_remaining = rq->wLength.word;
  95. if (usb_trans.req_addr
  96. && usb_trans.req_addr % usb_trans.req_bank_size == 0) {
  97. #if DO_TIMER
  98. #ifndef NO_DEBUG
  99. #ifdef FLT_DEBUG
  100. debug_P(DEBUG_USB,
  101. PSTR
  102. ("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  103. usb_trans.req_bank, usb_trans.req_addr, timer_stop());
  104. #else
  105. debug_P(DEBUG_USB,
  106. PSTR
  107. ("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  108. usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
  109. #endif
  110. timer_start();
  111. #endif
  112. #endif
  113. usb_trans.req_bank++;
  114. } else {
  115. sram_bulk_write_start(usb_trans.req_addr);
  116. }
  117. ret_len = USB_MAX_TRANS;
  118. /*
  119. * -------------------------------------------------------------------------
  120. */
  121. } else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
  122. usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
  123. usb_trans.req_addr = rq->wValue.word;
  124. usb_trans.req_addr = usb_trans.req_addr << 16;
  125. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  126. usb_trans.rx_remaining = rq->wLength.word;
  127. #if DO_SHM
  128. usb_trans.req_percent =
  129. (uint32_t) (100 * usb_trans.req_addr) / usb_trans.req_addr_end;
  130. if (usb_trans.req_percent != usb_trans.req_percent_last) {
  131. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS,
  132. usb_trans.req_percent);
  133. }
  134. usb_trans.req_percent_last = usb_trans.req_percent;
  135. shared_memory_scratchpad_region_save_helper(usb_trans.req_addr);
  136. #endif
  137. if (usb_trans.req_addr
  138. && (usb_trans.req_addr % usb_trans.req_bank_size) == 0) {
  139. #if DO_TIMER
  140. #ifndef NO_DEBUG
  141. #ifdef FLT_DEBUG
  142. debug_P(DEBUG_USB,
  143. PSTR
  144. ("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  145. usb_trans.req_bank, usb_trans.req_addr, timer_stop());
  146. #else
  147. debug_P(DEBUG_USB,
  148. PSTR
  149. ("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  150. usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
  151. #endif
  152. timer_start();
  153. #endif
  154. #endif
  155. usb_trans.req_bank++;
  156. #if DO_SHM
  157. shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT,
  158. usb_trans.req_bank);
  159. #endif
  160. }
  161. ret_len = USB_MAX_TRANS;
  162. /*
  163. * -------------------------------------------------------------------------
  164. */
  165. } else if (rq->bRequest == USB_BULK_UPLOAD_END) {
  166. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_END:\n"));
  167. usb_trans.req_state = REQ_STATUS_IDLE;
  168. sram_bulk_write_end();
  169. #if DO_SHM
  170. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_END, 0);
  171. #endif
  172. ret_len = 0;
  173. /*
  174. * -------------------------------------------------------------------------
  175. */
  176. } else if (rq->bRequest == USB_CRC) {
  177. usb_trans.req_addr = rq->wValue.word;
  178. usb_trans.req_addr = usb_trans.req_addr << 16;
  179. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  180. debug_P(DEBUG_USB, PSTR("USB_CRC: addr=0x%08lx \n"),
  181. usb_trans.req_addr);
  182. crc_check_bulk_memory(0x000000, usb_trans.req_addr,
  183. usb_trans.req_bank_size);
  184. ret_len = 0;
  185. /*
  186. * -------------------------------------------------------------------------
  187. */
  188. } else if (rq->bRequest == USB_MODE_SNES) {
  189. usb_trans.req_state = REQ_STATUS_SNES;
  190. debug_P(DEBUG_USB, PSTR("USB_MODE_SNES:\n"));
  191. ret_len = 0;
  192. /*
  193. * -------------------------------------------------------------------------
  194. */
  195. } else if (rq->bRequest == USB_MODE_AVR) {
  196. usb_trans.req_state = REQ_STATUS_AVR;
  197. debug_P(DEBUG_USB, PSTR("USB_MODE_AVR:\n"));
  198. ret_len = 0;
  199. /*
  200. * -------------------------------------------------------------------------
  201. */
  202. } else if (rq->bRequest == USB_AVR_RESET) {
  203. debug_P(DEBUG_USB, PSTR("USB_AVR_RESET:\n"));
  204. soft_reset();
  205. ret_len = 0;
  206. /*
  207. * -------------------------------------------------------------------------
  208. */
  209. } else if (rq->bRequest == USB_SET_LAODER) {
  210. debug_P(DEBUG_USB, PSTR("USB_SET_LAODER:\n"));
  211. usb_trans.loader_enabled = rq->wValue.word;
  212. ret_len = 0;
  213. }
  214. usbMsgPtr = usb_trans.rx_buffer;
  215. return ret_len;
  216. }
  217. /*
  218. * -------------------------------------------------------------------------
  219. */
  220. void globals_init()
  221. {
  222. memset(&usb_trans, 0, sizeof(usb_transaction_t));
  223. usb_trans.req_addr = 0;
  224. usb_trans.req_addr_end = 0;
  225. usb_trans.req_state = REQ_STATUS_IDLE;
  226. usb_trans.rx_remaining = 0;
  227. usb_trans.tx_remaining = 0;
  228. usb_trans.sync_errors = 0;
  229. usb_trans.loader_enabled = 1;
  230. }
  231. int main(void)
  232. {
  233. #ifndef NO_DEBUG
  234. uart_init();
  235. stdout = &uart_stdout;
  236. banner();
  237. #endif
  238. shared_memory_init();
  239. system_init();
  240. sram_init();
  241. pwm_init();
  242. irq_init();
  243. boot_startup_rom(50);
  244. globals_init();
  245. pwm_stop();
  246. usbInit();
  247. usb_connect();
  248. sei();
  249. while (1) {
  250. system_set_bus_avr();
  251. system_set_wr_disable();
  252. while (usb_trans.req_state != REQ_STATUS_SNES) {
  253. usbPoll();
  254. #if DO_SHELL
  255. #ifndef NO_DEBUG
  256. shell_run();
  257. #endif
  258. #endif
  259. }
  260. #if DO_SHM
  261. shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
  262. #endif
  263. #if DO_SHM_SCRATCHPAD
  264. shared_memory_scratchpad_region_tx_restore();
  265. shared_memory_scratchpad_region_rx_restore();
  266. #endif
  267. #if DO_CRC_CHECK
  268. info_P(PSTR("-->CRC Check\n"));
  269. crc_check_bulk_memory(0x000000,
  270. usb_trans.req_bank_size * usb_trans.req_bank_cnt,
  271. usb_trans.req_bank_size);
  272. #endif
  273. system_set_rom_mode(&usb_trans);
  274. system_set_wr_disable();
  275. system_set_bus_snes();
  276. system_send_snes_reset();
  277. irq_stop();
  278. while ((usb_trans.req_state != REQ_STATUS_AVR)) {
  279. usbPoll();
  280. #if DO_SHELL
  281. #ifndef NO_DEBUG
  282. shell_run();
  283. #endif
  284. #endif
  285. }
  286. info_P(PSTR("-->Switch TO AVR\n"));
  287. shared_memory_init();
  288. irq_init();
  289. if (usb_trans.loader_enabled) {
  290. boot_startup_rom(50);
  291. } else {
  292. system_set_bus_avr();
  293. system_send_snes_reset();
  294. }
  295. globals_init();
  296. }
  297. return 0;
  298. }