main.c 4.0 KB

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  1. #define F_CPU 8000000
  2. #include <avr/io.h>
  3. #include <util/delay.h>
  4. #include <stdlib.h>
  5. #include "uart.h"
  6. #include "mmc.h"
  7. #include "fat.h"
  8. //SREG defines
  9. #define S_MOSI PB3
  10. #define S_MISO PB4
  11. #define S_SCK PB5
  12. #define S_LATCH PB2
  13. //DEBUG defines
  14. #define D_LED0 PC5
  15. //SRAM defines
  16. #define R_WR PB6
  17. #define R_RD PB7
  18. #define R_DATA PORTD
  19. #define R_DIR DDRD
  20. #define DEBUG_BUFFER_SIZE 128
  21. #define READ_BUFFER_SIZE 512
  22. uint8_t debug_buffer[DEBUG_BUFFER_SIZE];
  23. uint8_t read_buffer[READ_BUFFER_SIZE];
  24. void dprintf(const uint8_t * fmt, ...) {
  25. va_list args;
  26. va_start(args, fmt);
  27. vsprintf(debug_buffer, fmt, args);
  28. va_end(args);
  29. uart_puts(debug_buffer);
  30. }
  31. void dump_packet(uint32_t addr,uint32_t len,uint8_t *packet){
  32. uint16_t i,j;
  33. uint16_t sum =0;
  34. for (i=0;i<len;i+=16) {
  35. sum = 0;
  36. for (j=0;j<16;j++) {
  37. sum +=packet[i+j];
  38. }
  39. if (!sum)
  40. continue;
  41. dprintf("%08x:", addr + i);
  42. for (j=0;j<16;j++) {
  43. dprintf(" %02x", packet[i+j]);
  44. }
  45. dprintf(" |");
  46. for (j=0;j<16;j++) {
  47. if (packet[i+j]>=33 && packet[i+j]<=126 )
  48. dprintf("%c", packet[i+j]);
  49. else
  50. dprintf(".");
  51. }
  52. dprintf("|\n");
  53. }
  54. }
  55. void spi_init(void)
  56. {
  57. /* Set MOSI and SCK output, all others input */
  58. DDRB |= ((1<<S_MOSI) | (1<<S_SCK) | (1<<S_LATCH));
  59. DDRB &= ~(1<<S_MISO);
  60. PORTB |= (1<<S_MISO);
  61. /* Enable SPI, Master*/
  62. SPCR = ((1<<SPE) | (1<<MSTR));
  63. }
  64. void spi_master_transmit(unsigned char cData)
  65. {
  66. /* Start transmission */
  67. SPDR = cData;
  68. /* Wait for transmission complete */
  69. while(!(SPSR & (1<<SPIF)));
  70. }
  71. uint8_t sram_read(uint32_t addr)
  72. {
  73. uint8_t byte;
  74. DDRD=0x00;
  75. PORTD=0xff;
  76. PORTB |= (1<<R_RD);
  77. PORTB |= (1<<R_WR);
  78. spi_master_transmit((uint8_t)(addr>>16));
  79. spi_master_transmit((uint8_t)(addr>>8));
  80. spi_master_transmit((uint8_t)(addr>>0));
  81. PORTB |= (1<<S_LATCH);
  82. PORTB &= ~(1<<S_LATCH);
  83. PORTB &= ~(1<<R_RD);
  84. asm volatile ("nop");
  85. asm volatile ("nop");
  86. asm volatile ("nop");
  87. byte = PIND;
  88. PORTB |= (1<<R_RD);
  89. DDRD=0x00;
  90. PORTD=0x00;
  91. return byte;
  92. }
  93. void sram_write(uint32_t addr, uint8_t data)
  94. {
  95. DDRD=0xff;
  96. PORTB |= (1<<R_RD);
  97. PORTB |= (1<<R_WR);
  98. spi_master_transmit((uint8_t)(addr>>16));
  99. spi_master_transmit((uint8_t)(addr>>8));
  100. spi_master_transmit((uint8_t)(addr>>0));
  101. PORTB |= (1<<S_LATCH);
  102. PORTB &= ~(1<<S_LATCH);
  103. PORTB &= ~(1<<R_WR);
  104. PORTD=data;
  105. PORTB |= (1<<R_WR);
  106. DDRD=0x00;
  107. PORTD=0x00;
  108. }
  109. void sram_init(void){
  110. DDRD=0x00;
  111. PORTD=0x00;
  112. DDRB |= ((1<<R_WR) | (1<<R_RD));
  113. PORTB |= (1<<R_RD);
  114. PORTB |= (1<<R_WR);
  115. DDRC |= (1<<D_LED0);
  116. }
  117. void sram_clear(uint32_t addr, uint32_t len){
  118. uint32_t i;
  119. for (i=addr; i<(addr + len);i++ )
  120. sram_write(i, 0x00);
  121. }
  122. void sram_copy(uint32_t addr,uint8_t *src, uint32_t len){
  123. uint32_t i;
  124. uint8_t *ptr = src;
  125. for (i=addr; i<(addr + len);i++ )
  126. sram_write(addr, *ptr++);
  127. }
  128. void sram_read_buffer(uint32_t addr,uint8_t *dst, uint32_t len){
  129. uint32_t i;
  130. uint8_t *ptr = dst;
  131. for (i=addr; i<(addr + len);i++ ){
  132. *ptr = sram_read(addr);
  133. ptr++;
  134. }
  135. }
  136. int main(void)
  137. {
  138. uint16_t fat_cluster = 0;
  139. uint8_t fat_attrib = 0;
  140. uint32_t fat_size = 0;
  141. uint32_t rom_addr = 0;
  142. uart_init();
  143. sram_init();
  144. dprintf("sram_init\n");
  145. spi_init();
  146. dprintf("spi_init\n");
  147. sram_clear(0x000000, 0x400000);
  148. dprintf("sram_clear\n");
  149. while ( mmc_init() !=0) {
  150. dprintf("no sdcard..\n\r");
  151. }
  152. dprintf("mmc_init\n\r");
  153. fat_init(read_buffer);
  154. dprintf("fat_init\n\r");
  155. rom_addr = 0x000000;
  156. dprintf("look for sprite.smc\n\r");
  157. if (fat_search_file((uint8_t*)"sprite.smc",
  158. &fat_cluster,
  159. &fat_size,
  160. &fat_attrib,
  161. read_buffer) == 1) {
  162. for (uint16_t block_cnt=0; block_cnt<512; block_cnt++) {
  163. fat_read_file (fat_cluster,read_buffer,block_cnt);
  164. dprintf("Read Block %i addr 0x%06\n",block_cnt,rom_addr);
  165. sram_copy(rom_addr,read_buffer,512);
  166. rom_addr += 512;
  167. }
  168. }
  169. rom_addr = 0x000000;
  170. for (uint16_t block_cnt=0; block_cnt<512; block_cnt++) {
  171. sram_read_buffer(rom_addr,read_buffer,512);
  172. dump_packet(rom_addr,512,read_buffer);
  173. rom_addr += 512;
  174. }
  175. while(1);
  176. return(0);
  177. }