doctor64jr.c 16 KB

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  1. /*
  2. doctor64jr.c - Bung Doctor V64 Junior support for uCON64
  3. Copyright (c) 1999 - 2002 NoisyB <noisyb@gmx.net>
  4. Copyright (c) 2004 dbjh
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. /*
  18. drjr transfer protocol
  19. DB25 pin name
  20. p2~p9 pd[7:0] XXXXXXXXXXX ai XXXXX data XXXX
  21. p1 nwrite ~~~~~~~~~|_____________________|~~
  22. p14 ndstb ~~~~~~~~~~~~~~~~~~~~~~~~~|_|~~~~~~
  23. p17 nastb ~~~~~~~~~~~~~|_|~~~~~~~~~~~~~~~~~~
  24. ai[]=0 r/w a[7..0]
  25. ai[]=1 r/w a[15..8]
  26. ai[]=2 r/w a[23..16]
  27. ai[]=3 w a[28..24]
  28. ai[]=3 r (rst,wdf,wcf,a[28..24])
  29. ai[]=4 r/w data
  30. ai[]=5 w mode
  31. ai[]=6 w en_1
  32. ai[]=7 w en_0
  33. *remark
  34. a[8..1] support page count up
  35. ai[3]d7:0=N64 power off, 1=N64 power on
  36. d6:0=no dram data written, 1=dram data written
  37. d5:0=no data write in b4000000~b7ffffff, 1=some data written in b4000000~b7ffffff
  38. mode d0:0=dram read only and clear wdf, 1=dram write enable
  39. d1:0=disable cartridge read and clear wcf flag,
  40. 1=enable cartridge read(write b4000000~b7ffffff will switch off dram and cartridge will present at b0000000~b3ffffff)
  41. en_0=05 and en_1=0a is enable port control
  42. mode:q0 0 1 0 1
  43. mode:q1 0 0 1 1
  44. b7ff ffff
  45. b400 0000 dram read only dram r/w cartridge read cartridge read(* write this area will switch off dram)
  46. b3ff ffff
  47. b000 0000 dram read only dram r/w dram read only dram r/w
  48. eg:enable port control
  49. DB25 pin name
  50. p2~p9 pd[7:0] XXXXXXXXXXX 07 XX 05 XXXX 06 XX 0a XXXXXXXXXXXX
  51. p1 nwrite ~~~~~~~~~|_____________________________|~~~~~~~
  52. p14 ndstb ~~~~~~~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~
  53. p17 nastb ~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~~~~~~~
  54. en_0=05 en_1=0a
  55. eg:write adr $b0123456, data $a55a,$1234..
  56. DB25 pin name
  57. p2~p9 pd[7:0] XXXXXXXXXXX 00 XX 56 XXXX 01 XX 34 XXXX 02 XX 12 XXXX 03 XX b0 XXXXXX 04 XX 5a XX a5 XX 34 XX 12 XXXXXXXXXXX
  58. p1 nwrite ~~~~~~~~~|_______________________________________________________________________________________|~~~~~~~~~~
  59. p14 ndstb ~~~~~~~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~~|_|~~~|_|~~~|_|~~~|_|~~~~~~~~~~~
  60. p17 nastb ~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~~|_|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  61. set adr word low set adr word high wdata a55a wdata 1234 (after write adr=b012345a)
  62. eg:read adr $b0123400~$b01235ff, 512 data
  63. DB25 pin name
  64. p2~p9 pd[7:0] XXXXXXXXXXX 00 XX 00 XXXX 01 XX 34 XXXX 02 XX 12 XXXX 03 XX b0 XXXXXX 04 XX data0 XX data1 X ... X data510 XX data511 XXXXX
  65. p1 nwrite ~~~~~~~~~|________________________________________________________________~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  66. p14 ndstb ~~~~~~~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~~~|_|~~~~~~|_|~~~ ~~~ ~~~~|_|~~~~~~~~|_|~~~~~~~~
  67. p17 nastb ~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~~|_|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  68. set adr word low set adr word high (after 512 read adr=b0123400)
  69. eg:dram write protect, disable N64 access to cartridge and disable port control
  70. DB25 pin name
  71. p2~p9 pd[7:0] XXXXXXXXXXX 05 XX 00 XXXX 07 XX 00 XXXX 06 XX 00 XXXXXXXXXXXX
  72. p1 nwrite ~~~~~~~~~|________________________________________|~~~~~~~~~~
  73. p14 ndstb ~~~~~~~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~
  74. p17 nastb ~~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~|_|~~~~~~~~~~~~~~~~~~
  75. mode=00 en_0=00 en_1=00
  76. simple backup rountine for N64
  77. void writePI(unsigned long addr, unsigned long value)
  78. {
  79. do {} while (*(volatile unsigned long *) (0xa4600010) & 3); // check parallel interface not busy
  80. addr &=0xbffffffc;
  81. *(unsigned long *)(addr)=value;
  82. }
  83. unsigned long readPI(unsigned long addr)
  84. {
  85. do {} while (*(volatile unsigned long *) (0xa4600010) & 3); // check parallel interface not busy
  86. addr &=0xbffffffc;
  87. return *(unsigned long *)(addr);
  88. }
  89. // MAIN -- START OF USER CODE
  90. void mainproc(void *arg) {
  91. u32 base_adr;
  92. for (base_adr=0;base_adr<0x1000000;base_adr++){ // backup 128Mbits
  93. writePI(0xb0000000+base_adr,readPI(0xb4000000 + base_adr)); // write data
  94. }
  95. }
  96. */
  97. #ifdef HAVE_CONFIG_H
  98. #include "config.h"
  99. #endif
  100. #include <stdio.h>
  101. #include <stdlib.h>
  102. #include <string.h>
  103. #include <time.h>
  104. #include "misc/misc.h"
  105. #include "misc/itypes.h"
  106. #ifdef USE_ZLIB
  107. #include "misc/archive.h"
  108. #endif
  109. #include "misc/getopt2.h" // st_getopt2_t
  110. #include "misc/parallel.h"
  111. #include "misc/file.h"
  112. #include "ucon64.h"
  113. #include "ucon64_misc.h"
  114. #include "doctor64jr.h"
  115. const st_getopt2_t doctor64jr_usage[] =
  116. {
  117. {
  118. NULL, 0, 0, 0,
  119. NULL, "Doctor V64 Junior"/*"19XX Bung Enterprises Ltd http://www.bung.com.hk"*/,
  120. NULL
  121. },
  122. #ifdef USE_PARALLEL
  123. {
  124. "xdjr", 0, 0, UCON64_XDJR,
  125. NULL, "send ROM to Doctor V64 Junior; " OPTION_LONG_S "port=PORT",
  126. &ucon64_wf[WF_OBJ_N64_DEFAULT_STOP_NO_ROM]
  127. },
  128. #if 0
  129. {
  130. "xdjrs", 0, 0, UCON64_XDJRS,
  131. NULL, "send/receive SRAM to/from Doctor V64 Junior; " OPTION_LONG_S "port=PORT\n"
  132. "receives automatically when SRAM does not exist",
  133. &ucon64_wf[WF_OBJ_N64_DEFAULT_STOP_NO_ROM]
  134. },
  135. #endif
  136. #endif // USE_PARALLEL
  137. {NULL, 0, 0, 0, NULL, NULL, NULL}
  138. };
  139. #ifdef USE_PARALLEL
  140. #define BUFFERSIZE 32768
  141. //#define set_ai_write outportb (port_a, 5); // ninit=1, nwrite=0
  142. #define set_data_write outportb (port_a, 1); // ninit=0, nwrite=0
  143. #define set_data_read outportb (port_a, 0); // ninit=0, nwrite=1
  144. //#define set_normal outportb (port_a, 4); // ninit=1, nwrite=1
  145. static unsigned short int port_8, port_9, port_a, port_b, port_c,
  146. *buffer;
  147. static int wv_mode;
  148. static void
  149. set_ai (unsigned char ai)
  150. {
  151. outportb (port_a, 5); // ninit=1, nwrite=0
  152. outportb (port_b, ai);
  153. }
  154. static void
  155. set_ai_data (unsigned char ai, unsigned char data)
  156. {
  157. set_ai (ai);
  158. set_data_write // ninit=0, nwrite=0
  159. outportb (port_c, data);
  160. }
  161. static void
  162. init_port (int enable_write)
  163. {
  164. #ifndef USE_PPDEV
  165. outportb (port_9, 1); // clear EPP time flag
  166. #endif
  167. set_ai_data (6, 0x0a);
  168. set_ai_data (7, 0x05); // 6==0x0a, 7==0x05 is pc_control mode
  169. // set_ai (5);
  170. // set_data_read
  171. // enable_write = inportb (port_c);
  172. set_ai_data (5, (unsigned char) enable_write); // d0=0 is write protect mode
  173. }
  174. static void
  175. end_port (int enable_write)
  176. {
  177. set_ai_data (5, (unsigned char) enable_write); // d0=0 is write protect mode
  178. set_ai_data (7, 0); // release pc mode
  179. set_ai_data (6, 0); // 6==0x0a, 7==0x05 is pc_control mode
  180. outportb (port_a, 4); // ninit=1, nwrite=1
  181. }
  182. static int
  183. check_card (void)
  184. {
  185. set_ai_data (3, 0x12);
  186. set_ai_data (2, 0x34);
  187. set_ai_data (1, 0x56);
  188. set_ai_data (0, 0x78);
  189. set_ai (3);
  190. set_data_read // ninit=0, nwrite=1
  191. if ((inportb (port_c) & 0x1f) != 0x12)
  192. return 1;
  193. set_ai (2);
  194. set_data_read
  195. if (inportb (port_c) != 0x34)
  196. return 1;
  197. set_ai (1);
  198. set_data_read
  199. if (inportb (port_c) != 0x56)
  200. return 1;
  201. set_ai (0);
  202. set_data_read
  203. if (inportb (port_c) != 0x78)
  204. return 1;
  205. return 0;
  206. }
  207. static int
  208. write_32k (unsigned short int hi_word, unsigned short int lo_word)
  209. {
  210. unsigned char unpass, pass1;
  211. unsigned short int i, j, fix;
  212. set_ai_data (3, (unsigned char) (0x10 | (hi_word >> 8)));
  213. set_ai_data (2, (unsigned char) hi_word);
  214. for (i = 0; i < 0x40; i++)
  215. {
  216. unpass = 3;
  217. while (unpass)
  218. {
  219. set_ai_data (1, (unsigned char) ((i << 1) | lo_word));
  220. set_ai_data (0, 0);
  221. set_ai (4); // set address index=4
  222. set_data_write // ninit=0, nwrite=0
  223. fix = i << 8;
  224. for (j = 0; j < 256; j++)
  225. outportw (port_c, buffer[j + fix]);
  226. set_data_read // ninit=0, nwrite=1
  227. if (wv_mode)
  228. {
  229. for (j = 0; j < 256; j++)
  230. if (inportw (port_c) != buffer[j + fix])
  231. break;
  232. }
  233. else
  234. {
  235. pass1 = 1;
  236. for (j = 0; j < 4; j++)
  237. if (inportw (port_c) != buffer[j + fix])
  238. {
  239. pass1 = 0;
  240. break;
  241. }
  242. if (pass1)
  243. {
  244. set_ai_data (1, (unsigned char) ((i << 1) | lo_word | 1));
  245. set_ai_data (0, 0xf8);
  246. set_ai (4);
  247. set_data_read // ninit=0, nwrite=1
  248. for (j = 252; j < 256; j++)
  249. if (inportw (port_c) != buffer[j + fix])
  250. break;
  251. }
  252. }
  253. set_ai (0);
  254. set_data_read // ninit=0, nwrite=1
  255. if (inportb (port_c) != 0)
  256. {
  257. unpass--;
  258. outportb (port_a, 0x0b); // set all pin=0 for debug
  259. set_ai_data (3, (unsigned char) (0x10 | (hi_word >> 8)));
  260. set_ai_data (2, (unsigned char) hi_word);
  261. if (unpass == 0)
  262. return 1;
  263. }
  264. else
  265. unpass = 0;
  266. }
  267. }
  268. /*
  269. outportb (ai, 0);
  270. printf ("\na[7..0]=%02x\n", inportb (data));
  271. outportb (ai, 1);
  272. printf ("a[15..8]=%02x\n", inportb (data));
  273. */
  274. return 0;
  275. }
  276. #if 0 // not used
  277. static int
  278. verify_32k (unsigned short int hi_word, unsigned short int lo_word)
  279. {
  280. char unpass;
  281. unsigned short int i, j, fix;
  282. set_ai_data (3, (unsigned char) (0x10 | (hi_word >> 8)));
  283. set_ai_data (2, (unsigned char) hi_word);
  284. for (i = 0; i < 0x40; i++)
  285. {
  286. unpass = 3;
  287. while (unpass)
  288. {
  289. set_ai_data (1, (unsigned char) ((i << 1) | lo_word));
  290. set_ai_data (0, 0);
  291. set_ai (4);
  292. set_data_read // ninit=0, nwrite=1
  293. fix = i << 8;
  294. for (j = 0; j < 256; j++)
  295. {
  296. if (inportw (port_c) != buffer[j + fix])
  297. {
  298. outportb (port_a, 0x0b); // all pin=0 for debug
  299. set_ai_data (3, (unsigned char) (0x10 | (hi_word >> 8)));
  300. set_ai_data (2, (unsigned char) hi_word);
  301. unpass--;
  302. if (unpass == 0)
  303. return 1;
  304. else
  305. break;
  306. }
  307. }
  308. if (j == 256)
  309. break;
  310. }
  311. }
  312. /*
  313. outportb (ai,0);
  314. printf ("\na[7..0]=%02x\n", inportb (data));
  315. outportb (ai, 1);
  316. printf ("a[15..8]=%02x\n", inportb (data));
  317. */
  318. return 0;
  319. }
  320. static void
  321. gen_pat_32k (unsigned short int offset)
  322. {
  323. int i;
  324. for (i = 0; i < 0x4000; i++)
  325. buffer[i] = i + offset;
  326. }
  327. static unsigned short int
  328. test_dram (void)
  329. {
  330. int n_pages = 0, page;
  331. gen_pat_32k (0x0000);
  332. write_32k (0, 0);
  333. gen_pat_32k (0x8000);
  334. write_32k (0x100, 0);
  335. gen_pat_32k (0x0000);
  336. if (verify_32k (0, 0) == 0) // find lower 128 Mbits
  337. n_pages = 0x100;
  338. gen_pat_32k (0x8000);
  339. if (verify_32k (0x100, 0) == 0) // find upper 128 Mbits
  340. n_pages = 0x200;
  341. printf ("Testing DRAM...\n");
  342. for (page = 0; page < n_pages; page++)
  343. {
  344. gen_pat_32k ((unsigned short int) (page * 2));
  345. if (write_32k (page, 0))
  346. return 0;
  347. else
  348. {
  349. fputc ('w', stdout);
  350. fflush (stdout);
  351. }
  352. gen_pat_32k ((unsigned short int) (page * 2 + 1));
  353. if (write_32k (page, 0x80))
  354. return 0;
  355. else
  356. {
  357. fputc ('w', stdout);
  358. fflush (stdout);
  359. }
  360. }
  361. fputc ('\n', stdout);
  362. for (page = 0; page < n_pages; page++)
  363. {
  364. gen_pat_32k ((unsigned short int) (page * 2));
  365. if (verify_32k (page, 0))
  366. return 0;
  367. else
  368. {
  369. fputc ('v', stdout);
  370. fflush (stdout);
  371. }
  372. gen_pat_32k ((unsigned short int) (page * 2 + 1));
  373. if (verify_32k (page, 0x80))
  374. return 0;
  375. else
  376. {
  377. fputc ('v', stdout);
  378. fflush (stdout);
  379. }
  380. }
  381. return n_pages;
  382. }
  383. #endif
  384. static unsigned long int
  385. get_address (void)
  386. {
  387. unsigned long int address;
  388. set_ai_data (6, 0x0a); // enable pc mode
  389. set_ai_data (7, 0x05); // enable pc mode
  390. set_ai (3);
  391. set_data_read // ninit=0, nwrite=1
  392. address = inportb (port_c) << 24;
  393. set_ai (2);
  394. set_data_read
  395. address |= inportb (port_c) << 16;
  396. set_ai (1);
  397. set_data_read
  398. address |= inportb (port_c) << 8;
  399. set_ai (0);
  400. set_data_read
  401. address |= inportb (port_c);
  402. return address;
  403. }
  404. int
  405. doctor64jr_read (const char *filename, unsigned int parport)
  406. {
  407. (void) filename;
  408. (void) parport;
  409. return fprintf (stderr, "ERROR: The function for dumping a cartridge is not yet implemented for the\n"
  410. " Doctor V64 Junior\n");
  411. }
  412. int
  413. doctor64jr_write (const char *filename, unsigned int parport)
  414. {
  415. unsigned int enable_write = 0, init_time, size, bytesread, bytessend = 0,
  416. n_pages;
  417. unsigned short int page;
  418. FILE *file;
  419. parport_print_info ();
  420. port_8 = parport;
  421. port_9 = parport + 1;
  422. port_a = parport + 2;
  423. port_b = parport + 3;
  424. port_c = parport + 4;
  425. init_port (enable_write);
  426. if (check_card () != 0)
  427. {
  428. fprintf (stderr, "ERROR: No Doctor V64 Junior card present\n");
  429. end_port (enable_write);
  430. exit (1);
  431. }
  432. wv_mode = 0;
  433. if ((file = fopen (filename, "rb")) == NULL)
  434. {
  435. fprintf (stderr, ucon64_msg[OPEN_READ_ERROR], filename);
  436. exit (1);
  437. }
  438. if ((buffer = (unsigned short int *) malloc (BUFFERSIZE)) == NULL)
  439. {
  440. fprintf (stderr, ucon64_msg[FILE_BUFFER_ERROR], BUFFERSIZE);
  441. exit (1);
  442. }
  443. size = fsizeof (filename);
  444. printf ("Send: %d Bytes (%.4f Mb)\n\n", size, (float) size / MBIT);
  445. #if 0
  446. if (dram_test)
  447. {
  448. dram_size = test_dram ();
  449. if (dram_size)
  450. printf ("\nDRAM size=%dMbits\n", (dram_size / 2));
  451. else
  452. fprintf (stderr, "\nERROR: DRAM test failed\n");
  453. return 0;
  454. }
  455. #endif
  456. n_pages = (size + (64 * 1024 - 1)) / (64 * 1024); // "+ (64 * 1024 - 1)" to round up
  457. init_time = time (0);
  458. for (page = 0; page < n_pages; page++)
  459. {
  460. bytesread = fread ((unsigned char *) buffer, 1, BUFFERSIZE, file);
  461. if (write_32k (page, 0))
  462. {
  463. fprintf (stderr, "ERROR: Transfer failed at address 0x%8lx", get_address ());
  464. break;
  465. }
  466. bytesread += fread ((unsigned char *) buffer, 1, BUFFERSIZE, file);
  467. if (write_32k (page, 0x80))
  468. {
  469. fprintf (stderr, "ERROR: Transfer failed at address 0x%8lx", get_address ());
  470. break;
  471. }
  472. bytessend += bytesread;
  473. ucon64_gauge (init_time, bytessend, size);
  474. }
  475. fputc ('\n', stdout);
  476. if (enable_write) // 1 or 3
  477. printf ("DRAM write protect disabled\n");
  478. if (enable_write & 2) // 3
  479. printf ("Run cartridge enabled\n");
  480. // set_ai_data(5, enable_write); // d0=0 is write protect mode
  481. end_port (enable_write);
  482. return 0;
  483. }
  484. #endif // USE_PARALLEL