main.c 10 KB

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  1. #include <avr/io.h>
  2. #include <avr/interrupt.h> /* for sei() */
  3. #include <util/delay.h> /* for _delay_ms() */
  4. #include <stdlib.h>
  5. #include <avr/pgmspace.h> /* required by usbdrv.h */
  6. #include "usbdrv.h"
  7. #include "oddebug.h" /* This is also an example for using debug
  8. * macros */
  9. #include "config.h"
  10. #include "requests.h" /* The custom request numbers we use */
  11. #include "uart.h"
  12. #include "sram.h"
  13. #include "debug.h"
  14. #include "dump.h"
  15. #include "crc.h"
  16. #include "usb_bulk.h"
  17. #include "timer.h"
  18. extern FILE uart_stdout;
  19. uint8_t debug_level = ( DEBUG | DEBUG_USB | DEBUG_CRC );
  20. uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
  21. uint32_t req_addr = 0;
  22. uint32_t req_addr_end = 0;
  23. uint32_t req_size;
  24. uint8_t req_bank;
  25. uint16_t req_bank_size;
  26. uint16_t req_bank_cnt;
  27. uint8_t req_state = REQ_STATUS_IDLE;
  28. uint8_t rx_remaining = 0;
  29. uint8_t tx_remaining = 0;
  30. uint16_t sync_errors = 0;
  31. uint8_t tx_buffer[32];
  32. uint8_t data_buffer[4];
  33. uint32_t addr;
  34. uint16_t crc = 0;
  35. usbMsgLen_t usbFunctionSetup(uchar data[8])
  36. {
  37. usbRequest_t *rq = (void *) data;
  38. uint8_t ret_len = 0;
  39. /*
  40. * -------------------------------------------------------------------------
  41. */
  42. if (rq->bRequest == USB_UPLOAD_INIT) {
  43. if (req_state != REQ_STATUS_IDLE){
  44. debug(DEBUG_USB,"USB_UPLOAD_INIT: ERROR state is not REQ_STATUS_IDLE\n");
  45. return 0;
  46. }
  47. req_bank = 0;
  48. rx_remaining = 0;
  49. req_bank_size = 1 << rq->wValue.word;
  50. sync_errors = 0;
  51. crc = 0;
  52. debug(DEBUG_USB,"USB_UPLOAD_INIT: bank_size=0x%04x\n", req_bank_size);
  53. /*
  54. * -------------------------------------------------------------------------
  55. */
  56. } else if (rq->bRequest == USB_UPLOAD_ADDR) {
  57. req_state = REQ_STATUS_UPLOAD;
  58. req_addr = rq->wValue.word;
  59. req_addr = req_addr << 16;
  60. req_addr = req_addr | rq->wIndex.word;
  61. if (rx_remaining) {
  62. sync_errors++;
  63. debug
  64. (DEBUG_USB,"USB_UPLOAD_ADDR: Out of sync addr=0x%lx remain=%i packet=%i sync_error=%i\n",
  65. req_addr, rx_remaining, rq->wLength.word, sync_errors);
  66. ret_len = 0;
  67. }
  68. rx_remaining = rq->wLength.word;
  69. ret_len = USB_MAX_TRANS;
  70. if (req_addr && (req_addr % 0x1000) == 0) {
  71. debug(DEBUG_USB,"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx crc=%04x\n",
  72. req_bank, req_addr,crc_check_bulk_memory(req_addr - 0x1000,req_addr));
  73. }
  74. if (req_addr && req_addr % req_bank_size == 0) {
  75. debug(DEBUG_USB,"USB_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx\n",
  76. req_bank, req_addr);
  77. req_bank++;
  78. }
  79. ret_len = USB_MAX_TRANS;
  80. /*
  81. * -------------------------------------------------------------------------
  82. */
  83. } else if (rq->bRequest == USB_DOWNLOAD_INIT) {
  84. debug(DEBUG_USB,"USB_DOWNLOAD_INIT\n");
  85. /*
  86. * -------------------------------------------------------------------------
  87. */
  88. } else if (rq->bRequest == USB_DOWNLOAD_ADDR) {
  89. debug(DEBUG_USB,"USB_DOWNLOAD_ADDR\n");
  90. /*
  91. * -------------------------------------------------------------------------
  92. */
  93. } else if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
  94. req_bank = 0;
  95. rx_remaining = 0;
  96. req_bank_size = (1 << rq->wValue.word) & 0xffff;
  97. req_bank_cnt = rq->wIndex.word;
  98. req_addr_end = (uint32_t)req_bank_size * req_bank_cnt;
  99. sync_errors = 0;
  100. debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: bank_size=0x%x bank_cnt=0x%x end_addr=0x%08lx\n",
  101. req_bank_size, req_bank_cnt, req_addr_end);
  102. if (req_addr == 0x000000){
  103. timer_start();
  104. }
  105. /*
  106. * -------------------------------------------------------------------------
  107. */
  108. } else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
  109. req_state = REQ_STATUS_BULK_UPLOAD;
  110. req_addr = rq->wValue.word;
  111. req_addr = req_addr << 16;
  112. req_addr = req_addr | rq->wIndex.word;
  113. sram_bulk_write_start(req_addr);
  114. rx_remaining = rq->wLength.word;
  115. if (req_addr && req_addr % req_bank_size == 0) {
  116. debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n",
  117. req_bank, req_addr,timer_stop());
  118. req_bank++;
  119. timer_start();
  120. }
  121. ret_len = USB_MAX_TRANS;
  122. /*
  123. * -------------------------------------------------------------------------
  124. */
  125. } else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
  126. req_state = REQ_STATUS_BULK_UPLOAD;
  127. req_addr = rq->wValue.word;
  128. req_addr = req_addr << 16;
  129. req_addr = req_addr | rq->wIndex.word;
  130. rx_remaining = rq->wLength.word;
  131. #if 0
  132. if (req_addr && (req_addr % 0x1000) == 0) {
  133. debug(DEBUG_USB,"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx crc=%04x\n",
  134. req_bank, req_addr,crc_check_bulk_memory(req_addr - 0x1000,req_addr));
  135. }
  136. #endif
  137. sram_bulk_write_start(req_addr);
  138. if (req_addr && req_addr % req_bank_size == 0) {
  139. debug(DEBUG_USB,"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr= 0x%08lx time=%.4f\n",
  140. req_bank, req_addr,timer_stop());
  141. req_bank++;
  142. timer_start();
  143. }
  144. ret_len = USB_MAX_TRANS;
  145. /*
  146. * -------------------------------------------------------------------------
  147. */
  148. } else if (rq->bRequest == USB_BULK_UPLOAD_END) {
  149. if (req_state != REQ_STATUS_BULK_UPLOAD){
  150. debug(DEBUG_USB,"USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n");
  151. return 0;
  152. }
  153. debug(DEBUG_USB,"USB_BULK_UPLOAD_END:\n");
  154. req_state = REQ_STATUS_IDLE;
  155. sram_bulk_write_end();
  156. ret_len = 0;
  157. /*
  158. * -------------------------------------------------------------------------
  159. */
  160. } else if (rq->bRequest == USB_CRC) {
  161. req_addr = rq->wValue.word;
  162. req_addr = req_addr << 16;
  163. req_addr = req_addr | rq->wIndex.word;
  164. debug(DEBUG_USB,"USB_CRC: addr=0x%08lx \n", req_addr);
  165. crc_check_bulk_memory(0x000000,req_addr);
  166. ret_len = 0;
  167. /*
  168. * -------------------------------------------------------------------------
  169. */
  170. } else if (rq->bRequest == USB_SNES_BOOT) {
  171. req_state = REQ_STATUS_BOOT;
  172. debug(DEBUG_USB,"USB_SNES_BOOT:\n");
  173. ret_len = 0;
  174. /*
  175. * -------------------------------------------------------------------------
  176. */
  177. } else if (rq->bRequest == USB_CRC_ADDR) {
  178. req_state = REQ_STATUS_CRC;
  179. req_addr = rq->wValue.word;
  180. req_addr = req_addr << 16;
  181. req_addr = req_addr | rq->wIndex.word;
  182. debug(DEBUG_USB,"USB_CRC_ADDR: addr=0x%lx size=%i\n", req_addr,
  183. rq->wLength.word);
  184. req_size = rq->wLength.word;
  185. req_size = req_size << 2;
  186. tx_remaining = 2;
  187. debug(DEBUG_USB,"USB_CRC_ADDR: addr=0x%lx size=%li\n", req_addr, req_size);
  188. crc = crc_check_memory_range(req_addr,req_size,read_buffer);
  189. tx_buffer[0] = crc & 0xff;
  190. tx_buffer[1] = (crc >> 8) & 0xff;
  191. ret_len = 2;
  192. req_state = REQ_STATUS_IDLE;
  193. }
  194. usbMsgPtr = data_buffer;
  195. return ret_len; /* default for not implemented requests: return
  196. * no data back to host */
  197. }
  198. /*
  199. * -------------------------------------------------------------------------
  200. */
  201. void test_read_write(){
  202. uint8_t i;
  203. uint32_t addr;
  204. avr_bus_active();
  205. addr = 0x000000;
  206. i = 1;
  207. while (addr++ <= 0x0000ff){
  208. sram_write(addr,i++);
  209. }
  210. addr = 0x000000;
  211. while (addr++ <= 0x0000ff){
  212. printf("read addr=0x%08lx %x\n",addr,sram_read(addr));
  213. }
  214. }
  215. void test_bulk_read_write(){
  216. uint8_t i;
  217. uint32_t addr;
  218. avr_bus_active();
  219. addr = 0x000000;
  220. i = 0;
  221. sram_bulk_write_start(addr);
  222. while (addr++ <= 0x8000){
  223. sram_bulk_write(i++);
  224. sram_bulk_write_next();
  225. }
  226. sram_bulk_write_end();
  227. addr = 0x000000;
  228. sram_bulk_read_start(addr);
  229. while (addr <= 0x8000){
  230. printf("addr=0x%08lx %x\n",addr,sram_bulk_read());
  231. sram_bulk_read_next();
  232. addr++;
  233. }
  234. sram_bulk_read_end();
  235. }
  236. void test_non_zero_memory(uint32_t bottom_addr,uint32_t top_addr)
  237. {
  238. uint32_t addr = 0;
  239. uint8_t c;
  240. sram_bulk_read_start(bottom_addr);
  241. for (addr = bottom_addr; addr < top_addr; addr++) {
  242. c = sram_bulk_read();
  243. if (c!=0xff)
  244. printf("addr=0x%08lx c=0x%x\n",addr,c);
  245. sram_bulk_read_next();
  246. }
  247. sram_bulk_read_end();
  248. }
  249. void test_crc(){
  250. printf("test_crc: clear\n");
  251. avr_bus_active();
  252. sram_bulk_set(0x000000,0x10000,0xff);
  253. printf("test_crc: crc\n");
  254. crc_check_bulk_memory(0x000000,0x10000);
  255. printf("test_crc: check\n");
  256. test_non_zero_memory(0x000000,0x10000);
  257. }
  258. int main(void)
  259. {
  260. uint8_t i;
  261. uart_init();
  262. stdout = &uart_stdout;
  263. system_init();
  264. printf("Sytem Init\n");
  265. //test_read_write();
  266. //test_bulk_read_write();
  267. //test_crc();
  268. //while(1);
  269. usbInit();
  270. printf("USB Init\n");
  271. usbDeviceDisconnect(); /* enforce re-enumeration, do this while
  272. * interrupts are disabled! */
  273. cli();
  274. printf("USB disconnect\n");
  275. i = 10;
  276. while (--i) { /* fake USB disconnect for > 250 ms */
  277. led_on();
  278. _delay_ms(35);
  279. led_off();
  280. _delay_ms(65);
  281. }
  282. led_on();
  283. usbDeviceConnect();
  284. printf("USB connect\n");
  285. avr_bus_active();
  286. printf("Activate AVR bus\n");
  287. printf("IRQ off\n");
  288. snes_irq_lo();
  289. snes_irq_off();
  290. printf("Set Snes lowrom\n");
  291. snes_lorom();
  292. printf("Disable snes WR\n");
  293. snes_wr_disable();
  294. sei();
  295. printf("USB poll\n");
  296. while (req_state != REQ_STATUS_BOOT){
  297. usbPoll();
  298. }
  299. printf("USB poll done\n");
  300. usbDeviceDisconnect();
  301. printf("USB disconnect\n");
  302. crc_check_bulk_memory(0x000000, req_addr_end);
  303. dump_memory(0x7f00,0x8000);
  304. snes_irq_lo();
  305. snes_irq_off();
  306. printf("IRQ off\n");
  307. snes_lorom();
  308. printf("Set Snes lowrom\n");
  309. snes_wr_disable();
  310. printf("Disable snes WR\n");
  311. snes_bus_active();
  312. printf("Activate Snes bus\n");
  313. while(1);
  314. return 0;
  315. }