main.c 4.7 KB

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  1. #include <avr/io.h>
  2. #include <util/delay.h>
  3. #include <stdlib.h>
  4. #include "uart.h"
  5. #include "mmc.h"
  6. #include "fat.h"
  7. //SREG defines
  8. #define S_MOSI PB5
  9. #define S_MISO PB6
  10. #define S_SCK PB7
  11. #define S_LATCH PB4
  12. //DEBUG defines
  13. #define D_LED0 PD6
  14. //SRAM defines
  15. #define R_WR PB1
  16. #define R_RD PB0
  17. #define RAM_PORT PORTA
  18. #define RAM_DIR DDRA
  19. #define RAM_REG PINA
  20. #define CTRL_PORT PORTB
  21. #define CTR_DIR DDRB
  22. #define LATCH_PORT PORTB
  23. #define LATCH_DIR DDRB
  24. #define SPI_PORT PORTB
  25. #define SPI_DIR DDRB
  26. #define LED_PORT PORTD
  27. #define LED_DIR DDRD
  28. #define READ_BUFFER_SIZE 512
  29. #define BLOCKS 510
  30. #define debug(x, fmt) printf("%s:%u: %s=" fmt, __FILE__, __LINE__, #x, x)
  31. extern FILE uart_stdout;
  32. uint8_t read_buffer[READ_BUFFER_SIZE];
  33. void dump_packet(uint32_t addr,uint32_t len,uint8_t *packet){
  34. uint16_t i,j;
  35. uint16_t sum =0;
  36. for (i=0;i<len;i+=16) {
  37. sum = 0;
  38. for (j=0;j<16;j++) {
  39. sum +=packet[i+j];
  40. }
  41. if (!sum){
  42. //printf(".");
  43. continue;
  44. }
  45. printf("%08lx:", addr + i);
  46. for (j=0;j<16;j++) {
  47. printf(" %02x", packet[i+j]);
  48. }
  49. printf(" |");
  50. for (j=0;j<16;j++) {
  51. if (packet[i+j]>=33 && packet[i+j]<=126 )
  52. printf("%c", packet[i+j]);
  53. else
  54. printf(".");
  55. }
  56. printf("|\n");
  57. }
  58. }
  59. void spi_init(void)
  60. {
  61. /* Set MOSI and SCK output, all others input */
  62. SPI_DIR |= ((1<<S_MOSI) | (1<<S_SCK) | (1<<S_LATCH));
  63. SPI_DIR &= ~(1<<S_MISO);
  64. SPI_PORT |= (1<<S_MISO);
  65. /* Enable SPI, Master*/
  66. SPCR = ((1<<SPE) | (1<<MSTR));
  67. }
  68. void spi_master_transmit(unsigned char cData)
  69. {
  70. /* Start transmission */
  71. SPDR = cData;
  72. /* Wait for transmission complete */
  73. while(!(SPSR & (1<<SPIF)));
  74. }
  75. uint8_t sram_read(uint32_t addr)
  76. {
  77. uint8_t byte;
  78. RAM_DIR = 0x00;
  79. RAM_PORT = 0xff;
  80. CTRL_PORT |= (1<<R_RD);
  81. CTRL_PORT |= (1<<R_WR);
  82. spi_master_transmit((uint8_t)(addr>>16));
  83. spi_master_transmit((uint8_t)(addr>>8));
  84. spi_master_transmit((uint8_t)(addr>>0));
  85. LATCH_PORT |= (1<<S_LATCH);
  86. LATCH_PORT &= ~(1<<S_LATCH);
  87. CTRL_PORT &= ~(1<<R_RD);
  88. asm volatile ("nop");
  89. asm volatile ("nop");
  90. asm volatile ("nop");
  91. asm volatile ("nop");
  92. asm volatile ("nop");
  93. asm volatile ("nop");
  94. asm volatile ("nop");
  95. asm volatile ("nop");
  96. byte = RAM_REG;
  97. CTRL_PORT |= (1<<R_RD);
  98. RAM_DIR =0x00;
  99. RAM_PORT =0x00;
  100. return byte;
  101. }
  102. void sram_write(uint32_t addr, uint8_t data)
  103. {
  104. RAM_DIR = 0xff;
  105. CTRL_PORT |= (1<<R_RD);
  106. CTRL_PORT |= (1<<R_WR);
  107. spi_master_transmit((uint8_t)(addr>>16));
  108. spi_master_transmit((uint8_t)(addr>>8));
  109. spi_master_transmit((uint8_t)(addr>>0));
  110. LATCH_PORT |= (1<<S_LATCH);
  111. LATCH_PORT &= ~(1<<S_LATCH);
  112. CTRL_PORT &= ~(1<<R_WR);
  113. RAM_PORT = data;
  114. CTRL_PORT |= (1<<R_WR);
  115. RAM_DIR = 0x00;
  116. RAM_PORT = 0x00;
  117. }
  118. void sram_init(void){
  119. RAM_DIR = 0x00;
  120. RAM_PORT = 0x00;
  121. CTR_DIR |= ((1<<R_WR) | (1<<R_RD));
  122. CTRL_PORT |= (1<<R_RD);
  123. CTRL_PORT |= (1<<R_WR);
  124. LED_PORT |= (1<<D_LED0);
  125. }
  126. void sram_clear(uint32_t addr, uint32_t len){
  127. uint32_t i;
  128. for (i=addr; i<(addr + len);i++ )
  129. sram_write(i, 0x00);
  130. }
  131. void sram_copy(uint32_t addr,uint8_t *src, uint32_t len){
  132. uint32_t i;
  133. uint8_t *ptr = src;
  134. for (i=addr; i<(addr + len);i++ )
  135. sram_write(i, *ptr++);
  136. }
  137. void sram_read_buffer(uint32_t addr,uint8_t *dst, uint32_t len){
  138. uint32_t i;
  139. uint8_t *ptr = dst;
  140. for (i=addr; i<(addr + len);i++ ){
  141. *ptr = sram_read(i);
  142. ptr++;
  143. }
  144. }
  145. int main(void)
  146. {
  147. uint16_t fat_cluster = 0;
  148. uint8_t fat_attrib = 0;
  149. uint32_t fat_size = 0;
  150. uint32_t rom_addr = 0;
  151. uart_init();
  152. stdout = &uart_stdout;
  153. sram_init();
  154. printf("sram_init\n");
  155. spi_init();
  156. printf("spi_init\n");
  157. /*
  158. sram_clear(0x000000, 0x400000);
  159. printf("sram_clear\n");
  160. */
  161. //printf("read 0x0f0f\n");
  162. //sram_read(0x0f0f);
  163. //printf("write 0x0f0f\n");
  164. //sram_write(0x0f0f,0xaa);
  165. //while(1);
  166. while ( mmc_init() !=0) {
  167. printf("no sdcard..\n");
  168. }
  169. printf("mmc_init\n");
  170. fat_init(read_buffer);
  171. printf("fat_init\n");
  172. rom_addr = 0x000000;
  173. printf("look for sprite.smc\n");
  174. if (fat_search_file((uint8_t*)"sprite.smc",
  175. &fat_cluster,
  176. &fat_size,
  177. &fat_attrib,
  178. read_buffer) == 1) {
  179. for (uint16_t block_cnt=0; block_cnt<BLOCKS+1; block_cnt++) {
  180. fat_read_file (fat_cluster,read_buffer,block_cnt);
  181. if (block_cnt==0){
  182. // Skip Copier Header
  183. printf("Copier Header \n",block_cnt,rom_addr);
  184. dump_packet(rom_addr,512,read_buffer);
  185. printf("Read Blocks ");
  186. }
  187. printf(".",block_cnt,rom_addr);
  188. sram_copy(rom_addr,read_buffer,512);
  189. rom_addr += 512;
  190. }
  191. printf("\nDone %lx\n",rom_addr);
  192. }
  193. rom_addr = 0x000000;
  194. for (uint16_t block_cnt=0; block_cnt<BLOCKS; block_cnt++) {
  195. sram_read_buffer(rom_addr,read_buffer,512);
  196. dump_packet(rom_addr,512,read_buffer);
  197. rom_addr += 512;
  198. }
  199. printf("Done\n",rom_addr);
  200. while(1);
  201. return(0);
  202. }