main.c 9.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324
  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #include <avr/io.h>
  21. #include <avr/interrupt.h>
  22. #include <util/delay.h>
  23. #include <stdlib.h>
  24. #include <avr/pgmspace.h>
  25. #include <avr/eeprom.h>
  26. #include <string.h>
  27. #include "usbdrv.h"
  28. #include "oddebug.h"
  29. #include "config.h"
  30. #include "requests.h"
  31. #include "uart.h"
  32. #include "sram.h"
  33. #include "debug.h"
  34. #include "info.h"
  35. #include "dump.h"
  36. #include "crc.h"
  37. #include "usb_bulk.h"
  38. #include "timer.h"
  39. #include "watchdog.h"
  40. #include "rle.h"
  41. #include "loader.h"
  42. #include "command.h"
  43. #include "shared_memory.h"
  44. #include "irq.h"
  45. #include "pwm.h"
  46. #include "testing.h"
  47. #include "shell.h"
  48. #include "system.h"
  49. #ifndef NO_DEBUG
  50. extern FILE uart_stdout;
  51. #endif
  52. extern system_t system;
  53. uint8_t debug_level = (DEBUG | DEBUG_CRC);
  54. usb_transaction_t usb_trans;
  55. usbMsgLen_t usbFunctionSetup(uchar data[8])
  56. {
  57. usbRequest_t *rq = (void *) data;
  58. uint8_t ret_len = 0;
  59. if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
  60. usb_trans.req_bank = 0;
  61. usb_trans.rx_remaining = 0;
  62. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_INIT: %i %i\n"), rq->wValue.word,
  63. rq->wIndex.word);
  64. usb_trans.req_bank_size = (uint32_t) (1L << rq->wValue.word);
  65. usb_trans.req_bank_cnt = rq->wIndex.word;
  66. usb_trans.req_addr_end = (uint32_t) usb_trans.req_bank_size * usb_trans.req_bank_cnt;
  67. usb_trans.req_percent = 0;
  68. usb_trans.req_percent_last = 0;
  69. usb_trans.sync_errors = 0;
  70. debug_P(DEBUG_USB,
  71. PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
  72. usb_trans.req_bank_size, usb_trans.req_bank_cnt, usb_trans.req_addr_end);
  73. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
  74. shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, usb_trans.req_bank_cnt);
  75. #if DO_TIMER
  76. if (usb_trans.req_addr == 0x000000) {
  77. #ifndef NO_DEBUG
  78. timer_start();
  79. #endif
  80. }
  81. #endif
  82. /*
  83. * -------------------------------------------------------------------------
  84. */
  85. } else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
  86. usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
  87. usb_trans.req_addr = rq->wValue.word;
  88. usb_trans.req_addr = usb_trans.req_addr << 16;
  89. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  90. usb_trans.rx_remaining = rq->wLength.word;
  91. if (usb_trans.req_addr && usb_trans.req_addr % usb_trans.req_bank_size == 0) {
  92. #if DO_TIMER
  93. #ifndef NO_DEBUG
  94. #ifdef FLT_DEBUG
  95. debug_P(DEBUG_USB,
  96. PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  97. usb_trans.req_bank, usb_trans.req_addr, timer_stop());
  98. #else
  99. debug_P(DEBUG_USB,
  100. PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  101. usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
  102. #endif
  103. timer_start();
  104. #endif
  105. #endif
  106. usb_trans.req_bank++;
  107. } else {
  108. sram_bulk_write_start(usb_trans.req_addr);
  109. }
  110. ret_len = USB_MAX_TRANS;
  111. /*
  112. * -------------------------------------------------------------------------
  113. */
  114. } else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
  115. usb_trans.req_state = REQ_STATUS_BULK_UPLOAD;
  116. usb_trans.req_addr = rq->wValue.word;
  117. usb_trans.req_addr = usb_trans.req_addr << 16;
  118. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  119. usb_trans.rx_remaining = rq->wLength.word;
  120. #if DO_SHM
  121. usb_trans.req_percent = (uint32_t)( 100 * usb_trans.req_addr ) / usb_trans.req_addr_end;
  122. if (usb_trans.req_percent!=usb_trans.req_percent_last){
  123. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, usb_trans.req_percent);
  124. }
  125. usb_trans.req_percent_last = usb_trans.req_percent;
  126. shared_memory_scratchpad_region_save_helper(usb_trans.req_addr);
  127. #endif
  128. if (usb_trans.req_addr && (usb_trans.req_addr % usb_trans.req_bank_size) == 0) {
  129. #if DO_TIMER
  130. #ifndef NO_DEBUG
  131. #ifdef FLT_DEBUG
  132. debug_P(DEBUG_USB,
  133. PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  134. usb_trans.req_bank, usb_trans.req_addr, timer_stop());
  135. #else
  136. debug_P(DEBUG_USB,
  137. PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  138. usb_trans.req_bank, usb_trans.req_addr, timer_stop_int());
  139. #endif
  140. timer_start();
  141. #endif
  142. #endif
  143. usb_trans.req_bank++;
  144. #if DO_SHM
  145. shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, usb_trans.req_bank);
  146. #endif
  147. }
  148. ret_len = USB_MAX_TRANS;
  149. /*
  150. * -------------------------------------------------------------------------
  151. */
  152. } else if (rq->bRequest == USB_BULK_UPLOAD_END) {
  153. if (usb_trans.req_state != REQ_STATUS_BULK_UPLOAD) {
  154. debug_P(DEBUG_USB,
  155. PSTR("USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n"));
  156. return 0;
  157. }
  158. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_END:\n"));
  159. usb_trans.req_state = REQ_STATUS_IDLE;
  160. sram_bulk_write_end();
  161. #if DO_SHM
  162. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_END, 0);
  163. #endif
  164. ret_len = 0;
  165. /*
  166. * -------------------------------------------------------------------------
  167. */
  168. } else if (rq->bRequest == USB_CRC) {
  169. usb_trans.req_addr = rq->wValue.word;
  170. usb_trans.req_addr = usb_trans.req_addr << 16;
  171. usb_trans.req_addr = usb_trans.req_addr | rq->wIndex.word;
  172. debug_P(DEBUG_USB, PSTR("USB_CRC: addr=0x%08lx \n"), usb_trans.req_addr);
  173. crc_check_bulk_memory(0x000000, usb_trans.req_addr, usb_trans.req_bank_size);
  174. ret_len = 0;
  175. /*
  176. * -------------------------------------------------------------------------
  177. */
  178. } else if (rq->bRequest == USB_MODE_AVR) {
  179. usb_trans.req_state = REQ_STATUS_AVR;
  180. debug_P(DEBUG_USB, PSTR("USB_MODE_AVR:\n"));
  181. ret_len = 0;
  182. /*
  183. * -------------------------------------------------------------------------
  184. */
  185. } else if (rq->bRequest == USB_AVR_RESET) {
  186. debug_P(DEBUG_USB, PSTR("USB_AVR_RESET:\n"));
  187. soft_reset();
  188. ret_len = 0;
  189. /*
  190. * -------------------------------------------------------------------------
  191. */
  192. } else if (rq->bRequest == USB_SET_LAODER) {
  193. usb_trans.loader_enabled = rq->wValue.word;
  194. ret_len = 0;
  195. }
  196. usbMsgPtr = usb_trans.rx_buffer;
  197. return ret_len;
  198. }
  199. /*
  200. * -------------------------------------------------------------------------
  201. */
  202. void globals_init(){
  203. memset(&usb_trans,0,sizeof(usb_transaction_t));
  204. usb_trans.req_addr = 0;
  205. usb_trans.req_addr_end = 0;
  206. usb_trans.req_state = REQ_STATUS_IDLE;
  207. usb_trans.rx_remaining = 0;
  208. usb_trans.tx_remaining = 0;
  209. usb_trans.sync_errors = 0;
  210. usb_trans.loader_enabled = 1;
  211. }
  212. int main(void)
  213. {
  214. #ifndef NO_DEBUG
  215. uart_init();
  216. stdout = &uart_stdout;
  217. banner();
  218. #endif
  219. shared_memory_init();
  220. system_init();
  221. sram_init();
  222. //pwm_init();
  223. irq_init();
  224. boot_startup_rom(50);
  225. globals_init();
  226. //pwm_stop();
  227. usbInit();
  228. usb_connect();
  229. sei();
  230. while (1) {
  231. system_set_bus_avr();
  232. system_set_wr_disable();
  233. info_P(PSTR("USB poll\n"));
  234. while (usb_trans.req_state != REQ_STATUS_SNES) {
  235. usbPoll();
  236. #ifdef DO_SHELL
  237. #ifndef NO_DEBUG
  238. shell_run();
  239. #endif
  240. #endif
  241. }
  242. #if DO_SHM
  243. shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
  244. #endif
  245. #if DO_SHM_SCRATCHPAD
  246. shared_memory_scratchpad_region_tx_restore();
  247. shared_memory_scratchpad_region_rx_restore();
  248. #endif
  249. #if DO_CRC_CHECK
  250. info_P(PSTR("-->CRC Check\n"));
  251. crc_check_bulk_memory(0x000000, usb_trans.req_bank_size * usb_trans.req_bank_cnt, usb_trans.req_bank_size);
  252. #endif
  253. system_set_rom_mode(&usb_trans);
  254. system_set_wr_disable();
  255. system_set_bus_snes();
  256. system_send_snes_reset();
  257. irq_stop();
  258. /*
  259. info_P(PSTR("-->Switch TO SNES\n"));
  260. set_rom_mode();
  261. snes_wr_disable();
  262. info_P(PSTR("Disable SNES WR\n"));
  263. snes_bus_active();
  264. info_P(PSTR("Activate SNES bus\n"));
  265. irq_stop();
  266. send_reset();
  267. */
  268. info_P(PSTR("Poll USB\n"));
  269. while ((usb_trans.req_state != REQ_STATUS_AVR)) {
  270. usbPoll();
  271. #ifdef DO_SHELL
  272. #ifndef NO_DEBUG
  273. shell_run();
  274. #endif
  275. #endif
  276. }
  277. //info_P(PSTR("-->Switch TO AVR\n"));
  278. shared_memory_init();
  279. if(usb_trans.loader_enabled) {
  280. boot_startup_rom(500);
  281. } else {
  282. system_set_bus_avr();
  283. system_send_snes_reset();
  284. //avr_bus_active();
  285. //send_reset();
  286. }
  287. irq_init();
  288. }
  289. return 0;
  290. }