main.c 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334
  1. #include <avr/io.h>
  2. #include <avr/interrupt.h> /* for sei() */
  3. #include <util/delay.h> /* for _delay_ms() */
  4. #include <stdlib.h>
  5. #include <avr/pgmspace.h> /* required by usbdrv.h */
  6. #include "usbdrv.h"
  7. #include "oddebug.h" /* This is also an example for using debug
  8. * macros */
  9. #include "config.h"
  10. #include "requests.h" /* The custom request numbers we use */
  11. #include "uart.h"
  12. #include "sram.h"
  13. #include "debug.h"
  14. #include "crc.h"
  15. #include "usb_bulk.h"
  16. extern FILE uart_stdout;
  17. uint8_t debug_level = ( DEBUG | DEBUG_USB );
  18. uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
  19. uint32_t req_addr = 0;
  20. uint32_t req_size;
  21. uint8_t req_bank;
  22. uint16_t req_bank_size;
  23. uint8_t req_state = REQ_STATUS_IDLE;
  24. uint8_t rx_remaining = 0;
  25. uint8_t tx_remaining = 0;
  26. uint16_t sync_errors = 0;
  27. uint8_t tx_buffer[32];
  28. uint8_t data_buffer[4];
  29. uint32_t addr;
  30. uint16_t crc = 0;
  31. usbMsgLen_t usbFunctionSetup(uchar data[8])
  32. {
  33. usbRequest_t *rq = (void *) data;
  34. uint8_t ret_len = 0;
  35. /*
  36. * -------------------------------------------------------------------------
  37. */
  38. if (rq->bRequest == USB_UPLOAD_INIT) {
  39. if (req_state != REQ_STATUS_IDLE){
  40. debug(DEBUG_USB,"USB_UPLOAD_INIT: ERROR state is not REQ_STATUS_IDLE\n");
  41. return 0;
  42. }
  43. req_bank = 0;
  44. rx_remaining = 0;
  45. req_bank_size = 1 << rq->wValue.word;
  46. sync_errors = 0;
  47. crc = 0;
  48. debug(DEBUG_USB,"USB_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size);
  49. /*
  50. * -------------------------------------------------------------------------
  51. */
  52. } else if (rq->bRequest == USB_UPLOAD_ADDR) {
  53. req_state = REQ_STATUS_UPLOAD;
  54. req_addr = rq->wValue.word;
  55. req_addr = req_addr << 16;
  56. req_addr = req_addr | rq->wIndex.word;
  57. if (rx_remaining) {
  58. sync_errors++;
  59. debug
  60. (DEBUG_USB,"USB_UPLOAD_ADDR: Out of sync addr=0x%lx remain=%i packet=%i sync_error=%i\n",
  61. req_addr, rx_remaining, rq->wLength.word, sync_errors);
  62. ret_len = 0;
  63. }
  64. rx_remaining = rq->wLength.word;
  65. ret_len = USB_MAX_TRANS;
  66. if (req_addr && (req_addr % 0x1000) == 0) {
  67. debug(DEBUG_USB,"USB_UPLOAD_ADDR: bank=0x%02x addr=0x%08lx\n",
  68. req_bank, req_addr);
  69. crc_check_bulk_memory(req_addr - 0x1000,req_addr);
  70. }
  71. if (req_addr && req_addr % req_bank_size == 0) {
  72. debug(DEBUG_USB,"USB_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx\n",
  73. req_bank, req_addr);
  74. req_bank++;
  75. }
  76. ret_len = USB_MAX_TRANS;
  77. /*
  78. * -------------------------------------------------------------------------
  79. */
  80. } else if (rq->bRequest == USB_DOWNLOAD_INIT) {
  81. debug(DEBUG_USB,"USB_DOWNLOAD_INIT\n");
  82. /*
  83. * -------------------------------------------------------------------------
  84. */
  85. } else if (rq->bRequest == USB_DOWNLOAD_ADDR) {
  86. debug(DEBUG_USB,"USB_DOWNLOAD_ADDR\n");
  87. /*
  88. * -------------------------------------------------------------------------
  89. */
  90. } else if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
  91. if (req_state != REQ_STATUS_IDLE){
  92. debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: ERROR state is not REQ_STATUS_IDLE\n");
  93. return 0;
  94. }
  95. req_bank = 0;
  96. rx_remaining = 0;
  97. req_bank_size = (1 << rq->wValue.word) & 0xffff;
  98. sync_errors = 0;
  99. debug(DEBUG_USB,"USB_BULK_UPLOAD_INIT: bank_size=0x%x\n", req_bank_size);
  100. /*
  101. * -------------------------------------------------------------------------
  102. */
  103. } else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
  104. if (req_state != REQ_STATUS_IDLE){
  105. debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: ERROR state is not REQ_STATUS_IDLE\n");
  106. return 0;
  107. }
  108. req_state = REQ_STATUS_BULK_UPLOAD;
  109. req_addr = rq->wValue.word;
  110. req_addr = req_addr << 16;
  111. req_addr = req_addr | rq->wIndex.word;
  112. debug(DEBUG_USB,"USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx \n",req_bank,req_addr);
  113. ret_len = 0;
  114. /*
  115. * -------------------------------------------------------------------------
  116. */
  117. } else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
  118. if (req_state != REQ_STATUS_BULK_UPLOAD){
  119. debug(DEBUG_USB,"USB_BULK_UPLOAD_NEXT: ERROR state is not REQ_STATUS_BULK_UPLOAD\n");
  120. return 0;
  121. }
  122. if (rx_remaining) {
  123. sync_errors++;
  124. debug(DEBUG_USB,
  125. "USB_BULK_UPLOAD_NEXT: Out of sync addr=0x%lx remain=%i packet=%i sync_error=%i\n",
  126. req_addr, rx_remaining, rq->wLength.word, sync_errors);
  127. ret_len = 0;
  128. }
  129. rx_remaining = rq->wLength.word;
  130. ret_len = USB_MAX_TRANS;
  131. if (req_addr && req_addr % req_bank_size == 0) {
  132. debug(DEBUG_USB,"USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr= 0x%08lx \n",
  133. req_bank, req_addr);
  134. req_bank++;
  135. }
  136. ret_len = USB_MAX_TRANS;
  137. /*
  138. * -------------------------------------------------------------------------
  139. */
  140. } else if (rq->bRequest == USB_BULK_UPLOAD_END) {
  141. if (req_state != REQ_STATUS_BULK_UPLOAD){
  142. debug(DEBUG_USB,"USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n");
  143. return 0;
  144. }
  145. debug(DEBUG_USB,"USB_BULK_UPLOAD_END:\n");
  146. req_state = REQ_STATUS_IDLE;
  147. sram_bulk_write_end();
  148. ret_len = 0;
  149. /*
  150. * -------------------------------------------------------------------------
  151. */
  152. } else if (rq->bRequest == USB_CRC) {
  153. req_addr = rq->wValue.word;
  154. req_addr = req_addr << 16;
  155. req_addr = req_addr | rq->wIndex.word;
  156. debug(DEBUG_USB,"USB_CRC: addr=0x%08lx \n", req_addr);
  157. crc_check_bulk_memory(0x000000,req_addr);
  158. ret_len = 0;
  159. /*
  160. * -------------------------------------------------------------------------
  161. */
  162. } else if (rq->bRequest == USB_SNES_BOOT) {
  163. req_state = REQ_STATUS_BOOT;
  164. debug(DEBUG_USB,"USB_SNES_BOOT: ");
  165. ret_len = 0;
  166. /*
  167. * -------------------------------------------------------------------------
  168. */
  169. } else if (rq->bRequest == USB_CRC_ADDR) {
  170. req_state = REQ_STATUS_CRC;
  171. req_addr = rq->wValue.word;
  172. req_addr = req_addr << 16;
  173. req_addr = req_addr | rq->wIndex.word;
  174. debug(DEBUG_USB,"USB_CRC_ADDR: addr=0x%lx size=%i\n", req_addr,
  175. rq->wLength.word);
  176. req_size = rq->wLength.word;
  177. req_size = req_size << 2;
  178. tx_remaining = 2;
  179. debug(DEBUG_USB,"USB_CRC_ADDR: addr=0x%lx size=%li\n", req_addr, req_size);
  180. crc = crc_check_memory_range(req_addr,req_size,read_buffer);
  181. tx_buffer[0] = crc & 0xff;
  182. tx_buffer[1] = (crc >> 8) & 0xff;
  183. ret_len = 2;
  184. req_state = REQ_STATUS_IDLE;
  185. }
  186. usbMsgPtr = data_buffer;
  187. return ret_len; /* default for not implemented requests: return
  188. * no data back to host */
  189. }
  190. /*
  191. * -------------------------------------------------------------------------
  192. */
  193. void test_read_write(){
  194. uint8_t i;
  195. uint32_t addr;
  196. avr_bus_active();
  197. addr = 0x000000;
  198. i = 1;
  199. while (addr++ <= 0x0000ff){
  200. sram_write(addr,i++);
  201. }
  202. addr = 0x000000;
  203. while (addr++ <= 0x0000ff){
  204. printf("read addr=0x%08lx %x\n",addr,sram_read(addr));
  205. }
  206. }
  207. void test_bulk_read_write(){
  208. uint8_t i;
  209. uint32_t addr;
  210. avr_bus_active();
  211. addr = 0x000000;
  212. i = 0;
  213. sram_bulk_write_start(addr);
  214. while (addr++ <= 0x3fffff){
  215. sram_bulk_write(i++);
  216. sram_bulk_write_next();
  217. }
  218. sram_bulk_write_end();
  219. addr = 0x000000;
  220. sram_bulk_read_start(addr);
  221. while (addr <= 0x3fffff){
  222. printf("addr=0x%08lx %x\n",addr,sram_bulk_read());
  223. sram_bulk_read_next();
  224. addr ++;
  225. }
  226. sram_bulk_read_end();
  227. }
  228. void test_non_zero_memory(uint32_t bottom_addr,uint32_t top_addr)
  229. {
  230. uint32_t addr = 0;
  231. uint8_t c;
  232. sram_bulk_read_start(bottom_addr);
  233. for (addr = bottom_addr; addr < top_addr; addr++) {
  234. c = sram_bulk_read();
  235. if (c!=0xff)
  236. printf("addr=0x%08lx c=0x%x\n",addr,c);
  237. sram_bulk_read_next();
  238. }
  239. sram_bulk_read_end();
  240. }
  241. void test_crc(){
  242. printf("test_crc: clear\n");
  243. avr_bus_active();
  244. sram_bulk_set(0x000000,0x10000,0xff);
  245. printf("test_crc: crc\n");
  246. crc_check_bulk_memory(0x000000,0x10000);
  247. printf("test_crc: check\n");
  248. test_non_zero_memory(0x000000,0x10000);
  249. }
  250. int main(void)
  251. {
  252. uint8_t i;
  253. uart_init();
  254. stdout = &uart_stdout;
  255. system_init();
  256. printf("Sytem Init\n");
  257. avr_bus_active();
  258. usbInit();
  259. printf("USB Init\n");
  260. usbDeviceDisconnect(); /* enforce re-enumeration, do this while
  261. * interrupts are disabled! */
  262. cli();
  263. printf("USB disconnect\n");
  264. i = 10;
  265. while (--i) { /* fake USB disconnect for > 250 ms */
  266. led_on();
  267. _delay_ms(35);
  268. led_off();
  269. _delay_ms(65);
  270. }
  271. led_on();
  272. usbDeviceConnect();
  273. printf("USB connect\n");
  274. sei();
  275. printf("USB poll\n");
  276. while (req_state != REQ_STATUS_BOOT){
  277. usbPoll();
  278. }
  279. printf("USB poll done\n");
  280. usbDeviceDisconnect();
  281. printf("USB disconnect\n");
  282. crc_check_bulk_memory(0x000000,0x1000);
  283. printf("Disable snes WR\n");
  284. snes_wr_disable();
  285. printf("Use Snes lowrom\n");
  286. snes_lorom();
  287. printf("Activate Snes bus\n");
  288. snes_bus_active();
  289. while(1);
  290. return 0;
  291. }