StartupSnes.asm 8.3 KB

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  1. ; SNES ROM startup code
  2. ;******************************************************************************
  3. ;*** Define a special section in case most of the code is not in bank 0. ***
  4. ;******************************************************************************
  5. ;STACK EQU $01ff ;CHANGE THIS FOR YOUR SYSTEM
  6. ;STARTUP SECTION OFFSET $008000
  7. CODE
  8. XDEF START
  9. START:
  10. XREF ~~main
  11. sei ; Disabled interrupts
  12. clc ; clear carry to switch to native mode
  13. xce ; Xchange carry & emulation bit. native mode
  14. rep #$18 ; Binary mode (decimal mode off), X/Y 16 bit
  15. LONGI ON
  16. ldx #$1FFF ; set stack to $1FFF
  17. txs
  18. rep #$30
  19. longa on
  20. longi on
  21. ; Init data used for heap
  22. ; see heap definition below
  23. XREF ~~_heap_top
  24. XREF ~~_mem_start
  25. stz ~~_heap_top
  26. stz ~~_mem_start
  27. XREF ~~preInit
  28. jsr >~~preInit
  29. sep #$30 ; X,Y,A are 8 bit numbers
  30. LONGA OFF
  31. LONGI OFF
  32. lda #$8F ; screen off, full brightness
  33. sta $2100 ; brightness + screen enable register
  34. stz $2101 ; Sprite register (size + address in VRAM)
  35. stz $2102 ; Sprite registers (address of sprite memory [OAM])
  36. stz $2103 ; "" ""
  37. stz $2105 ; Mode 0, = Graphic mode register
  38. stz $2106 ; noplanes, no mosaic, = Mosaic register
  39. stz $2107 ; Plane 0 map VRAM location
  40. stz $2108 ; Plane 1 map VRAM location
  41. stz $2109 ; Plane 2 map VRAM location
  42. stz $210A ; Plane 3 map VRAM location
  43. stz $210B ; Plane 0+1 Tile data location
  44. stz $210C ; Plane 2+3 Tile data location
  45. stz $210D ; Plane 0 scroll x (first 8 bits)
  46. stz $210D ; Plane 0 scroll x (last 3 bits) #$0 - #$07ff
  47. stz $210E ; Plane 0 scroll y (first 8 bits)
  48. stz $210E ; Plane 0 scroll y (last 3 bits) #$0 - #$07ff
  49. stz $210F ; Plane 1 scroll x (first 8 bits)
  50. stz $210F ; Plane 1 scroll x (last 3 bits) #$0 - #$07ff
  51. stz $2110 ; Plane 1 scroll y (first 8 bits)
  52. stz $2110 ; Plane 1 scroll y (last 3 bits) #$0 - #$07ff
  53. stz $2111 ; Plane 2 scroll x (first 8 bits)
  54. stz $2111 ; Plane 2 scroll x (last 3 bits) #$0 - #$07ff
  55. stz $2112 ; Plane 2 scroll y (first 8 bits)
  56. stz $2112 ; Plane 2 scroll y (last 3 bits) #$0 - #$07ff
  57. stz $2113 ; Plane 3 scroll x (first 8 bits)
  58. stz $2113 ; Plane 3 scroll x (last 3 bits) #$0 - #$07ff
  59. stz $2114 ; Plane 3 scroll y (first 8 bits)
  60. stz $2114 ; Plane 3 scroll y (last 3 bits) #$0 - #$07ff
  61. lda #$80 ; increase VRAM address after writing to $2119
  62. sta $2115 ; VRAM address increment register
  63. stz $2116 ; VRAM address low
  64. stz $2117 ; VRAM address high
  65. stz $211A ; Initial Mode 7 setting register
  66. stz $211B ; Mode 7 matrix parameter A register (low)
  67. lda #$01
  68. sta $211B ; Mode 7 matrix parameter A register (high)
  69. stz $211C ; Mode 7 matrix parameter B register (low)
  70. stz $211C ; Mode 7 matrix parameter B register (high)
  71. stz $211D ; Mode 7 matrix parameter C register (low)
  72. stz $211D ; Mode 7 matrix parameter C register (high)
  73. stz $211E ; Mode 7 matrix parameter D register (low)
  74. sta $211E ; Mode 7 matrix parameter D register (high)
  75. stz $211F ; Mode 7 center position X register (low)
  76. stz $211F ; Mode 7 center position X register (high)
  77. stz $2120 ; Mode 7 center position Y register (low)
  78. stz $2120 ; Mode 7 center position Y register (high)
  79. stz $2121 ; Color number register ($0-ff)
  80. stz $2123 ; BG1 & BG2 Window mask setting register
  81. stz $2124 ; BG3 & BG4 Window mask setting register
  82. stz $2125 ; OBJ & Color Window mask setting register
  83. stz $2126 ; Window 1 left position register
  84. stz $2127 ; Window 2 left position register
  85. stz $2128 ; Window 3 left position register
  86. stz $2129 ; Window 4 left position register
  87. stz $212A ; BG1, BG2, BG3, BG4 Window Logic register
  88. stz $212B ; OBJ, Color Window Logic Register (or,and,xor,xnor)
  89. sta $212C ; Main Screen designation (planes, sprites enable)
  90. stz $212D ; Sub Screen designation
  91. stz $212E ; Window mask for Main Screen
  92. stz $212F ; Window mask for Sub Screen
  93. lda #$30
  94. sta $2130 ; Color addition & screen addition init setting
  95. stz $2131 ; Add/Sub sub designation for screen, sprite, color
  96. lda #$E0
  97. sta $2132 ; color data for addition/subtraction
  98. stz $2133 ; Screen setting (interlace x,y/enable SFX data)
  99. stz $4200 ; Enable V-blank, interrupt, Joypad register
  100. lda #$FF
  101. sta $4201 ; Programmable I/O port
  102. stz $4202 ; Multiplicand A
  103. stz $4203 ; Multiplier B
  104. stz $4204 ; Multiplier C
  105. stz $4205 ; Multiplicand C
  106. stz $4206 ; Divisor B
  107. stz $4207 ; Horizontal Count Timer
  108. stz $4208 ; Horizontal Count Timer MSB (most significant bit)
  109. stz $4209 ; Vertical Count Timer
  110. stz $420A ; Vertical Count Timer MSB
  111. stz $420B ; General DMA enable (bits 0-7)
  112. stz $420C ; Horizontal DMA (HDMA) enable (bits 0-7)
  113. stz $420D ; Access cycle designation (slow/fast rom)
  114. cli ; Enable interrupts
  115. ;;lda #$01
  116. ;;sta $4200
  117. rep #$30
  118. longa on
  119. longi on
  120. jsr >~~main
  121. brk
  122. XDEF IRQ
  123. IRQ:
  124. ;LONGA ON
  125. ;LONGI ON
  126. rep #$10
  127. sep #$20
  128. lda #65
  129. sta $3000
  130. rep #$30
  131. ;LONGA OFF
  132. ;LONGI OFF
  133. rti
  134. XREF ~~IRQHandler
  135. LONGA ON
  136. LONGI ON
  137. rep #$30
  138. pha
  139. phx
  140. phy
  141. jsr ~~IRQHandler
  142. ply
  143. plx
  144. pla
  145. rti
  146. XDEF NMI
  147. NMI:
  148. rep #$30
  149. lda #66
  150. sta $3000
  151. sep #$30 ; X,Y,A are 8 bit numbers
  152. rti
  153. XREF ~~NMIHandler
  154. LONGA ON
  155. LONGI ON
  156. rep #$30
  157. pha
  158. phx
  159. phy
  160. phd
  161. phb
  162. lda #$0000
  163. sep #$30 ; X,Y,A are 8 bit numbers
  164. LONGA OFF
  165. LONGI OFF
  166. lda $4210 ; Read NMI
  167. LONGA ON
  168. LONGI ON
  169. rep #$30
  170. jsr ~~NMIHandler
  171. plb
  172. pld
  173. ply
  174. plx
  175. pla
  176. rti
  177. DIRQ:
  178. rti
  179. ENDS
  180. ;******************************************************************************
  181. ;*** Heap definition ***
  182. ;******************************************************************************
  183. DATA
  184. XDEF ~~heap_start
  185. XDEF ~~heap_end
  186. ~~heap_start:
  187. WORD $1e00
  188. ~~heap_end:
  189. WORD $2000
  190. ;******************************************************************************
  191. ;*** SNES ROM Registartion Data ***
  192. ;******************************************************************************
  193. REGISTRATION_DATA SECTION
  194. MAKER_CODE FCC /FF/
  195. GAME_CODE FCC /SMWJ/
  196. FIXED_VALUE0 BYTE $00, $00, $00, $00, $00, $00, $00
  197. EXPANSION_RAM_SIZE BYTE $00
  198. SPECIAL_VERSION BYTE $00
  199. CARTRIDGE_TYPE_SUB BYTE $00
  200. GAME_TITLE FCC /GAME TITLE !/
  201. ;012345678901234567890;
  202. MAP_MODE BYTE $20
  203. CARTRIDGE_SIZE BYTE $00
  204. ROM_SIZE BYTE $09
  205. RAM_SIZE BYTE $00
  206. DESTINATION_CODE BYTE $00
  207. FIXED_VALUE1 BYTE $33
  208. MASK_ROM_VERSION BYTE $00
  209. COMPLEMENT_CHECK BYTE $00, $00
  210. CHEKSUM BYTE $00, $00
  211. ;******************************************************************************
  212. ;*** SNES Interrupts and Reset vector ***
  213. ;******************************************************************************
  214. VECTORS SECTION
  215. ; Native vector
  216. N_COP DW DIRQ
  217. N_BRK DW DIRQ
  218. N_ABORT DW DIRQ
  219. N_NMI DW NMI
  220. N_RSRVD DW DIRQ
  221. N_IRQ DW IRQ
  222. DS 4
  223. ; Emulation vector
  224. E_COP DW DIRQ
  225. E_RSRVD DW DIRQ
  226. E_ABORT DW DIRQ
  227. E_NMI DW DIRQ
  228. E_RESET DW START
  229. E_IRQ DW DIRQ
  230. END