crc.c 3.3 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #include <stdlib.h>
  21. #include <stdint.h>
  22. #include "crc.h"
  23. #include "uart.h"
  24. #include "config.h"
  25. #include "sram.h"
  26. #include "debug.h"
  27. extern FILE uart_stdout;
  28. uint16_t crc_xmodem_update(uint16_t crc, uint8_t data)
  29. {
  30. int i;
  31. crc = crc ^ ((uint16_t) data << 8);
  32. for (i = 0; i < 8; i++) {
  33. if (crc & 0x8000)
  34. crc = (crc << 1) ^ 0x1021;
  35. else
  36. crc <<= 1;
  37. }
  38. return crc;
  39. }
  40. uint16_t do_crc(uint8_t * data, uint16_t size)
  41. {
  42. uint16_t crc = 0;
  43. uint16_t i;
  44. for (i = 0; i < size; i++) {
  45. crc = crc_xmodem_update(crc, data[i]);
  46. }
  47. return crc;
  48. }
  49. uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
  50. {
  51. uint16_t i;
  52. for (i = 0; i < size; i++)
  53. crc = crc_xmodem_update(crc, data[i]);
  54. return crc;
  55. }
  56. uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t top_addr, uint32_t bank_size)
  57. {
  58. uint16_t crc = 0;
  59. uint32_t addr = 0;
  60. uint8_t req_bank = 0;
  61. sram_bulk_read_start(bottom_addr);
  62. for (addr = bottom_addr; addr < top_addr; addr++) {
  63. if (addr && addr % bank_size == 0) {
  64. debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  65. req_bank,addr,crc);
  66. req_bank++;
  67. crc = 0;
  68. }
  69. crc = crc_xmodem_update(crc, sram_bulk_read());
  70. sram_bulk_read_next();
  71. }
  72. if (addr % 0x8000 == 0)
  73. debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  74. req_bank,addr,crc);
  75. sram_bulk_read_end();
  76. return crc;
  77. }
  78. void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint32_t bank_size,uint8_t *buffer)
  79. {
  80. uint16_t crc = 0;
  81. uint32_t addr;
  82. uint8_t req_bank = 0;
  83. for (addr = bottom_addr; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) {
  84. if (addr && addr % bank_size == 0) {
  85. debug(DEBUG_CRC,"crc_check_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  86. req_bank,addr,crc);
  87. req_bank++;
  88. crc = 0;
  89. }
  90. sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
  91. crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
  92. }
  93. }
  94. uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer)
  95. {
  96. uint16_t crc = 0;
  97. uint32_t addr;
  98. for (addr = start_addr; addr < start_addr + size; addr += TRANSFER_BUFFER_SIZE) {
  99. sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
  100. crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
  101. }
  102. return crc;
  103. }