main.c 9.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473
  1. #include <avr/io.h>
  2. #include <util/delay.h>
  3. #include <stdlib.h>
  4. #include "uart.h"
  5. #include "mmc.h"
  6. #include "fat.h"
  7. // Debug
  8. #define debug(x, fmt) printf("%s:%u: %s=" fmt, __FILE__, __LINE__, #x, x)
  9. extern FILE uart_stdout;
  10. //SREG defines
  11. #define S_MOSI PB5
  12. #define S_MISO PB6
  13. #define S_SCK PB7
  14. #define S_LATCH PB4
  15. //DEBUG defines
  16. #define D_LED0 PD6
  17. //SRAM defines
  18. #define R_WR PB1
  19. #define R_RD PB0
  20. #define RAM_PORT PORTA
  21. #define RAM_DIR DDRA
  22. #define RAM_REG PINA
  23. #define CTRL_PORT PORTB
  24. #define CTRL_DIR DDRB
  25. #define LATCH_PORT PORTB
  26. #define LATCH_DIR DDRB
  27. #define SPI_PORT PORTB
  28. #define SPI_DIR DDRB
  29. #define LED_PORT PORTD
  30. #define LED_DIR DDRD
  31. //#define FILENAME "sprite.raw" //ok
  32. //#define FILENAME "ascii.smc" //ok
  33. //#define FILENAME "rom.smc" //ok
  34. //#define FILENAME "supert.smc" //ok
  35. //#define FILENAME "vortex.smc" //failed
  36. //#define FILENAME "mrdo.smc" //failed
  37. //#define FILENAME "spacei.smc" //ok ntsc
  38. //#define FILENAME "bank01.smc" //ok
  39. //#define FILENAME "bank02.smc" //ok
  40. //#define FILENAME "bank03.smc" //ok
  41. //#define FILENAME "bank04.smc" //ok
  42. //#define FILENAME "bank05.smc" //ok
  43. //#define FILENAME "bank06.smc" //ok
  44. //#define FILENAME "bank07.smc" //ok
  45. //#define FILENAME "banklo.smc" //ok
  46. //#define FILENAME "bankhi.smc" //ok
  47. //#define FILENAME "vram2.smc" //ok
  48. //#define FILENAME "super02.smc" //ok
  49. //#define FILENAME "super01.smc"//ok
  50. #define FILENAME "crc.smc" //ok
  51. //#define FILENAME "banks.smc" //ok
  52. //#define FILENAME "hungry.smc" //ok
  53. //#define FILENAME "arkanoid.smc"//ok
  54. //#define FILENAME "eric.smc"
  55. //#define FILENAME "super01.smc"
  56. #define ROMSIZE 2 // 4 == 4mbit == 512kb
  57. // 2 == 2mbit == 256kb
  58. #define DUMPNAME "dump256.smc"
  59. #define BUFFER_SIZE 512
  60. #define BLOCKS (ROMSIZE << 8)
  61. #define MEMSIZE 0x80000
  62. uint8_t read_buffer[BUFFER_SIZE];
  63. uint16_t crc_xmodem_update (uint16_t crc, uint8_t data)
  64. {
  65. int i;
  66. crc = crc ^ ((uint16_t)data << 8);
  67. for (i=0; i<8; i++)
  68. {
  69. if (crc & 0x8000)
  70. crc = (crc << 1) ^ 0x1021;
  71. else
  72. crc <<= 1;
  73. }
  74. return crc;
  75. }
  76. uint16_t do_crc(uint8_t * data,uint16_t size)
  77. {
  78. uint16_t crc =0;
  79. uint16_t i;
  80. for (i=0; i<size; i++){
  81. crc = crc_xmodem_update(crc,data[i]);
  82. //printf("%x : %x\n",crc,data[i]);
  83. }
  84. return crc;
  85. }
  86. uint16_t do_crc_update(uint16_t crc,uint8_t * data,uint16_t size)
  87. {
  88. uint16_t i;
  89. for (i=0; i<size; i++)
  90. crc = crc_xmodem_update(crc,data[i]);
  91. return crc;
  92. }
  93. void dump_packet(uint32_t addr,uint32_t len,uint8_t *packet){
  94. uint16_t i,j;
  95. uint16_t sum = 0;
  96. uint8_t clear=0;
  97. for (i=0;i<len;i+=16) {
  98. sum = 0;
  99. for (j=0;j<16;j++) {
  100. sum +=packet[i+j];
  101. }
  102. if (!sum){
  103. clear=1;
  104. continue;
  105. }
  106. if (clear){
  107. printf("*\n");
  108. clear = 0;
  109. }
  110. printf("%08lx:", addr + i);
  111. for (j=0;j<16;j++) {
  112. printf(" %02x", packet[i+j]);
  113. }
  114. printf(" |");
  115. for (j=0;j<16;j++) {
  116. if (packet[i+j]>=33 && packet[i+j]<=126 )
  117. printf("%c", packet[i+j]);
  118. else
  119. printf(".");
  120. }
  121. printf("|\n");
  122. }
  123. }
  124. void spi_init(void)
  125. {
  126. /* Set MOSI and SCK output, all others input */
  127. SPI_DIR |= ((1<<S_MOSI) | (1<<S_SCK) | (1<<S_LATCH));
  128. SPI_DIR &= ~(1<<S_MISO);
  129. SPI_PORT |= (1<<S_MISO);
  130. /* Enable SPI, Master*/
  131. SPCR = ((1<<SPE) | (1<<MSTR));
  132. }
  133. void spi_master_transmit(unsigned char cData)
  134. {
  135. /* Start transmission */
  136. SPDR = cData;
  137. /* Wait for transmission complete */
  138. while(!(SPSR & (1<<SPIF)));
  139. }
  140. void sram_set_addr(uint32_t addr)
  141. {
  142. spi_master_transmit((uint8_t)(addr>>16));
  143. spi_master_transmit((uint8_t)(addr>>8));
  144. spi_master_transmit((uint8_t)(addr>>0));
  145. LATCH_PORT |= (1<<S_LATCH);
  146. LATCH_PORT &= ~(1<<S_LATCH);
  147. }
  148. uint8_t sram_read(uint32_t addr)
  149. {
  150. uint8_t byte;
  151. RAM_DIR = 0x00;
  152. RAM_PORT = 0xff;
  153. CTRL_PORT |= (1<<R_RD);
  154. CTRL_PORT |= (1<<R_WR);
  155. spi_master_transmit((uint8_t)(addr>>16));
  156. spi_master_transmit((uint8_t)(addr>>8));
  157. spi_master_transmit((uint8_t)(addr>>0));
  158. LATCH_PORT |= (1<<S_LATCH);
  159. LATCH_PORT &= ~(1<<S_LATCH);
  160. CTRL_PORT &= ~(1<<R_RD);
  161. asm volatile ("nop");
  162. asm volatile ("nop");
  163. asm volatile ("nop");
  164. asm volatile ("nop");
  165. asm volatile ("nop");
  166. asm volatile ("nop");
  167. asm volatile ("nop");
  168. asm volatile ("nop");
  169. byte = RAM_REG;
  170. CTRL_PORT |= (1<<R_RD);
  171. RAM_DIR =0x00;
  172. RAM_PORT =0x00;
  173. return byte;
  174. }
  175. void sram_write(uint32_t addr, uint8_t data)
  176. {
  177. RAM_DIR = 0xff;
  178. /* deactive RD and WR on ram */
  179. CTRL_PORT |= (1<<R_RD);
  180. CTRL_PORT |= (1<<R_WR);
  181. /* setup address */
  182. spi_master_transmit((uint8_t)(addr>>16));
  183. spi_master_transmit((uint8_t)(addr>>8));
  184. spi_master_transmit((uint8_t)(addr>>0));
  185. /* passthru address in sreg */
  186. LATCH_PORT |= (1<<S_LATCH);
  187. LATCH_PORT &= ~(1<<S_LATCH);
  188. /* write enable */
  189. CTRL_PORT &= ~(1<<R_WR);
  190. /* busdriver toggle */
  191. /* write data */
  192. RAM_PORT = data;
  193. /* disable write */
  194. CTRL_PORT |= (1<<R_WR);
  195. RAM_DIR = 0x00;
  196. RAM_PORT = 0x00;
  197. }
  198. void sram_init(void){
  199. RAM_DIR = 0x00;
  200. RAM_PORT = 0x00;
  201. CTRL_DIR |= ((1<<R_WR) | (1<<R_RD));
  202. CTRL_PORT |= (1<<R_RD);
  203. CTRL_PORT |= (1<<R_WR);
  204. LED_PORT |= (1<<D_LED0);
  205. }
  206. void sram_snes_mode01(void){
  207. CTRL_PORT |= (1<<R_WR);
  208. CTRL_PORT &= ~(1<<R_RD);
  209. }
  210. void sram_snes_mode02(void){
  211. CTRL_DIR |= (1<<R_WR);
  212. CTRL_PORT |= (1<<R_WR);
  213. //CTRL_PORT &= ~(1<<R_RD);
  214. CTRL_DIR &= ~(1<<R_RD);
  215. CTRL_PORT &= ~(1<<R_RD);
  216. }
  217. void sram_clear(uint32_t addr, uint32_t len){
  218. uint32_t i;
  219. for (i=addr; i<(addr + len);i++ ){
  220. if (0==i%0xfff)
  221. printf("sram_clear %lx\n\r",i);
  222. sram_write(i, 0x00);
  223. }
  224. }
  225. void sram_copy(uint32_t addr,uint8_t *src, uint32_t len){
  226. uint32_t i;
  227. uint8_t *ptr = src;
  228. for (i=addr; i<(addr + len);i++ )
  229. sram_write(i, *ptr++);
  230. }
  231. void sram_read_buffer(uint32_t addr,uint8_t *dst, uint32_t len){
  232. uint32_t i;
  233. uint8_t *ptr = dst;
  234. for (i=addr; i<(addr + len);i++ ){
  235. *ptr = sram_read(i);
  236. ptr++;
  237. }
  238. }
  239. uint8_t sram_check(uint8_t *buffer, uint32_t len){
  240. for (uint16_t cnt=0; cnt<len; cnt++)
  241. if (buffer[cnt])
  242. return 1;
  243. return 0;
  244. }
  245. int main(void)
  246. {
  247. uint16_t fat_cluster = 0;
  248. uint8_t fat_attrib = 0;
  249. uint32_t fat_size = 0;
  250. uint32_t rom_addr = 0;
  251. uint8_t bank_cnt = 0;
  252. uint16_t crc = 0;
  253. uint16_t block_cnt;
  254. uart_init();
  255. stdout = &uart_stdout;
  256. sram_init();
  257. printf("SRAM Init\n");
  258. spi_init();
  259. printf("SPI Init\n");
  260. #if 0
  261. uint8_t t[] = "david";
  262. printf("Test CRC %x\n",do_crc(t,5));
  263. while(1);
  264. #endif
  265. #if 0
  266. sram_clear(0x000000, 0x80000);
  267. printf("sram_clear\n");
  268. #endif
  269. #if 0
  270. printf("read 0x0f0f\n");
  271. sram_read(0x0f0f);
  272. printf("write 0x0f0f\n");
  273. sram_write(0x0f0f,0xaa);
  274. #endif
  275. #if 0
  276. rom_addr = 0x4aaaa;
  277. printf("write %lx\n",rom_addr);
  278. sram_set_addr(rom_addr);
  279. while(1);
  280. #endif
  281. while ( mmc_init() !=0) {
  282. printf("No sdcard...\n");
  283. }
  284. printf("MMC Init done\n");
  285. fat_init(read_buffer);
  286. printf("FAT Init done.\n");
  287. rom_addr = 0x000000;
  288. printf("Look for %s\n",FILENAME);
  289. if (fat_search_file((uint8_t*)FILENAME,
  290. &fat_cluster,
  291. &fat_size,
  292. &fat_attrib,
  293. read_buffer) == 1) {
  294. for (block_cnt=0; block_cnt<BLOCKS; block_cnt++) {
  295. fat_read_file (fat_cluster,read_buffer,block_cnt);
  296. if (block_cnt && block_cnt % 64 == 0){
  297. printf("Write Ram Bank: 0x%x Addr: 0x%lx Block: %x CRC: %x\n",bank_cnt,rom_addr,block_cnt,crc);
  298. bank_cnt++;
  299. crc = 0;
  300. }
  301. crc = do_crc_update(crc,read_buffer,512);
  302. sram_copy(rom_addr,read_buffer,512);
  303. rom_addr += 512;
  304. }
  305. printf("Write Ram Bank: 0x%x Addr: 0x%lx Block: %x CRC: %x\n",bank_cnt,rom_addr,block_cnt,crc);
  306. printf("Done\n");
  307. }
  308. printf("Dump Headern\r");
  309. rom_addr = 0x8000-512;
  310. sram_read_buffer(rom_addr,read_buffer,512);
  311. dump_packet(rom_addr,512,read_buffer);
  312. #if 0
  313. printf("Dump Memory\n\r");
  314. rom_addr = 0x000000;
  315. for (uint16_t block_cnt=0; block_cnt < 64; block_cnt++) {
  316. sram_read_buffer(rom_addr,read_buffer,512);
  317. dump_packet(rom_addr,512,read_buffer);
  318. rom_addr += 512;
  319. }
  320. printf("\nDone 0x%lx\n",rom_addr);
  321. #endif
  322. #if 1
  323. block_cnt = 0;
  324. crc = 0;
  325. bank_cnt=0x00;
  326. rom_addr = 0x000000;
  327. for (block_cnt=0; block_cnt<BLOCKS; block_cnt++) {
  328. sram_read_buffer(rom_addr,read_buffer,512);
  329. if (block_cnt && block_cnt % 64 == 0){
  330. printf("Read Ram Bank: 0x%x Addr: 0x%lx Block: %x CRC: %x\n",bank_cnt,rom_addr,block_cnt,crc);
  331. bank_cnt++;
  332. crc = 0;
  333. }
  334. crc = do_crc_update(crc,read_buffer,512);
  335. rom_addr += 512;
  336. }
  337. printf("Read Ram Bank: 0x%x Addr: 0x%lx Block: %x CRC: %x\n",bank_cnt,rom_addr,block_cnt,crc);
  338. #endif
  339. #if 0
  340. printf("Look for %s\n",DUMPNAME);
  341. fat_cluster = 0;
  342. fat_attrib = 0;
  343. fat_size = 0;
  344. if (fat_search_file((uint8_t*)DUMPNAME,
  345. &fat_cluster,
  346. &fat_size,
  347. &fat_attrib,
  348. read_buffer) == 1) {
  349. printf("Found %s\n",DUMPNAME);
  350. rom_addr = 0x000000;
  351. bank_cnt =0;
  352. for (uint16_t block_cnt=0; block_cnt<BLOCKS; block_cnt++) {
  353. printf("Write 1");
  354. sram_read_buffer(rom_addr,read_buffer,512);
  355. printf("Write 2");
  356. fat_write_file (fat_cluster,read_buffer,block_cnt);
  357. if (block_cnt % 64 == 0){
  358. bank_cnt++;
  359. }
  360. printf("Write File Bank: 0x%x Addr: 0x%lx Skipped: %li\n",bank_cnt,rom_addr,skip_block);
  361. rom_addr += 512;
  362. }
  363. printf("Done 0x%lx Skipped %li\n",rom_addr,skip_block);
  364. }
  365. #endif
  366. #if 0
  367. sram_snes_mode01();
  368. printf("\nEnter Snes mode 02\n");
  369. #endif
  370. #if 0
  371. sram_snes_mode02();
  372. printf("\nEnter Snes mode 02\n");
  373. #endif
  374. printf("\nUpload done.\n");
  375. while(1);
  376. return 0 ;
  377. }