crc.c 3.4 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. * ___.
  11. * __ __ _____\_ |__
  12. * | | \/ ___/| __ \
  13. * | | /\___ \ | \_\ \
  14. * |____//____ >|___ /
  15. * \/ \/
  16. *
  17. * www.optixx.org
  18. *
  19. *
  20. * Version: 1.0
  21. * Created: 07/21/2009 03:32:16 PM
  22. * Author: david@optixx.org
  23. *
  24. * =====================================================================================
  25. */
  26. #include <stdlib.h>
  27. #include <stdint.h>
  28. #include "crc.h"
  29. #include "uart.h"
  30. #include "config.h"
  31. #include "sram.h"
  32. #include "debug.h"
  33. extern FILE uart_stdout;
  34. uint16_t crc_xmodem_update(uint16_t crc, uint8_t data)
  35. {
  36. int i;
  37. crc = crc ^ ((uint16_t) data << 8);
  38. for (i = 0; i < 8; i++) {
  39. if (crc & 0x8000)
  40. crc = (crc << 1) ^ 0x1021;
  41. else
  42. crc <<= 1;
  43. }
  44. return crc;
  45. }
  46. uint16_t do_crc(uint8_t * data, uint16_t size)
  47. {
  48. uint16_t crc = 0;
  49. uint16_t i;
  50. for (i = 0; i < size; i++) {
  51. crc = crc_xmodem_update(crc, data[i]);
  52. }
  53. return crc;
  54. }
  55. uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
  56. {
  57. uint16_t i;
  58. for (i = 0; i < size; i++)
  59. crc = crc_xmodem_update(crc, data[i]);
  60. return crc;
  61. }
  62. uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t top_addr, uint32_t bank_size)
  63. {
  64. uint16_t crc = 0;
  65. uint32_t addr = 0;
  66. uint8_t req_bank = 0;
  67. sram_bulk_read_start(bottom_addr);
  68. for (addr = bottom_addr; addr < top_addr; addr++) {
  69. if (addr && addr % bank_size == 0) {
  70. debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  71. req_bank,addr,crc);
  72. req_bank++;
  73. crc = 0;
  74. }
  75. crc = crc_xmodem_update(crc, sram_bulk_read());
  76. sram_bulk_read_next();
  77. }
  78. if (addr % 0x8000 == 0)
  79. debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  80. req_bank,addr,crc);
  81. sram_bulk_read_end();
  82. return crc;
  83. }
  84. void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint32_t bank_size,uint8_t *buffer)
  85. {
  86. uint16_t crc = 0;
  87. uint32_t addr;
  88. uint8_t req_bank = 0;
  89. for (addr = bottom_addr; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) {
  90. if (addr && addr % bank_size == 0) {
  91. debug(DEBUG_CRC,"crc_check_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  92. req_bank,addr,crc);
  93. req_bank++;
  94. crc = 0;
  95. }
  96. sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
  97. crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
  98. }
  99. }
  100. uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer)
  101. {
  102. uint16_t crc = 0;
  103. uint32_t addr;
  104. for (addr = start_addr; addr < start_addr + size; addr += TRANSFER_BUFFER_SIZE) {
  105. sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
  106. crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
  107. }
  108. return crc;
  109. }