crc.c 3.3 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #include <stdlib.h>
  21. #include <stdint.h>
  22. #include "crc.h"
  23. #include "uart.h"
  24. #include "config.h"
  25. #include "sram.h"
  26. #include "debug.h"
  27. #include "info.h"
  28. extern FILE uart_stdout;
  29. uint16_t crc_xmodem_update(uint16_t crc, uint8_t data)
  30. {
  31. int i;
  32. crc = crc ^ ((uint16_t) data << 8);
  33. for (i = 0; i < 8; i++) {
  34. if (crc & 0x8000)
  35. crc = (crc << 1) ^ 0x1021;
  36. else
  37. crc <<= 1;
  38. }
  39. return crc;
  40. }
  41. uint16_t do_crc(uint8_t * data, uint16_t size)
  42. {
  43. uint16_t crc = 0;
  44. uint16_t i;
  45. for (i = 0; i < size; i++) {
  46. crc = crc_xmodem_update(crc, data[i]);
  47. }
  48. return crc;
  49. }
  50. uint16_t do_crc_update(uint16_t crc, uint8_t * data, uint16_t size)
  51. {
  52. uint16_t i;
  53. for (i = 0; i < size; i++)
  54. crc = crc_xmodem_update(crc, data[i]);
  55. return crc;
  56. }
  57. uint16_t crc_check_bulk_memory(uint32_t bottom_addr, uint32_t top_addr, uint32_t bank_size)
  58. {
  59. uint16_t crc = 0;
  60. uint32_t addr = 0;
  61. uint8_t req_bank = 0;
  62. sram_bulk_read_start(bottom_addr);
  63. for (addr = bottom_addr; addr < top_addr; addr++) {
  64. if (addr && addr % bank_size == 0) {
  65. debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  66. req_bank,addr,crc);
  67. req_bank++;
  68. crc = 0;
  69. }
  70. crc = crc_xmodem_update(crc, sram_bulk_read());
  71. sram_bulk_read_next();
  72. }
  73. if (addr % 0x8000 == 0)
  74. debug(DEBUG_CRC,"crc_check_bulk_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  75. req_bank,addr,crc);
  76. sram_bulk_read_end();
  77. return crc;
  78. }
  79. void crc_check_memory(uint32_t bottom_addr,uint32_t top_addr,uint32_t bank_size,uint8_t *buffer)
  80. {
  81. uint16_t crc = 0;
  82. uint32_t addr;
  83. uint8_t req_bank = 0;
  84. for (addr = bottom_addr; addr < top_addr; addr += TRANSFER_BUFFER_SIZE) {
  85. if (addr && addr % bank_size == 0) {
  86. debug(DEBUG_CRC,"crc_check_memory: bank=0x%02x addr=0x%08lx crc=0x%04x\n",
  87. req_bank,addr,crc);
  88. req_bank++;
  89. crc = 0;
  90. }
  91. sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
  92. crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
  93. }
  94. }
  95. uint16_t crc_check_memory_range(uint32_t start_addr, uint32_t size,uint8_t *buffer)
  96. {
  97. uint16_t crc = 0;
  98. uint32_t addr;
  99. for (addr = start_addr; addr < start_addr + size; addr += TRANSFER_BUFFER_SIZE) {
  100. sram_read_buffer(addr, buffer, TRANSFER_BUFFER_SIZE);
  101. crc = do_crc_update(crc, buffer, TRANSFER_BUFFER_SIZE);
  102. }
  103. return crc;
  104. }