main.c 11 KB

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  1. /*
  2. * =====================================================================================
  3. *
  4. * ________ .__ __ ________ ____ ________
  5. * \_____ \ __ __|__| ____ | | __\______ \ _______ _/_ |/ _____/
  6. * / / \ \| | \ |/ ___\| |/ / | | \_/ __ \ \/ /| / __ \
  7. * / \_/. \ | / \ \___| < | ` \ ___/\ / | \ |__\ \
  8. * \_____\ \_/____/|__|\___ >__|_ \/_______ /\___ >\_/ |___|\_____ /
  9. * \__> \/ \/ \/ \/ \/
  10. *
  11. * www.optixx.org
  12. *
  13. *
  14. * Version: 1.0
  15. * Created: 07/21/2009 03:32:16 PM
  16. * Author: david@optixx.org
  17. *
  18. * =====================================================================================
  19. */
  20. #include <avr/io.h>
  21. #include <avr/interrupt.h>
  22. #include <util/delay.h>
  23. #include <stdlib.h>
  24. #include <avr/pgmspace.h>
  25. #include <avr/eeprom.h>
  26. #include "usbdrv.h"
  27. #include "oddebug.h"
  28. #include "config.h"
  29. #include "requests.h"
  30. #include "uart.h"
  31. #include "sram.h"
  32. #include "debug.h"
  33. #include "info.h"
  34. #include "dump.h"
  35. #include "crc.h"
  36. #include "usb_bulk.h"
  37. #include "timer.h"
  38. #include "watchdog.h"
  39. #include "rle.h"
  40. #include "loader.h"
  41. #include "command.h"
  42. #include "shared_memory.h"
  43. #include "irq.h"
  44. #include "testing.h"
  45. extern const char _rom[] PROGMEM;
  46. extern FILE uart_stdout;
  47. uint8_t debug_level = (DEBUG | DEBUG_USB | DEBUG_CRC | DEBUG_SHM );
  48. uint8_t read_buffer[TRANSFER_BUFFER_SIZE];
  49. uint32_t req_addr = 0;
  50. uint32_t req_addr_end = 0;
  51. uint32_t req_size;
  52. uint8_t req_bank;
  53. uint32_t req_bank_size;
  54. uint16_t req_bank_cnt;
  55. uint8_t req_percent;
  56. uint8_t req_percent_last;
  57. uint8_t req_state = REQ_STATUS_IDLE;
  58. uint8_t rx_remaining = 0;
  59. uint8_t tx_remaining = 0;
  60. uint16_t sync_errors = 0;
  61. uint8_t tx_buffer[32];
  62. uint8_t data_buffer[4];
  63. uint32_t addr;
  64. uint16_t crc = 0;
  65. usbMsgLen_t usbFunctionSetup(uchar data[8])
  66. {
  67. usbRequest_t *rq = (void *) data;
  68. uint8_t ret_len = 0;
  69. if (rq->bRequest == USB_BULK_UPLOAD_INIT) {
  70. req_bank = 0;
  71. rx_remaining = 0;
  72. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_INIT: %i %i\n"), rq->wValue.word,
  73. rq->wIndex.word);
  74. req_bank_size = (uint32_t) (1L << rq->wValue.word);
  75. req_bank_cnt = rq->wIndex.word;
  76. req_addr_end = (uint32_t) req_bank_size *req_bank_cnt;
  77. req_percent = 0;
  78. req_percent_last = 0;
  79. sync_errors = 0;
  80. debug_P(DEBUG_USB,
  81. PSTR("USB_BULK_UPLOAD_INIT: bank_size=0x%08lx bank_cnt=0x%x end_addr=0x%08lx\n"),
  82. req_bank_size, req_bank_cnt, req_addr_end);
  83. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_START, 0);
  84. shared_memory_write(SHARED_MEM_TX_CMD_BANK_COUNT, req_bank_cnt);
  85. if (req_addr == 0x000000) {
  86. timer_start();
  87. }
  88. /*
  89. * -------------------------------------------------------------------------
  90. */
  91. } else if (rq->bRequest == USB_BULK_UPLOAD_ADDR) {
  92. req_state = REQ_STATUS_BULK_UPLOAD;
  93. req_addr = rq->wValue.word;
  94. req_addr = req_addr << 16;
  95. req_addr = req_addr | rq->wIndex.word;
  96. rx_remaining = rq->wLength.word;
  97. if (req_addr && req_addr % req_bank_size == 0) {
  98. #ifdef FLT_DEBUG
  99. debug_P(DEBUG_USB,
  100. PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  101. req_bank, req_addr, timer_stop());
  102. #else
  103. debug_P(DEBUG_USB,
  104. PSTR("USB_BULK_UPLOAD_ADDR: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  105. req_bank, req_addr, timer_stop_int());
  106. #endif
  107. req_bank++;
  108. timer_start();
  109. } else {
  110. sram_bulk_write_start(req_addr);
  111. }
  112. ret_len = USB_MAX_TRANS;
  113. /*
  114. * -------------------------------------------------------------------------
  115. */
  116. } else if (rq->bRequest == USB_BULK_UPLOAD_NEXT) {
  117. req_state = REQ_STATUS_BULK_UPLOAD;
  118. req_addr = rq->wValue.word;
  119. req_addr = req_addr << 16;
  120. req_addr = req_addr | rq->wIndex.word;
  121. rx_remaining = rq->wLength.word;
  122. req_percent = (uint32_t)( 100 * req_addr ) / req_addr_end;
  123. if (req_percent!=req_percent_last){
  124. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_PROGESS, req_percent);
  125. }
  126. req_percent_last = req_percent;
  127. shared_memory_scratchpad_region_save_helper(req_addr);
  128. if (req_addr && (req_addr % req_bank_size) == 0) {
  129. #ifdef FLT_DEBUG
  130. debug_P(DEBUG_USB,
  131. PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%.4f\n"),
  132. req_bank, req_addr, timer_stop());
  133. #else
  134. debug_P(DEBUG_USB,
  135. PSTR("USB_BULK_UPLOAD_NEXT: req_bank=0x%02x addr=0x%08lx time=%i\n"),
  136. req_bank, req_addr, timer_stop_int());
  137. #endif
  138. req_bank++;
  139. timer_start();
  140. shared_memory_write(SHARED_MEM_TX_CMD_BANK_CURRENT, req_bank);
  141. }
  142. ret_len = USB_MAX_TRANS;
  143. /*
  144. * -------------------------------------------------------------------------
  145. */
  146. } else if (rq->bRequest == USB_BULK_UPLOAD_END) {
  147. if (req_state != REQ_STATUS_BULK_UPLOAD) {
  148. debug_P(DEBUG_USB,
  149. PSTR("USB_BULK_UPLOAD_END: ERROR state is not REQ_STATUS_BULK_UPLOAD\n"));
  150. return 0;
  151. }
  152. debug_P(DEBUG_USB, PSTR("USB_BULK_UPLOAD_END:\n"));
  153. req_state = REQ_STATUS_IDLE;
  154. sram_bulk_write_end();
  155. shared_memory_write(SHARED_MEM_TX_CMD_UPLOAD_END, 0);
  156. ret_len = 0;
  157. /*
  158. * -------------------------------------------------------------------------
  159. */
  160. } else if (rq->bRequest == USB_CRC) {
  161. req_addr = rq->wValue.word;
  162. req_addr = req_addr << 16;
  163. req_addr = req_addr | rq->wIndex.word;
  164. debug_P(DEBUG_USB, PSTR("USB_CRC: addr=0x%08lx \n"), req_addr);
  165. crc_check_bulk_memory(0x000000, req_addr, req_bank_size);
  166. ret_len = 0;
  167. /*
  168. * -------------------------------------------------------------------------
  169. */
  170. } else if (rq->bRequest == USB_MODE_SNES) {
  171. req_state = REQ_STATUS_SNES;
  172. debug_P(DEBUG_USB, PSTR("USB_MODE_SNES:\n"));
  173. ret_len = 0;
  174. /*
  175. * -------------------------------------------------------------------------
  176. */
  177. } else if (rq->bRequest == USB_MODE_AVR) {
  178. req_state = REQ_STATUS_AVR;
  179. debug_P(DEBUG_USB, PSTR("USB_MODE_AVR:\n"));
  180. ret_len = 0;
  181. /*
  182. * -------------------------------------------------------------------------
  183. */
  184. } else if (rq->bRequest == USB_AVR_RESET) {
  185. debug_P(DEBUG_USB, PSTR("USB_AVR_RESET:\n"));
  186. soft_reset();
  187. ret_len = 0;
  188. /*
  189. * -------------------------------------------------------------------------
  190. */
  191. } else if (rq->bRequest == USB_CRC_ADDR) {
  192. req_state = REQ_STATUS_CRC;
  193. req_addr = rq->wValue.word;
  194. req_addr = req_addr << 16;
  195. req_addr = req_addr | rq->wIndex.word;
  196. debug_P(DEBUG_USB, PSTR("USB_CRC_ADDR: addr=0x%lx size=%i\n"), req_addr,
  197. rq->wLength.word);
  198. req_size = rq->wLength.word;
  199. req_size = req_size << 2;
  200. tx_remaining = 2;
  201. debug_P(DEBUG_USB, PSTR("USB_CRC_ADDR: addr=0x%lx size=%li\n"), req_addr,
  202. req_size);
  203. crc = crc_check_memory_range(req_addr, req_size, read_buffer);
  204. tx_buffer[0] = crc & 0xff;
  205. tx_buffer[1] = (crc >> 8) & 0xff;
  206. ret_len = 2;
  207. req_state = REQ_STATUS_IDLE;
  208. }
  209. usbMsgPtr = data_buffer;
  210. return ret_len; /* default for not implemented requests: return no data back to host */
  211. }
  212. /*
  213. * -------------------------------------------------------------------------
  214. */
  215. void usb_connect()
  216. {
  217. uint8_t i = 0;
  218. info_P(PSTR("USB init\n"));
  219. usbDeviceDisconnect(); /* enforce re-enumeration, do this while */
  220. cli();
  221. info_P(PSTR("USB disconnect\n"));
  222. i = 10;
  223. while (--i) { /* fake USB disconnect for > 250 ms */
  224. led_on();
  225. _delay_ms(15);
  226. led_off();
  227. _delay_ms(35);
  228. }
  229. led_on();
  230. usbDeviceConnect();
  231. info_P(PSTR("USB connect\n"));
  232. }
  233. void boot_startup_rom(uint16_t init_delay)
  234. {
  235. info_P(PSTR("Fetch loader rom\n"));
  236. info_P(PSTR("Activate AVR bus\n"));
  237. avr_bus_active();
  238. info_P(PSTR("IRQ off\n"));
  239. snes_irq_lo();
  240. snes_irq_off();
  241. snes_lorom();
  242. rle_decode(&_rom, ROM_BUFFER_SIZE, 0x000000);
  243. info_P(PSTR("\n"));
  244. #if 0
  245. dump_memory(0x010000 - 0x100, 0x010000);
  246. uint16_t crc;
  247. crc = crc_check_bulk_memory((uint32_t)0x000000,0x010000, 0x010000);
  248. info(PSTR("crc=%x\n"),crc);
  249. #endif
  250. snes_hirom();
  251. snes_wr_disable();
  252. snes_bus_active();
  253. info_P(PSTR("Activate SNES bus\n"));
  254. send_reset();
  255. _delay_ms(init_delay);
  256. }
  257. void banner(){
  258. uint8_t i;
  259. for (i=0;i<40;i++)
  260. info_P(PSTR("\n"));
  261. info_P(PSTR(" ________ .__ __ ________ ____ ________\n"));
  262. info_P(PSTR(" \\_____ \\ __ __|__| ____ | | __\\______ \\ _______ _/_ |/ _____/\n"));
  263. info_P(PSTR(" / / \\ \\| | \\ |/ ___\\| |/ / | | \\_/ __ \\ \\/ /| / __ \\ \n"));
  264. info_P(PSTR(" / \\_/. \\ | / \\ \\___| < | ` \\ ___/\\ / | \\ |__\\ \\ \n"));
  265. info_P(PSTR(" \\_____\\ \\_/____/|__|\\___ >__|_ \\/_______ /\\___ >\\_/ |___|\\_____ / \n"));
  266. info_P(PSTR(" \\__> \\/ \\/ \\/ \\/ \\/ \n"));
  267. info_P(PSTR("\n"));
  268. info_P(PSTR(" www.optixx.org\n"));
  269. info_P(PSTR("\n"));
  270. info_P(PSTR("System Hw: %s Sw: %s\n"),HW_VERSION,SW_VERSION);
  271. }
  272. void globals_init(){
  273. req_addr = 0;
  274. req_addr_end = 0;
  275. req_state = REQ_STATUS_IDLE;
  276. rx_remaining = 0;
  277. tx_remaining = 0;
  278. sync_errors = 0;
  279. }
  280. int main(void)
  281. {
  282. uart_init();
  283. stdout = &uart_stdout;
  284. banner();
  285. system_init();
  286. shared_memory_init();
  287. snes_reset_hi();
  288. snes_reset_off();
  289. irq_init();
  290. boot_startup_rom(50);
  291. globals_init();
  292. usbInit();
  293. usb_connect();
  294. while (1) {
  295. avr_bus_active();
  296. info_P(PSTR("Activate AVR bus\n"));
  297. snes_lorom();
  298. info_P(PSTR("Disable SNES WR\n"));
  299. snes_wr_disable();
  300. sei();
  301. info_P(PSTR("USB poll\n"));
  302. while (req_state != REQ_STATUS_SNES) {
  303. usbPoll();
  304. }
  305. shared_memory_write(SHARED_MEM_TX_CMD_TERMINATE, 0);
  306. #if 0
  307. shared_memory_scratchpad_region_tx_restore();
  308. shared_memory_scratchpad_region_rx_restore();
  309. #endif
  310. info_P(PSTR("-->Switch TO SNES\n"));
  311. set_rom_mode();
  312. snes_wr_disable();
  313. info_P(PSTR("Disable SNES WR\n"));
  314. snes_bus_active();
  315. info_P(PSTR("Activate SNES bus\n"));
  316. irq_stop();
  317. send_reset();
  318. info_P(PSTR("Poll USB\n"));
  319. while ((req_state != REQ_STATUS_AVR)) {
  320. usbPoll();
  321. }
  322. info_P(PSTR("-->Switch TO AVR\n"));
  323. shared_memory_init();
  324. irq_init();
  325. boot_startup_rom(500);
  326. }
  327. return 0;
  328. }