op_misc.cpp 9.1 KB

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  1. #ifdef SCPU_CPP
  2. //nop
  3. case 0xea: {
  4. last_cycle();
  5. op_io_irq();
  6. } break;
  7. //wdm
  8. case 0x42: {
  9. last_cycle();
  10. op_readpc();
  11. } break;
  12. //xba
  13. case 0xeb: {
  14. op_io();
  15. last_cycle();
  16. op_io();
  17. regs.a.l ^= regs.a.h;
  18. regs.a.h ^= regs.a.l;
  19. regs.a.l ^= regs.a.h;
  20. regs.p.n = !!(regs.a.l & 0x80);
  21. regs.p.z = (regs.a.l == 0);
  22. } break;
  23. //mvn
  24. case 0x54: {
  25. dp = op_readpc();
  26. sp = op_readpc();
  27. regs.db = dp;
  28. rd.l = op_readlong((sp << 16) | regs.x.w);
  29. op_writelong((dp << 16) | regs.y.w, rd.l);
  30. op_io();
  31. if(regs.p.x) {
  32. regs.x.l ++;
  33. regs.y.l ++;
  34. } else {
  35. regs.x.w ++;
  36. regs.y.w ++;
  37. }
  38. last_cycle();
  39. op_io();
  40. if(regs.a.w--) regs.pc.w -= 3;
  41. } break;
  42. //mvp
  43. case 0x44: {
  44. dp = op_readpc();
  45. sp = op_readpc();
  46. regs.db = dp;
  47. rd.l = op_readlong((sp << 16) | regs.x.w);
  48. op_writelong((dp << 16) | regs.y.w, rd.l);
  49. op_io();
  50. if(regs.p.x) {
  51. regs.x.l --;
  52. regs.y.l --;
  53. } else {
  54. regs.x.w --;
  55. regs.y.w --;
  56. }
  57. last_cycle();
  58. op_io();
  59. if(regs.a.w--) regs.pc.w -= 3;
  60. } break;
  61. //brk
  62. case 0x00: {
  63. op_readpc();
  64. if(!regs.e) op_writestack(regs.pc.b);
  65. op_writestack(regs.pc.h);
  66. op_writestack(regs.pc.l);
  67. op_writestack(regs.p);
  68. rd.l = op_readlong(regs.e ? 0xfffe : 0xffe6);
  69. regs.pc.b = 0x00;
  70. regs.p.i = 1;
  71. regs.p.d = 0;
  72. last_cycle();
  73. rd.h = op_readlong(regs.e ? 0xffff : 0xffe7);
  74. regs.pc.w = rd.w;
  75. } break;
  76. //cop
  77. case 0x02: {
  78. op_readpc();
  79. if(!regs.e) op_writestack(regs.pc.b);
  80. op_writestack(regs.pc.h);
  81. op_writestack(regs.pc.l);
  82. op_writestack(regs.p);
  83. rd.l = op_readlong(regs.e ? 0xfff4 : 0xffe4);
  84. regs.pc.b = 0x00;
  85. regs.p.i = 1;
  86. regs.p.d = 0;
  87. last_cycle();
  88. rd.h = op_readlong(regs.e ? 0xfff5 : 0xffe5);
  89. regs.pc.w = rd.w;
  90. } break;
  91. //stp
  92. case 0xdb: {
  93. op_io();
  94. last_cycle();
  95. while(true) op_io();
  96. } break;
  97. //wai
  98. case 0xcb: {
  99. //last_cycle() will clear status.wai_lock once an NMI / IRQ edge is reached
  100. status.wai_lock = true;
  101. while(status.wai_lock) {
  102. last_cycle();
  103. op_io();
  104. }
  105. op_io();
  106. } break;
  107. //xce
  108. case 0xfb: {
  109. last_cycle();
  110. op_io_irq();
  111. bool carry = regs.p.c;
  112. regs.p.c = regs.e;
  113. regs.e = carry;
  114. if(regs.e) {
  115. regs.p |= 0x30;
  116. regs.s.h = 0x01;
  117. }
  118. if(regs.p.x) {
  119. regs.x.h = 0x00;
  120. regs.y.h = 0x00;
  121. }
  122. } break;
  123. //clc
  124. case 0x18: {
  125. last_cycle();
  126. op_io_irq();
  127. regs.p.c = 0;
  128. } break;
  129. //cld
  130. case 0xd8: {
  131. last_cycle();
  132. op_io_irq();
  133. regs.p.d = 0;
  134. } break;
  135. //cli
  136. case 0x58: {
  137. last_cycle();
  138. op_io_irq();
  139. regs.p.i = 0;
  140. } break;
  141. //clv
  142. case 0xb8: {
  143. last_cycle();
  144. op_io_irq();
  145. regs.p.v = 0;
  146. } break;
  147. //sec
  148. case 0x38: {
  149. last_cycle();
  150. op_io_irq();
  151. regs.p.c = 1;
  152. } break;
  153. //sed
  154. case 0xf8: {
  155. last_cycle();
  156. op_io_irq();
  157. regs.p.d = 1;
  158. } break;
  159. //sei
  160. case 0x78: {
  161. last_cycle();
  162. op_io_irq();
  163. regs.p.i = 1;
  164. } break;
  165. //rep
  166. case 0xc2: {
  167. rd.l = op_readpc();
  168. last_cycle();
  169. op_io();
  170. regs.p &=~ rd.l;
  171. if(regs.e) regs.p |= 0x30;
  172. if(regs.p.x) {
  173. regs.x.h = 0x00;
  174. regs.y.h = 0x00;
  175. }
  176. } break;
  177. //sep
  178. case 0xe2: {
  179. rd.l = op_readpc();
  180. last_cycle();
  181. op_io();
  182. regs.p |= rd.l;
  183. if(regs.e) regs.p |= 0x30;
  184. if(regs.p.x) {
  185. regs.x.h = 0x00;
  186. regs.y.h = 0x00;
  187. }
  188. } break;
  189. //tax
  190. case 0xaa: {
  191. last_cycle();
  192. op_io_irq();
  193. if(regs.p.x) {
  194. regs.x.l = regs.a.l;
  195. regs.p.n = !!(regs.x.l & 0x80);
  196. regs.p.z = (regs.x.l == 0);
  197. } else {
  198. regs.x.w = regs.a.w;
  199. regs.p.n = !!(regs.x.w & 0x8000);
  200. regs.p.z = (regs.x.w == 0);
  201. }
  202. } break;
  203. //tay
  204. case 0xa8: {
  205. last_cycle();
  206. op_io_irq();
  207. if(regs.p.x) {
  208. regs.y.l = regs.a.l;
  209. regs.p.n = !!(regs.y.l & 0x80);
  210. regs.p.z = (regs.y.l == 0);
  211. } else {
  212. regs.y.w = regs.a.w;
  213. regs.p.n = !!(regs.y.w & 0x8000);
  214. regs.p.z = (regs.y.w == 0);
  215. }
  216. } break;
  217. //txa
  218. case 0x8a: {
  219. last_cycle();
  220. op_io_irq();
  221. if(regs.p.m) {
  222. regs.a.l = regs.x.l;
  223. regs.p.n = !!(regs.a.l & 0x80);
  224. regs.p.z = (regs.a.l == 0);
  225. } else {
  226. regs.a.w = regs.x.w;
  227. regs.p.n = !!(regs.a.w & 0x8000);
  228. regs.p.z = (regs.a.w == 0);
  229. }
  230. } break;
  231. //txy
  232. case 0x9b: {
  233. last_cycle();
  234. op_io_irq();
  235. if(regs.p.x) {
  236. regs.y.l = regs.x.l;
  237. regs.p.n = !!(regs.y.l & 0x80);
  238. regs.p.z = (regs.y.l == 0);
  239. } else {
  240. regs.y.w = regs.x.w;
  241. regs.p.n = !!(regs.y.w & 0x8000);
  242. regs.p.z = (regs.y.w == 0);
  243. }
  244. } break;
  245. //tya
  246. case 0x98: {
  247. last_cycle();
  248. op_io_irq();
  249. if(regs.p.m) {
  250. regs.a.l = regs.y.l;
  251. regs.p.n = !!(regs.a.l & 0x80);
  252. regs.p.z = (regs.a.l == 0);
  253. } else {
  254. regs.a.w = regs.y.w;
  255. regs.p.n = !!(regs.a.w & 0x8000);
  256. regs.p.z = (regs.a.w == 0);
  257. }
  258. } break;
  259. //tyx
  260. case 0xbb: {
  261. last_cycle();
  262. op_io_irq();
  263. if(regs.p.x) {
  264. regs.x.l = regs.y.l;
  265. regs.p.n = !!(regs.x.l & 0x80);
  266. regs.p.z = (regs.x.l == 0);
  267. } else {
  268. regs.x.w = regs.y.w;
  269. regs.p.n = !!(regs.x.w & 0x8000);
  270. regs.p.z = (regs.x.w == 0);
  271. }
  272. } break;
  273. //tcd
  274. case 0x5b: {
  275. last_cycle();
  276. op_io_irq();
  277. regs.d.w = regs.a.w;
  278. regs.p.n = !!(regs.d.w & 0x8000);
  279. regs.p.z = (regs.d.w == 0);
  280. } break;
  281. //tcs
  282. case 0x1b: {
  283. last_cycle();
  284. op_io_irq();
  285. regs.s.w = regs.a.w;
  286. if(regs.e) regs.s.h = 0x01;
  287. } break;
  288. //tdc
  289. case 0x7b: {
  290. last_cycle();
  291. op_io_irq();
  292. regs.a.w = regs.d.w;
  293. regs.p.n = !!(regs.a.w & 0x8000);
  294. regs.p.z = (regs.a.w == 0);
  295. } break;
  296. //tsc
  297. case 0x3b: {
  298. last_cycle();
  299. op_io_irq();
  300. regs.a.w = regs.s.w;
  301. if(regs.e) {
  302. regs.p.n = !!(regs.a.l & 0x80);
  303. regs.p.z = (regs.a.l == 0);
  304. } else {
  305. regs.p.n = !!(regs.a.w & 0x8000);
  306. regs.p.z = (regs.a.w == 0);
  307. }
  308. } break;
  309. //tsx
  310. case 0xba: {
  311. last_cycle();
  312. op_io_irq();
  313. if(regs.p.x) {
  314. regs.x.l = regs.s.l;
  315. regs.p.n = !!(regs.x.l & 0x80);
  316. regs.p.z = (regs.x.l == 0);
  317. } else {
  318. regs.x.w = regs.s.w;
  319. regs.p.n = !!(regs.x.w & 0x8000);
  320. regs.p.z = (regs.x.w == 0);
  321. }
  322. } break;
  323. //txs
  324. case 0x9a: {
  325. last_cycle();
  326. op_io_irq();
  327. if(regs.e) {
  328. regs.s.l = regs.x.l;
  329. } else {
  330. regs.s.w = regs.x.w;
  331. }
  332. } break;
  333. //pha
  334. case 0x48: {
  335. op_io();
  336. if(!regs.p.m)op_writestack(regs.a.h);
  337. last_cycle();
  338. op_writestack(regs.a.l);
  339. } break;
  340. //phx
  341. case 0xda: {
  342. op_io();
  343. if(!regs.p.x)op_writestack(regs.x.h);
  344. last_cycle();
  345. op_writestack(regs.x.l);
  346. } break;
  347. //phy
  348. case 0x5a: {
  349. op_io();
  350. if(!regs.p.x)op_writestack(regs.y.h);
  351. last_cycle();
  352. op_writestack(regs.y.l);
  353. } break;
  354. //phd
  355. case 0x0b: {
  356. op_io();
  357. op_writestackn(regs.d.h);
  358. last_cycle();
  359. op_writestackn(regs.d.l);
  360. if(regs.e) regs.s.h = 0x01;
  361. } break;
  362. //phb
  363. case 0x8b: {
  364. op_io();
  365. last_cycle();
  366. op_writestack(regs.db);
  367. } break;
  368. //phk
  369. case 0x4b: {
  370. op_io();
  371. last_cycle();
  372. op_writestack(regs.pc.b);
  373. } break;
  374. //php
  375. case 0x08: {
  376. op_io();
  377. last_cycle();
  378. op_writestack(regs.p);
  379. } break;
  380. //pla
  381. case 0x68: {
  382. op_io();
  383. op_io();
  384. if(regs.p.m)last_cycle();
  385. regs.a.l = op_readstack();
  386. if(regs.p.m) {
  387. regs.p.n = !!(regs.a.l & 0x80);
  388. regs.p.z = (regs.a.l == 0);
  389. break;
  390. }
  391. last_cycle();
  392. regs.a.h = op_readstack();
  393. regs.p.n = !!(regs.a.w & 0x8000);
  394. regs.p.z = (regs.a.w == 0);
  395. } break;
  396. //plx
  397. case 0xfa: {
  398. op_io();
  399. op_io();
  400. if(regs.p.x)last_cycle();
  401. regs.x.l = op_readstack();
  402. if(regs.p.x) {
  403. regs.p.n = !!(regs.x.l & 0x80);
  404. regs.p.z = (regs.x.l == 0);
  405. break;
  406. }
  407. last_cycle();
  408. regs.x.h = op_readstack();
  409. regs.p.n = !!(regs.x.w & 0x8000);
  410. regs.p.z = (regs.x.w == 0);
  411. } break;
  412. //ply
  413. case 0x7a: {
  414. op_io();
  415. op_io();
  416. if(regs.p.x)last_cycle();
  417. regs.y.l = op_readstack();
  418. if(regs.p.x) {
  419. regs.p.n = !!(regs.y.l & 0x80);
  420. regs.p.z = (regs.y.l == 0);
  421. break;
  422. }
  423. last_cycle();
  424. regs.y.h = op_readstack();
  425. regs.p.n = !!(regs.y.w & 0x8000);
  426. regs.p.z = (regs.y.w == 0);
  427. } break;
  428. //pld
  429. case 0x2b: {
  430. op_io();
  431. op_io();
  432. regs.d.l = op_readstackn();
  433. last_cycle();
  434. regs.d.h = op_readstackn();
  435. regs.p.n = !!(regs.d.w & 0x8000);
  436. regs.p.z = (regs.d.w == 0);
  437. if(regs.e) regs.s.h = 0x01;
  438. } break;
  439. //plb
  440. case 0xab: {
  441. op_io();
  442. op_io();
  443. last_cycle();
  444. regs.db = op_readstack();
  445. regs.p.n = !!(regs.db & 0x80);
  446. regs.p.z = (regs.db == 0);
  447. } break;
  448. //plp
  449. case 0x28: {
  450. op_io();
  451. op_io();
  452. last_cycle();
  453. regs.p = op_readstack();
  454. if(regs.e) regs.p |= 0x30;
  455. if(regs.p.x) {
  456. regs.x.h = 0x00;
  457. regs.y.h = 0x00;
  458. }
  459. } break;
  460. //pea
  461. case 0xf4: {
  462. aa.l = op_readpc();
  463. aa.h = op_readpc();
  464. op_writestackn(aa.h);
  465. last_cycle();
  466. op_writestackn(aa.l);
  467. if(regs.e) regs.s.h = 0x01;
  468. } break;
  469. //pei
  470. case 0xd4: {
  471. dp = op_readpc();
  472. op_io_cond2();
  473. aa.l = op_readdp(dp);
  474. aa.h = op_readdp(dp + 1);
  475. op_writestackn(aa.h);
  476. last_cycle();
  477. op_writestackn(aa.l);
  478. if(regs.e) regs.s.h = 0x01;
  479. } break;
  480. //per
  481. case 0x62: {
  482. aa.l = op_readpc();
  483. aa.h = op_readpc();
  484. op_io();
  485. rd.w = regs.pc.d + (int16)aa.w;
  486. op_writestackn(rd.h);
  487. last_cycle();
  488. op_writestackn(rd.l);
  489. if(regs.e) regs.s.h = 0x01;
  490. } break;
  491. #endif