core.cpp 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990
  1. #ifdef SCPU_CPP
  2. #include "opfn.cpp"
  3. void sCPU::enter() {
  4. initialize:
  5. //initial latch values for $213c/$213d
  6. //[x]0035 : [y]0000 (53.0 -> 212) [lda $2137]
  7. //[x]0038 : [y]0000 (56.5 -> 226) [nop : lda $2137]
  8. add_clocks(186);
  9. loop:
  10. if(status.interrupt_pending) {
  11. status.interrupt_pending = false;
  12. if(status.nmi_pending) {
  13. status.nmi_pending = false;
  14. status.interrupt_vector = (regs.e == false ? 0xffea : 0xfffa);
  15. } else if(status.irq_pending) {
  16. status.irq_pending = false;
  17. status.interrupt_vector = (regs.e == false ? 0xffee : 0xfffe);
  18. }
  19. op_irq();
  20. }
  21. tracer.trace_cpuop(); //traces CPU opcode (only if tracer is enabled)
  22. status.in_opcode = true;
  23. switch(op_readpc()) {
  24. #include "op_read.cpp"
  25. #include "op_write.cpp"
  26. #include "op_rmw.cpp"
  27. #include "op_pc.cpp"
  28. #include "op_misc.cpp"
  29. }
  30. status.in_opcode = false;
  31. goto loop;
  32. }
  33. void sCPU::op_irq() {
  34. op_read(regs.pc.d);
  35. op_io();
  36. if(!regs.e) op_writestack(regs.pc.b);
  37. op_writestack(regs.pc.h);
  38. op_writestack(regs.pc.l);
  39. op_writestack(regs.e ? (regs.p & ~0x10) : regs.p);
  40. rd.l = op_read(status.interrupt_vector + 0);
  41. regs.pc.b = 0x00;
  42. regs.p.i = 1;
  43. regs.p.d = 0;
  44. rd.h = op_read(status.interrupt_vector + 1);
  45. regs.pc.w = rd.w;
  46. }
  47. //immediate, 2-cycle opcodes with I/O cycle will become bus read
  48. //when an IRQ is to be triggered immediately after opcode completion
  49. //this affects the following opcodes:
  50. // clc, cld, cli, clv, sec, sed, sei,
  51. // tax, tay, txa, txy, tya, tyx,
  52. // tcd, tcs, tdc, tsc, tsx, txs,
  53. // inc, inx, iny, dec, dex, dey,
  54. // asl, lsr, rol, ror, nop, xce.
  55. alwaysinline void sCPU::op_io_irq() {
  56. if(status.interrupt_pending) {
  57. //IRQ pending, modify I/O cycle to bus read cycle, do not increment PC
  58. op_read(regs.pc.d);
  59. } else {
  60. op_io();
  61. }
  62. }
  63. alwaysinline void sCPU::op_io_cond2() {
  64. if(regs.d.l != 0x00) {
  65. op_io();
  66. }
  67. }
  68. alwaysinline void sCPU::op_io_cond4(uint16 x, uint16 y) {
  69. if(!regs.p.x || (x & 0xff00) != (y & 0xff00)) {
  70. op_io();
  71. }
  72. }
  73. alwaysinline void sCPU::op_io_cond6(uint16 addr) {
  74. if(regs.e && (regs.pc.w & 0xff00) != (addr & 0xff00)) {
  75. op_io();
  76. }
  77. }
  78. #endif