obc1.cpp 2.3 KB

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  1. #include <../base.hpp>
  2. #include <../cart/cart.hpp>
  3. #include "obc1.hpp"
  4. void OBC1::init() {}
  5. void OBC1::enable() {}
  6. void OBC1::power() {
  7. reset();
  8. }
  9. void OBC1::reset() {
  10. for(unsigned i = 0x0000; i <= 0x1fff; i++) ram_write(i, 0xff);
  11. status.baseptr = (ram_read(0x1ff5) & 1) ? 0x1800 : 0x1c00;
  12. status.address = (ram_read(0x1ff6) & 0x7f);
  13. status.shift = (ram_read(0x1ff6) & 3) << 1;
  14. }
  15. uint8 OBC1::read(unsigned addr) {
  16. addr &= 0x1fff;
  17. if((addr & 0x1ff8) != 0x1ff0) return ram_read(addr);
  18. switch(addr) { default: //never used, avoids compiler warning
  19. case 0x1ff0: return ram_read(status.baseptr + (status.address << 2) + 0);
  20. case 0x1ff1: return ram_read(status.baseptr + (status.address << 2) + 1);
  21. case 0x1ff2: return ram_read(status.baseptr + (status.address << 2) + 2);
  22. case 0x1ff3: return ram_read(status.baseptr + (status.address << 2) + 3);
  23. case 0x1ff4: return ram_read(status.baseptr + (status.address >> 2) + 0x200);
  24. case 0x1ff5: case 0x1ff6: case 0x1ff7: return ram_read(addr);
  25. }
  26. }
  27. void OBC1::write(unsigned addr, uint8 data) {
  28. addr &= 0x1fff;
  29. if((addr & 0x1ff8) != 0x1ff0) return ram_write(addr, data);
  30. switch(addr) {
  31. case 0x1ff0: ram_write(status.baseptr + (status.address << 2) + 0, data); break;
  32. case 0x1ff1: ram_write(status.baseptr + (status.address << 2) + 1, data); break;
  33. case 0x1ff2: ram_write(status.baseptr + (status.address << 2) + 2, data); break;
  34. case 0x1ff3: ram_write(status.baseptr + (status.address << 2) + 3, data); break;
  35. case 0x1ff4: {
  36. uint8 temp = ram_read(status.baseptr + (status.address >> 2) + 0x200);
  37. temp = (temp & ~(3 << status.shift)) | ((data & 3) << status.shift);
  38. ram_write(status.baseptr + (status.address >> 2) + 0x200, temp);
  39. } break;
  40. case 0x1ff5: {
  41. status.baseptr = (data & 1) ? 0x1800 : 0x1c00;
  42. ram_write(addr, data);
  43. } break;
  44. case 0x1ff6: {
  45. status.address = (data & 0x7f);
  46. status.shift = (data & 3) << 1;
  47. ram_write(addr, data);
  48. } break;
  49. case 0x1ff7: {
  50. ram_write(addr, data);
  51. } break;
  52. }
  53. }
  54. uint8 OBC1::ram_read(unsigned addr) {
  55. return memory::cartram.read(addr & 0x1fff);
  56. }
  57. void OBC1::ram_write(unsigned addr, uint8 data) {
  58. memory::cartram.write(addr & 0x1fff, data);
  59. }
  60. OBC1::OBC1() {}
  61. OBC1::~OBC1() {}