top.v 17 KB

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  1. module bidir_io(
  2. input dir,
  3. input d,
  4. inout port);
  5. assign port = (dir) ? 1'bz : d;
  6. endmodule
  7. module saturating_adder(
  8. input [7:0] a,
  9. input [7:0] b,
  10. input [7:0] c,
  11. input [7:0] d,
  12. input [7:0] e,
  13. input [7:0] f,
  14. input [7:0] g,
  15. input [7:0] h,
  16. input [7:0] i,
  17. output [7:0] sum);
  18. wire [10:0] fullsum = a + b + c + d + e + f + g + h + i;
  19. assign sum = |fullsum[10:8] ? 255 : fullsum[7:0];
  20. endmodule
  21. module partial(
  22. input [7:0] original,
  23. input alpha,
  24. input [2:0] scale, // by quarters
  25. output [7:0] result
  26. );
  27. assign result = alpha ? ((scale[0] ? original[7:2] : 0) +
  28. (scale[1] ? original[7:1] : 0) +
  29. (scale[2] ? original : 0)) : 0;
  30. endmodule
  31. module lfsre(
  32. input clk,
  33. output reg [16:0] lfsr);
  34. wire d0;
  35. xnor(d0,lfsr[16],lfsr[13]);
  36. always @(posedge clk) begin
  37. lfsr <= {lfsr[15:0],d0};
  38. end
  39. endmodule
  40. module sprite(
  41. pixel_clk,
  42. picsel,
  43. pixel_x,
  44. pixel_y,
  45. sx, sy,
  46. write_data, write_address, write_en, write_clk,
  47. brightness,
  48. alpha
  49. );
  50. input pixel_clk;
  51. input picsel;
  52. input [9:0] pixel_x;
  53. input [9:0] pixel_y;
  54. input [9:0] sx;
  55. input [9:0] sy;
  56. input [8:0] write_data;
  57. input [11:0] write_address;
  58. input write_en;
  59. input write_clk;
  60. output alpha;
  61. output [7:0] brightness;
  62. wire [9:0] local_x = pixel_x - sx;
  63. wire [9:0] local_y = pixel_y - sy;
  64. wire [7:0] sprite_pixel;
  65. RAMB16_S9_S9 spriteram(
  66. .DIA(0),
  67. // .DIPA(0),
  68. .DOA(sprite_pixel),
  69. .WEA(0),
  70. .ENA(1),
  71. .CLKA(pixel_clk),
  72. .ADDRA({picsel, local_y[4:0], local_x[4:0]}),
  73. .ADDRB(write_address),
  74. .DIPB(write_data[8]),
  75. .DIB(write_data),
  76. .WEB(write_en),
  77. .ENB(1),
  78. .CLKB(write_clk),
  79. .DOB());
  80. wire sprite_outside = |(local_y[9:5]) | |(local_x[9:5]);
  81. wire alpha = ~sprite_outside;
  82. wire [7:0] brightness = sprite_pixel; // sprite_outside ? 0 : sprite_pixel;
  83. endmodule
  84. module top(
  85. // Outputs
  86. // s, // Onboard LED
  87. RS232_TXD, // RS232 transmit
  88. RESET_TRIGGER, // RESET-TRIGGER#
  89. // Inputs
  90. clka,
  91. pb_a, pb_d, pb_rd_n, pb_wr_n,
  92. ether_cs_n, ether_aen, ether_bhe_n, ether_clk, ether_irq, ether_rdy,
  93. // Flash
  94. flash_a, flash_d,
  95. flash_ce_n, flash_oe_n, flash_we_n, flash_byte_n, flash_rdy, flash_rst_n,
  96. // PS/2 Keyboard
  97. ps2_clk, ps2_dat,
  98. // Pushbuttons
  99. sw2_n, sw3_n,
  100. // VGA
  101. vga_red, vga_green, vga_blue, vga_hsync_n, vga_vsync_n,
  102. );
  103. // output [7:0] s;
  104. output RS232_TXD;
  105. output RESET_TRIGGER;
  106. inout [4:0] pb_a;
  107. output ether_cs_n;
  108. output ether_aen;
  109. output ether_bhe_n;
  110. output pb_rd_n;
  111. output pb_wr_n;
  112. input clka;
  113. input ether_clk;
  114. input ether_irq;
  115. input ether_rdy;
  116. inout [15:0] pb_d;
  117. output [19:0] flash_a;
  118. inout [15:0] flash_d;
  119. output flash_ce_n;
  120. output flash_oe_n;
  121. output flash_we_n;
  122. output flash_byte_n;
  123. output flash_rdy;
  124. output flash_rst_n;
  125. reg ps2_clk_dir;
  126. reg ps2_dat_dir;
  127. reg ps2_clk_d;
  128. reg ps2_dat_d;
  129. inout ps2_clk;
  130. inout ps2_dat;
  131. bidir_io ps2_clkb(.dir(ps2_clk_dir), .d(ps2_clk_d), .port(ps2_clk));
  132. bidir_io ps2_datb(.dir(ps2_dat_dir), .d(ps2_dat_d), .port(ps2_dat));
  133. input sw2_n;
  134. input sw3_n;
  135. output [2:0] vga_red;
  136. output [2:0] vga_green;
  137. output [2:0] vga_blue;
  138. output vga_hsync_n;
  139. output vga_vsync_n;
  140. wire j1_io_rd;
  141. wire j1_io_wr;
  142. wire [15:0] j1_io_addr;
  143. reg [15:0] j1_io_din;
  144. wire [15:0] j1_io_dout;
  145. wire sys_clk;
  146. ck_div #(.DIV_BY(12), .MULT_BY(4)) sys_ck_gen(.ck_in(clka), .ck_out(sys_clk));
  147. // ================================================
  148. // Hardware multiplier
  149. reg [15:0] mult_a;
  150. reg [15:0] mult_b;
  151. wire [31:0] mult_p;
  152. MULT18X18 mulinsn(.A(mult_a), .B(mult_b), .P(mult_p));
  153. // MULT18X18SIO #(
  154. // .AREG(0),
  155. // .BREG(0),
  156. // .PREG(0))
  157. // MULT18X18SIO(
  158. // .A(mult_a),
  159. // .B(mult_b),
  160. // .P(mult_p));
  161. // ================================================
  162. // 32-bit 1-MHz system clock
  163. reg [5:0] clockus;
  164. wire [5:0] _clockus = (clockus == 32) ? 0 : (clockus + 1);
  165. reg [31:0] clock;
  166. wire [31:0] _clock = (clockus == 32) ? (clock + 1) : (clock);
  167. always @(posedge sys_clk)
  168. begin
  169. clockus <= _clockus;
  170. clock <= _clock;
  171. end
  172. // reg [7:0] s;
  173. reg RS232_TXD;
  174. reg RESET_TRIGGER;
  175. reg ether_cs_n;
  176. reg ether_aen;
  177. reg ether_bhe_n;
  178. reg ddir;
  179. reg [15:0] pb_dout;
  180. assign pb_d = (ddir) ? 16'bz : pb_dout;
  181. reg pb_rd_n;
  182. reg pb_wr_n;
  183. reg pb_a_dir;
  184. reg [4:0] pb_aout;
  185. assign pb_a = pb_a_dir ? 5'bz : pb_aout;
  186. reg flash_ddir;
  187. reg [19:0] flash_a;
  188. reg [15:0] flash_dout;
  189. assign flash_d[14:0] = (flash_ddir) ? 15'bz : flash_dout[14:0];
  190. assign flash_d[15] = (flash_ddir & flash_byte_n) ? 1'bz : flash_dout[15];
  191. reg flash_ce_n;
  192. reg flash_oe_n;
  193. reg flash_we_n;
  194. reg flash_byte_n;
  195. reg flash_rdy;
  196. reg flash_rst_n;
  197. reg [12:0] vga_scroll;
  198. reg [13:0] vga_spritea;
  199. reg [9:0] vga_spritex[7:0];
  200. reg [9:0] vga_spritey[7:0];
  201. reg vga_addsprites;
  202. reg [10:0] vga_spritec0;
  203. reg [10:0] vga_spritec1;
  204. reg [10:0] vga_spritec2;
  205. reg [10:0] vga_spritec3;
  206. reg [10:0] vga_spritec4;
  207. reg [10:0] vga_spritec5;
  208. reg [10:0] vga_spritec6;
  209. reg [10:0] vga_spritec7;
  210. wire [9:0] vga_line;
  211. reg [7:0] vga_spritesel;
  212. always @(posedge sys_clk)
  213. begin
  214. if (j1_io_wr) begin
  215. case (j1_io_addr)
  216. // 16'h4000: s <= j1_io_dout;
  217. 16'h4100: flash_ddir <= j1_io_dout;
  218. 16'h4102: flash_ce_n <= j1_io_dout;
  219. 16'h4104: flash_oe_n <= j1_io_dout;
  220. 16'h4106: flash_we_n <= j1_io_dout;
  221. 16'h4108: flash_byte_n <= j1_io_dout;
  222. 16'h410a: flash_rdy <= j1_io_dout;
  223. 16'h410c: flash_rst_n <= j1_io_dout;
  224. 16'h410e: flash_a[15:0] <= j1_io_dout;
  225. 16'h4110: flash_a[19:16] <= j1_io_dout;
  226. 16'h4112: flash_dout <= j1_io_dout;
  227. 16'h4200: ps2_clk_d <= j1_io_dout;
  228. 16'h4202: ps2_dat_d <= j1_io_dout;
  229. 16'h4204: ps2_clk_dir <= j1_io_dout;
  230. 16'h4206: ps2_dat_dir <= j1_io_dout;
  231. 16'h4300: vga_scroll <= j1_io_dout;
  232. 16'h4302: vga_spritea <= j1_io_dout;
  233. // 16'h4304: vga_spriteport
  234. 16'h4308: vga_addsprites <= j1_io_dout;
  235. 16'h4400: vga_spritex[0] <= j1_io_dout;
  236. 16'h4402: vga_spritey[0] <= j1_io_dout;
  237. 16'h4404: vga_spritex[1] <= j1_io_dout;
  238. 16'h4406: vga_spritey[1] <= j1_io_dout;
  239. 16'h4408: vga_spritex[2] <= j1_io_dout;
  240. 16'h440a: vga_spritey[2] <= j1_io_dout;
  241. 16'h440c: vga_spritex[3] <= j1_io_dout;
  242. 16'h440e: vga_spritey[3] <= j1_io_dout;
  243. 16'h4410: vga_spritex[4] <= j1_io_dout;
  244. 16'h4412: vga_spritey[4] <= j1_io_dout;
  245. 16'h4414: vga_spritex[5] <= j1_io_dout;
  246. 16'h4416: vga_spritey[5] <= j1_io_dout;
  247. 16'h4418: vga_spritex[6] <= j1_io_dout;
  248. 16'h441a: vga_spritey[6] <= j1_io_dout;
  249. 16'h441c: vga_spritex[7] <= j1_io_dout;
  250. 16'h441e: vga_spritey[7] <= j1_io_dout;
  251. 16'h4420: vga_spritec0 <= j1_io_dout;
  252. 16'h4422: vga_spritec1 <= j1_io_dout;
  253. 16'h4424: vga_spritec2 <= j1_io_dout;
  254. 16'h4426: vga_spritec3 <= j1_io_dout;
  255. 16'h4428: vga_spritec4 <= j1_io_dout;
  256. 16'h442a: vga_spritec5 <= j1_io_dout;
  257. 16'h442c: vga_spritec6 <= j1_io_dout;
  258. 16'h442e: vga_spritec7 <= j1_io_dout;
  259. 16'h4430: vga_spritesel[0] <= j1_io_dout;
  260. 16'h4432: vga_spritesel[1] <= j1_io_dout;
  261. 16'h4434: vga_spritesel[2] <= j1_io_dout;
  262. 16'h4436: vga_spritesel[3] <= j1_io_dout;
  263. 16'h4438: vga_spritesel[4] <= j1_io_dout;
  264. 16'h443a: vga_spritesel[5] <= j1_io_dout;
  265. 16'h443c: vga_spritesel[6] <= j1_io_dout;
  266. 16'h443e: vga_spritesel[7] <= j1_io_dout;
  267. 16'h5000: RS232_TXD <= j1_io_dout;
  268. 16'h5001: RESET_TRIGGER <= j1_io_dout;
  269. 16'h5100: ether_cs_n <= j1_io_dout;
  270. 16'h5101: ether_aen <= j1_io_dout;
  271. 16'h5102: ether_bhe_n <= j1_io_dout;
  272. 16'h5103: pb_aout <= j1_io_dout;
  273. 16'h5104: ddir <= j1_io_dout;
  274. 16'h5105: pb_dout <= j1_io_dout;
  275. 16'h5106: pb_rd_n <= j1_io_dout;
  276. 16'h5107: pb_wr_n <= j1_io_dout;
  277. // 5108
  278. // 5109
  279. 16'h510a: pb_a_dir <= j1_io_dout;
  280. 16'h6100: mult_a <= j1_io_dout;
  281. 16'h6102: mult_b <= j1_io_dout;
  282. endcase
  283. end
  284. end
  285. always @*
  286. begin
  287. case (j1_io_addr)
  288. 16'h4112: j1_io_din = flash_d;
  289. 16'h4200: j1_io_din = ps2_clk;
  290. 16'h4202: j1_io_din = ps2_dat;
  291. 16'h4300: j1_io_din = vga_scroll;
  292. 16'h4306: j1_io_din = vga_line;
  293. 16'h4500: j1_io_din = sw2_n;
  294. 16'h4502: j1_io_din = sw3_n;
  295. 16'h5103: j1_io_din = pb_a;
  296. 16'h5105: j1_io_din = pb_d;
  297. 16'h5108: j1_io_din = ether_rdy;
  298. 16'h5109: j1_io_din = ether_irq;
  299. 16'h6000: j1_io_din = clock[15:0];
  300. 16'h6002: j1_io_din = clock[31:16];
  301. 16'h6104: j1_io_din = mult_p[15:0];
  302. 16'h6106: j1_io_din = mult_p[31:16];
  303. default: j1_io_din = 16'h0946;
  304. endcase
  305. end
  306. reg [10:0] reset_count = 1000;
  307. wire sys_rst_i = |reset_count;
  308. always @(posedge sys_clk) begin
  309. if (sys_rst_i)
  310. reset_count <= reset_count - 1;
  311. end
  312. j1 j1(
  313. // Inputs
  314. .sys_clk_i (sys_clk),
  315. .sys_rst_i (sys_rst_i),
  316. .io_rd(j1_io_rd),
  317. .io_wr(j1_io_wr),
  318. .io_addr(j1_io_addr),
  319. .io_din(j1_io_din),
  320. .io_dout(j1_io_dout)
  321. );
  322. /*
  323. uart uart(
  324. // Outputs
  325. .uart_busy (uart_busy),
  326. .uart_tx (RS232_TXD),
  327. // Inputs
  328. .uart_wr_i (j1_uart_we),
  329. .uart_dat_i (j1_io_dout),
  330. .sys_clk_i (sys_clk_i),
  331. .sys_rst_i (sys_rst_i));
  332. */
  333. // ================================================
  334. // VGA
  335. wire vga_clk;
  336. ck_div #(.DIV_BY(4), .MULT_BY(2)) vga_ck_gen(.ck_in(clka), .ck_out(vga_clk));
  337. reg [10:0] CounterX;
  338. reg [9:0] CounterY;
  339. wire CounterXmaxed = (CounterX==1040);
  340. always @(posedge vga_clk)
  341. if(CounterXmaxed)
  342. CounterX <= 0;
  343. else
  344. CounterX <= CounterX + 1;
  345. wire [9:0] _CounterY = (CounterY == 666) ? 0 : (CounterY + 1);
  346. always @(posedge vga_clk)
  347. if(CounterXmaxed)
  348. CounterY <= _CounterY;
  349. reg vga_HS, vga_VS;
  350. always @(posedge vga_clk)
  351. begin
  352. vga_HS <= (53 <= CounterX) & (CounterX < (53 + 120));
  353. vga_VS <= (35 <= CounterY) & (CounterY < (35 + 6));
  354. end
  355. // Character RAM is 2K
  356. wire [10:0] xx = (CounterX - (53 + 120 + 61));
  357. wire [10:0] xx_1 = (CounterX - (53 + 120 + 61) + 1);
  358. // standard timing, except (600-512)/2=44 at top and bottom
  359. wire [10:0] yy = (CounterY - (35 + 6 + 21 + 44));
  360. wire [10:0] column = xx[10:1];
  361. wire [10:0] column_1 = xx_1[10:1];
  362. wire [10:0] row = yy[10:1];
  363. wire [7:0] glyph;
  364. wire [10:0] picaddr = {(row[7:3] + vga_scroll[4:0]), column_1[8:3]};
  365. // genvar i;
  366. // generate
  367. // for (i = 0; i < 4; i=i+1) begin : picture
  368. // RAMB16_S2_S2 picture(
  369. // .DIA(0),
  370. // // .DIPA(0),
  371. // .DOA(glyph[2 * i + 1: 2 * i]),
  372. // .WEA(0),
  373. // .ENA(1),
  374. // .CLKA(vga_clk),
  375. // .ADDRA(spicaddr),
  376. //
  377. // // .DIPB(0),
  378. // .DIB(j1_io_dout[2 * i + 1: 2 * i]),
  379. // .WEB(j1_io_wr & (j1_io_addr[15:13] == 3'b100)),
  380. // .ENB(1),
  381. // .CLKB(sys_clk),
  382. // .ADDRB(j1_io_addr),
  383. // .DOB());
  384. // end
  385. // endgenerate
  386. // RAMB16_S9_S9 picture(
  387. // .DIA(0),
  388. // // .DIPA(0),
  389. // .DOA(glyph),
  390. // .WEA(0),
  391. // .ENA(1),
  392. // .CLKA(vga_clk),
  393. // .ADDRA(picaddr),
  394. //
  395. // .DIPB(0),
  396. // .DIB(j1_io_dout),
  397. // .WEB(j1_io_wr & (j1_io_addr[15:13] == 3'b100)),
  398. // .ENB(1),
  399. // .CLKB(sys_clk),
  400. // .ADDRB(j1_io_addr),
  401. // .DOB());
  402. wire pic_w = j1_io_wr & (j1_io_addr[15:13] == 3'b100);
  403. ram8_8 picture(
  404. .dia(0), .doa(glyph), .wea(0), .ena(1), .clka(vga_clk), .addra(picaddr),
  405. .dib(j1_io_dout), .web(pic_w), .enb(1), .clkb(sys_clk), .addrb(j1_io_addr));
  406. wire charout;
  407. RAMB16_S1_S9 chars(
  408. .DIA(0),
  409. // .DIPA(0),
  410. .DOA(charout),
  411. .WEA(0),
  412. .ENA(1),
  413. .CLKA(vga_clk),
  414. .ADDRA({glyph, row[2:0], ~column[2:0]}),
  415. .DIPB(0),
  416. .DIB(j1_io_dout),
  417. // .DIPB(2'b0),
  418. .WEB(j1_io_wr & (j1_io_addr[15:12] == 4'hf)),
  419. .ENB(1),
  420. .CLKB(sys_clk),
  421. .ADDRB(j1_io_addr),
  422. .DOB());
  423. reg [10:0] regxx;
  424. always @(posedge vga_clk)
  425. begin
  426. regxx <= xx;
  427. end
  428. wire [63:0] sprite_pixels;
  429. wire [7:0] alpha;
  430. genvar i;
  431. generate
  432. for (i = 0; i < 8; i=i+1) begin : sprite_n
  433. sprite sprite_n(
  434. .pixel_clk(vga_clk),
  435. .picsel(vga_spritesel[i]),
  436. .pixel_x(regxx),
  437. .pixel_y(yy),
  438. .sx(vga_spritex[i]),
  439. .sy(vga_spritey[i]),
  440. .write_data(j1_io_dout),
  441. .write_address(vga_spritea),
  442. .write_en(j1_io_wr & (j1_io_addr == 16'h4304) & (vga_spritea[13:11] == i)),
  443. .write_clk(sys_clk),
  444. .alpha(alpha[i]),
  445. .brightness(sprite_pixels[8*i+7:8*i]));
  446. end
  447. endgenerate
  448. // wire [10:0] brightsum = bright[0] + bright[1] + bright[2] + bright[3] + bright[4] + bright[5] + bright[6] + bright[7];
  449. // wire [7:0] brightness = |brightsum[10:8] ? 255 : brightsum[7:0];
  450. // wire [7:0] final_bright = |alpha ? 255 : 0;
  451. // wire [7:0] final_bright = sprite_pixels[39:32];
  452. wire [7:0] sprite0 = sprite_pixels[7:0];
  453. wire [7:0] sprite1 = sprite_pixels[15:8];
  454. wire [7:0] sprite2 = sprite_pixels[23:16];
  455. wire [7:0] sprite3 = sprite_pixels[31:24];
  456. wire [7:0] sprite4 = sprite_pixels[39:32];
  457. wire [7:0] sprite5 = sprite_pixels[47:40];
  458. wire [7:0] sprite6 = sprite_pixels[55:48];
  459. wire [7:0] sprite7 = sprite_pixels[63:56];
  460. reg [10:0] fullsum;
  461. reg [7:0] final_bright;
  462. wire [16:0] lfsr;
  463. lfsre lfsr0(
  464. .clk(vga_clk),
  465. .lfsr(lfsr));
  466. wire [7:0] charout8 = {8{charout}};
  467. wire [7:0] dither = {lfsr[0], lfsr[4], lfsr[8], lfsr[12], lfsr[16]} | charout8;
  468. wire [7:0] r0;
  469. wire [7:0] r1;
  470. wire [7:0] r2;
  471. wire [7:0] r3;
  472. wire [7:0] r4;
  473. wire [7:0] r5;
  474. wire [7:0] r6;
  475. wire [7:0] r7;
  476. wire [7:0] g0;
  477. wire [7:0] g1;
  478. wire [7:0] g2;
  479. wire [7:0] g3;
  480. wire [7:0] g4;
  481. wire [7:0] g5;
  482. wire [7:0] g6;
  483. wire [7:0] g7;
  484. wire [7:0] b0;
  485. wire [7:0] b1;
  486. wire [7:0] b2;
  487. wire [7:0] b3;
  488. wire [7:0] b4;
  489. wire [7:0] b5;
  490. wire [7:0] b6;
  491. wire [7:0] b7;
  492. wire [2:0] spr0r = vga_spritec0[10:8];
  493. wire [2:0] spr1r = vga_spritec1[10:8];
  494. wire [2:0] spr2r = vga_spritec2[10:8];
  495. wire [2:0] spr3r = vga_spritec3[10:8];
  496. wire [2:0] spr4r = vga_spritec4[10:8];
  497. wire [2:0] spr5r = vga_spritec5[10:8];
  498. wire [2:0] spr6r = vga_spritec6[10:8];
  499. wire [2:0] spr7r = vga_spritec7[10:8];
  500. wire [2:0] spr0g = vga_spritec0[6:4];
  501. wire [2:0] spr1g = vga_spritec1[6:4];
  502. wire [2:0] spr2g = vga_spritec2[6:4];
  503. wire [2:0] spr3g = vga_spritec3[6:4];
  504. wire [2:0] spr4g = vga_spritec4[6:4];
  505. wire [2:0] spr5g = vga_spritec5[6:4];
  506. wire [2:0] spr6g = vga_spritec6[6:4];
  507. wire [2:0] spr7g = vga_spritec7[6:4];
  508. wire [2:0] spr0b = vga_spritec0[2:0];
  509. wire [2:0] spr1b = vga_spritec1[2:0];
  510. wire [2:0] spr2b = vga_spritec2[2:0];
  511. wire [2:0] spr3b = vga_spritec3[2:0];
  512. wire [2:0] spr4b = vga_spritec4[2:0];
  513. wire [2:0] spr5b = vga_spritec5[2:0];
  514. wire [2:0] spr6b = vga_spritec6[2:0];
  515. wire [2:0] spr7b = vga_spritec7[2:0];
  516. partial pr0(sprite0, alpha[0], spr0r, r0);
  517. partial pr1(sprite1, alpha[1], spr1r, r1);
  518. partial pr2(sprite2, alpha[2], spr2r, r2);
  519. partial pr3(sprite3, alpha[3], spr3r, r3);
  520. partial pr4(sprite4, alpha[4], spr4r, r4);
  521. partial pr5(sprite5, alpha[5], spr5r, r5);
  522. partial pr6(sprite6, alpha[6], spr6r, r6);
  523. partial pr7(sprite7, alpha[7], spr7r, r7);
  524. partial pg0(sprite0, alpha[0], spr0g, g0);
  525. partial pg1(sprite1, alpha[1], spr1g, g1);
  526. partial pg2(sprite2, alpha[2], spr2g, g2);
  527. partial pg3(sprite3, alpha[3], spr3g, g3);
  528. partial pg4(sprite4, alpha[4], spr4g, g4);
  529. partial pg5(sprite5, alpha[5], spr5g, g5);
  530. partial pg6(sprite6, alpha[6], spr6g, g6);
  531. partial pg7(sprite7, alpha[7], spr7g, g7);
  532. partial pb0(sprite0, alpha[0], spr0b, b0);
  533. partial pb1(sprite1, alpha[1], spr1b, b1);
  534. partial pb2(sprite2, alpha[2], spr2b, b2);
  535. partial pb3(sprite3, alpha[3], spr3b, b3);
  536. partial pb4(sprite4, alpha[4], spr4b, b4);
  537. partial pb5(sprite5, alpha[5], spr5b, b5);
  538. partial pb6(sprite6, alpha[6], spr6b, b6);
  539. partial pb7(sprite7, alpha[7], spr7b, b7);
  540. wire [7:0] sat_r;
  541. saturating_adder add_r(r0, r1, r2, r3, r4, r5, r6, r7, dither, sat_r);
  542. wire [7:0] sat_g;
  543. saturating_adder add_g(g0, g1, g2, g3, g4, g5, g6, g7, dither, sat_g);
  544. wire [7:0] sat_b;
  545. saturating_adder add_b(b0, b1, b2, b3, b4, b5, b6, b7, dither, sat_b);
  546. always @*
  547. begin
  548. if(vga_addsprites) begin
  549. final_bright = sat_r;
  550. end else begin
  551. if(alpha[0]) final_bright = sprite0;
  552. else if(alpha[1]) final_bright = sprite1;
  553. else if(alpha[2]) final_bright = sprite2;
  554. else if(alpha[3]) final_bright = sprite3;
  555. else if(alpha[4]) final_bright = sprite4;
  556. else if(alpha[5]) final_bright = sprite5;
  557. else if(alpha[6]) final_bright = sprite6;
  558. else if(alpha[7]) final_bright = sprite7;
  559. else
  560. final_bright = 0;
  561. end
  562. end
  563. wire active = ((53 + 120 + 61) <= CounterX) & (CounterX < (53 + 120 + 61 + 800)) & ((35 + 6 + 21 + 44) < CounterY) & (CounterY < (35 + 6 + 21 + 44 + 512));
  564. assign vga_line = yy;
  565. // wire [2:0] vga_red = active ? (charout ? 7 : 0) : 0;
  566. // wire [2:0] vga_red = active ? final_bright[7:5] : 0;
  567. // wire [2:0] vga_green = active ? final_bright[7:5] : 0;
  568. // wire [2:0] vga_blue = active ? final_bright[7:5] : 0;
  569. wire [2:0] vga_red = active ? sat_r[7:5] : 0;
  570. wire [2:0] vga_green = active ? sat_g[7:5] : 0;
  571. wire [2:0] vga_blue = active ? sat_b[7:5] : 0;
  572. wire vga_hsync_n = ~vga_HS;
  573. wire vga_vsync_n = ~vga_VS;
  574. endmodule // top