udm.cpp 3.8 KB

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  1. /*****************************************************************************
  2. * dcc project Universal Decompilation Module
  3. * This is supposedly a machine independant and language independant module
  4. * that just plays with abstract cfg's and intervals and such like.
  5. * (C) Cristina Cifuentes
  6. ****************************************************************************/
  7. #include "dcc.h"
  8. #include "disassem.h"
  9. #include "project.h"
  10. #include <QtCore/QDebug>
  11. #include <list>
  12. #include <cassert>
  13. #include <stdio.h>
  14. #include <CallGraph.h>
  15. extern Project g_proj;
  16. //static void displayCFG(Function * pProc);
  17. //static void displayDfs(BB * pBB);
  18. /****************************************************************************
  19. * udm
  20. ****************************************************************************/
  21. void Function::buildCFG(Disassembler &ds)
  22. {
  23. if(flg & PROC_ISLIB)
  24. return; // Ignore library functions
  25. createCFG();
  26. if (option.VeryVerbose)
  27. displayCFG();
  28. compressCFG(); // Remove redundancies and add in-edge information
  29. if (option.asm2)
  30. {
  31. ds.disassem(this); // Print 2nd pass assembler listing
  32. return;
  33. }
  34. /* Idiom analysis and propagation of long type */
  35. lowLevelAnalysis();
  36. /* Generate HIGH_LEVEL icodes whenever possible */
  37. highLevelGen();
  38. }
  39. void Function::controlFlowAnalysis()
  40. {
  41. if (flg & PROC_ISLIB)
  42. return; /* Ignore library functions */
  43. derSeq *derivedG=nullptr;
  44. /* Make cfg reducible and build derived sequences */
  45. derivedG=checkReducibility();
  46. if (option.VeryVerbose)
  47. derivedG->display();
  48. /* Structure the graph */
  49. structure(derivedG);
  50. /* Check for compound conditions */
  51. compoundCond ();
  52. if (option.verbose)
  53. {
  54. qDebug() <<"\nDepth first traversal - Proc" <<name;
  55. (*m_actual_cfg.begin())->displayDfs();
  56. //m_cfg.front()->displayDfs();
  57. }
  58. /* Free storage occupied by this procedure */
  59. freeDerivedSeq(*derivedG);
  60. }
  61. void udm(void)
  62. {
  63. /* Build the control flow graph, find idioms, and convert low-level
  64. * icodes to high-level ones */
  65. Project *proj = Project::get();
  66. Disassembler ds(2);
  67. for (auto iter = proj->pProcList.rbegin(); iter!=proj->pProcList.rend(); ++iter)
  68. {
  69. Function &f(*iter);
  70. if(option.CustomEntryPoint) {
  71. if(f.procEntry!=option.CustomEntryPoint) {
  72. continue;
  73. }
  74. }
  75. iter->buildCFG(ds);
  76. }
  77. if (option.asm2)
  78. return;
  79. /* Data flow analysis - eliminate condition codes, extraneous registers
  80. * and intermediate instructions. Find expressions by forward
  81. * substitution algorithm */
  82. LivenessSet live_regs;
  83. if(option.CustomEntryPoint) {
  84. ilFunction iter = proj->findByEntry(option.CustomEntryPoint);
  85. if(iter==proj->pProcList.end()) {
  86. qCritical()<< "No function found at entry point" << QString::number(option.CustomEntryPoint,16);
  87. return;
  88. }
  89. iter->dataFlow(live_regs);
  90. iter->controlFlowAnalysis();
  91. delete proj->callGraph;
  92. proj->callGraph = new CALL_GRAPH;
  93. proj->callGraph->proc = iter;
  94. return;
  95. }
  96. proj->pProcList.front().dataFlow (live_regs);
  97. /* Control flow analysis - structuring algorithm */
  98. for (auto iter = proj->pProcList.rbegin(); iter!=proj->pProcList.rend(); ++iter)
  99. {
  100. iter->controlFlowAnalysis();
  101. }
  102. }
  103. /****************************************************************************
  104. * displayCFG - Displays the Basic Block list
  105. ***************************************************************************/
  106. void Function::displayCFG()
  107. {
  108. qDebug() << "\nBasic Block List - Proc"<<name;
  109. for (BB *pBB : /*m_cfg*/m_actual_cfg)
  110. {
  111. pBB->display();
  112. }
  113. }