udm.cpp 3.1 KB

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  1. /*****************************************************************************
  2. * dcc project Universal Decompilation Module
  3. * This is supposedly a machine independant and language independant module
  4. * that just plays with abstract cfg's and intervals and such like.
  5. * (C) Cristina Cifuentes
  6. ****************************************************************************/
  7. #include "dcc.h"
  8. #include "disassem.h"
  9. #include "project.h"
  10. #include <QtCore/QDebug>
  11. #include <list>
  12. #include <cassert>
  13. #include <stdio.h>
  14. extern Project g_proj;
  15. //static void displayCFG(Function * pProc);
  16. //static void displayDfs(BB * pBB);
  17. /****************************************************************************
  18. * udm
  19. ****************************************************************************/
  20. void Function::buildCFG(Disassembler &ds)
  21. {
  22. if(flg & PROC_ISLIB)
  23. return; // Ignore library functions
  24. createCFG();
  25. if (option.VeryVerbose)
  26. displayCFG();
  27. compressCFG(); // Remove redundancies and add in-edge information
  28. if (option.asm2)
  29. {
  30. ds.disassem(this); // Print 2nd pass assembler listing
  31. return;
  32. }
  33. /* Idiom analysis and propagation of long type */
  34. lowLevelAnalysis();
  35. /* Generate HIGH_LEVEL icodes whenever possible */
  36. highLevelGen();
  37. }
  38. void Function::controlFlowAnalysis()
  39. {
  40. if (flg & PROC_ISLIB)
  41. return; /* Ignore library functions */
  42. derSeq *derivedG=nullptr;
  43. /* Make cfg reducible and build derived sequences */
  44. derivedG=checkReducibility();
  45. if (option.VeryVerbose)
  46. derivedG->display();
  47. /* Structure the graph */
  48. structure(derivedG);
  49. /* Check for compound conditions */
  50. compoundCond ();
  51. if (option.verbose)
  52. {
  53. qDebug() <<"\nDepth first traversal - Proc" <<name;
  54. (*m_actual_cfg.begin())->displayDfs();
  55. //m_cfg.front()->displayDfs();
  56. }
  57. /* Free storage occupied by this procedure */
  58. freeDerivedSeq(*derivedG);
  59. }
  60. void udm(void)
  61. {
  62. /* Build the control flow graph, find idioms, and convert low-level
  63. * icodes to high-level ones */
  64. Disassembler ds(2);
  65. for (auto iter = Project::get()->pProcList.rbegin(); iter!=Project::get()->pProcList.rend(); ++iter)
  66. {
  67. iter->buildCFG(ds);
  68. }
  69. if (option.asm2)
  70. return;
  71. /* Data flow analysis - eliminate condition codes, extraneous registers
  72. * and intermediate instructions. Find expressions by forward
  73. * substitution algorithm */
  74. LivenessSet live_regs;
  75. Project::get()->pProcList.front().dataFlow (live_regs);
  76. /* Control flow analysis - structuring algorithm */
  77. for (auto iter = Project::get()->pProcList.rbegin(); iter!=Project::get()->pProcList.rend(); ++iter)
  78. {
  79. iter->controlFlowAnalysis();
  80. }
  81. }
  82. /****************************************************************************
  83. * displayCFG - Displays the Basic Block list
  84. ***************************************************************************/
  85. void Function::displayCFG()
  86. {
  87. qDebug() << "\nBasic Block List - Proc"<<name;
  88. for (BB *pBB : /*m_cfg*/m_actual_cfg)
  89. {
  90. pBB->display();
  91. }
  92. }