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@@ -1,5 +1,5 @@
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/*****************************************************************************
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- * dcc project scanner module
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+ * dcc project scanner module
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* Implements a simple state driven scanner to convert 8086 machine code into
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* I-code
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* (C) Cristina Cifuentes, Jeff Ledermann
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@@ -19,7 +19,6 @@
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#define S_EXT 0x000200 /* sign extend */
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#define OP386 0x000400 /* 386 op-code */
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#define NSP 0x000800 /* NOT_HLL if SP is src or dst */
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-// defined in Enums.h #define ICODEMASK 0xFF00FF /* Masks off parser flags */
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static void rm(int i);
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static void modrm(int i);
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@@ -51,276 +50,276 @@ static void none1(int i);
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static void none2(int i);
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static void checkInt(int i);
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-#define iZERO (llIcode)0 // For neatness
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-#define IC llIcode
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+#define IC llIcode
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-static struct {
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+struct StateTabelEntry {
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void (*state1)(int);
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void (*state2)(int);
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uint32_t flg;
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llIcode opcode;
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-} stateTable[] = {
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- { modrm, none2, B , iADD }, /* 00 */
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- { modrm, none2, 0 , iADD }, /* 01 */
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- { modrm, none2, TO_REG | B , iADD }, /* 02 */
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- { modrm, none2, TO_REG , iADD }, /* 03 */
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- { data1, axImp, B , iADD }, /* 04 */
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- { data2, axImp, 0 , iADD }, /* 05 */
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- { segop, none2, NO_SRC , iPUSH }, /* 06 */
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- { segop, none2, NO_SRC , iPOP }, /* 07 */
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- { modrm, none2, B , iOR }, /* 08 */
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- { modrm, none2, NSP , iOR }, /* 09 */
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- { modrm, none2, TO_REG | B , iOR }, /* 0A */
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- { modrm, none2, TO_REG | NSP , iOR }, /* 0B */
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- { data1, axImp, B , iOR }, /* 0C */
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- { data2, axImp, 0 , iOR }, /* 0D */
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- { segop, none2, NO_SRC , iPUSH }, /* 0E */
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- { none1, none2, OP386 , iZERO }, /* 0F */
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- { modrm, none2, B , iADC }, /* 10 */
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- { modrm, none2, NSP , iADC }, /* 11 */
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- { modrm, none2, TO_REG | B , iADC }, /* 12 */
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- { modrm, none2, TO_REG | NSP , iADC }, /* 13 */
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- { data1, axImp, B , iADC }, /* 14 */
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- { data2, axImp, 0 , iADC }, /* 15 */
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- { segop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 16 */
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- { segop, none2, NOT_HLL | NO_SRC , iPOP }, /* 17 */
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- { modrm, none2, B , iSBB }, /* 18 */
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- { modrm, none2, NSP , iSBB }, /* 19 */
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- { modrm, none2, TO_REG | B , iSBB }, /* 1A */
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- { modrm, none2, TO_REG | NSP , iSBB }, /* 1B */
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- { data1, axImp, B , iSBB }, /* 1C */
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- { data2, axImp, 0 , iSBB }, /* 1D */
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- { segop, none2, NO_SRC , iPUSH }, /* 1E */
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- { segop, none2, NO_SRC , iPOP }, /* 1F */
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- { modrm, none2, B , iAND }, /* 20 */
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- { modrm, none2, NSP , iAND }, /* 21 */
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- { modrm, none2, TO_REG | B , iAND }, /* 22 */
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- { modrm, none2, TO_REG | NSP , iAND }, /* 23 */
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- { data1, axImp, B , iAND }, /* 24 */
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- { data2, axImp, 0 , iAND }, /* 25 */
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- { prefix, none2, 0 , (IC)rES}, /* 26 */
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- { none1, axImp, NOT_HLL | B|NO_SRC , iDAA }, /* 27 */
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- { modrm, none2, B , iSUB }, /* 28 */
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- { modrm, none2, 0 , iSUB }, /* 29 */
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- { modrm, none2, TO_REG | B , iSUB }, /* 2A */
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- { modrm, none2, TO_REG , iSUB }, /* 2B */
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- { data1, axImp, B , iSUB }, /* 2C */
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- { data2, axImp, 0 , iSUB }, /* 2D */
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- { prefix, none2, 0 , (IC)rCS}, /* 2E */
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- { none1, axImp, NOT_HLL | B|NO_SRC , iDAS }, /* 2F */
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- { modrm, none2, B , iXOR }, /* 30 */
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- { modrm, none2, NSP , iXOR }, /* 31 */
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- { modrm, none2, TO_REG | B , iXOR }, /* 32 */
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- { modrm, none2, TO_REG | NSP , iXOR }, /* 33 */
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- { data1, axImp, B , iXOR }, /* 34 */
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- { data2, axImp, 0 , iXOR }, /* 35 */
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- { prefix, none2, 0 , (IC)rSS}, /* 36 */
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- { none1, axImp, NOT_HLL | NO_SRC , iAAA }, /* 37 */
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- { modrm, none2, B , iCMP }, /* 38 */
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- { modrm, none2, NSP , iCMP }, /* 39 */
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- { modrm, none2, TO_REG | B , iCMP }, /* 3A */
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- { modrm, none2, TO_REG | NSP , iCMP }, /* 3B */
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- { data1, axImp, B , iCMP }, /* 3C */
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- { data2, axImp, 0 , iCMP }, /* 3D */
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- { prefix, none2, 0 , (IC)rDS}, /* 3E */
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- { none1, axImp, NOT_HLL | NO_SRC , iAAS }, /* 3F */
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- { regop, none2, 0 , iINC }, /* 40 */
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- { regop, none2, 0 , iINC }, /* 41 */
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- { regop, none2, 0 , iINC }, /* 42 */
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- { regop, none2, 0 , iINC }, /* 43 */
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- { regop, none2, NOT_HLL , iINC }, /* 44 */
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- { regop, none2, 0 , iINC }, /* 45 */
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- { regop, none2, 0 , iINC }, /* 46 */
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- { regop, none2, 0 , iINC }, /* 47 */
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- { regop, none2, 0 , iDEC }, /* 48 */
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- { regop, none2, 0 , iDEC }, /* 49 */
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- { regop, none2, 0 , iDEC }, /* 4A */
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- { regop, none2, 0 , iDEC }, /* 4B */
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- { regop, none2, NOT_HLL , iDEC }, /* 4C */
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- { regop, none2, 0 , iDEC }, /* 4D */
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- { regop, none2, 0 , iDEC }, /* 4E */
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- { regop, none2, 0 , iDEC }, /* 4F */
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- { regop, none2, NO_SRC , iPUSH }, /* 50 */
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- { regop, none2, NO_SRC , iPUSH }, /* 51 */
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- { regop, none2, NO_SRC , iPUSH }, /* 52 */
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- { regop, none2, NO_SRC , iPUSH }, /* 53 */
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- { regop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 54 */
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- { regop, none2, NO_SRC , iPUSH }, /* 55 */
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- { regop, none2, NO_SRC , iPUSH }, /* 56 */
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- { regop, none2, NO_SRC , iPUSH }, /* 57 */
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- { regop, none2, NO_SRC , iPOP }, /* 58 */
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- { regop, none2, NO_SRC , iPOP }, /* 59 */
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- { regop, none2, NO_SRC , iPOP }, /* 5A */
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- { regop, none2, NO_SRC , iPOP }, /* 5B */
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- { regop, none2, NOT_HLL | NO_SRC , iPOP }, /* 5C */
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- { regop, none2, NO_SRC , iPOP }, /* 5D */
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- { regop, none2, NO_SRC , iPOP }, /* 5E */
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- { regop, none2, NO_SRC , iPOP }, /* 5F */
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- { none1, none2, NOT_HLL | NO_OPS , iPUSHA}, /* 60 */
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- { none1, none2, NOT_HLL | NO_OPS , iPOPA }, /* 61 */
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- { memOnly, modrm, TO_REG | NSP , iBOUND}, /* 62 */
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- { none1, none2, OP386 , iZERO }, /* 63 */
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- { none1, none2, OP386 , iZERO }, /* 64 */
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- { none1, none2, OP386 , iZERO }, /* 65 */
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- { none1, none2, OP386 , iZERO }, /* 66 */
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- { none1, none2, OP386 , iZERO }, /* 67 */
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- { data2, none2, NO_SRC , iPUSH }, /* 68 */
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- { modrm, data2, TO_REG | NSP , iIMUL }, /* 69 */
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- { data1, none2, S_EXT | NO_SRC , iPUSH }, /* 6A */
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- { modrm, data1, TO_REG | NSP | S_EXT , iIMUL }, /* 6B */
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- { strop, memImp, NOT_HLL | B|IM_OPS , iINS }, /* 6C */
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- { strop, memImp, NOT_HLL | IM_OPS , iINS }, /* 6D */
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- { strop, memImp, NOT_HLL | B|IM_OPS , iOUTS }, /* 6E */
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- { strop, memImp, NOT_HLL | IM_OPS , iOUTS }, /* 6F */
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- { dispS, none2, NOT_HLL , iJO }, /* 70 */
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- { dispS, none2, NOT_HLL , iJNO }, /* 71 */
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- { dispS, none2, 0 , iJB }, /* 72 */
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- { dispS, none2, 0 , iJAE }, /* 73 */
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- { dispS, none2, 0 , iJE }, /* 74 */
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- { dispS, none2, 0 , iJNE }, /* 75 */
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- { dispS, none2, 0 , iJBE }, /* 76 */
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- { dispS, none2, 0 , iJA }, /* 77 */
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- { dispS, none2, 0 , iJS }, /* 78 */
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- { dispS, none2, 0 , iJNS }, /* 79 */
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- { dispS, none2, NOT_HLL , iJP }, /* 7A */
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- { dispS, none2, NOT_HLL , iJNP }, /* 7B */
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- { dispS, none2, 0 , iJL }, /* 7C */
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- { dispS, none2, 0 , iJGE }, /* 7D */
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- { dispS, none2, 0 , iJLE }, /* 7E */
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- { dispS, none2, 0 , iJG }, /* 7F */
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- { immed, data1, B , iZERO }, /* 80 */
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- { immed, data2, NSP , iZERO }, /* 81 */
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- { immed, data1, B , iZERO }, /* 82 */ /* ?? */
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- { immed, data1, NSP | S_EXT , iZERO }, /* 83 */
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- { modrm, none2, TO_REG | B , iTEST }, /* 84 */
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- { modrm, none2, TO_REG | NSP , iTEST }, /* 85 */
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- { modrm, none2, TO_REG | B , iXCHG }, /* 86 */
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- { modrm, none2, TO_REG | NSP , iXCHG }, /* 87 */
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- { modrm, none2, B , iMOV }, /* 88 */
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- { modrm, none2, 0 , iMOV }, /* 89 */
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- { modrm, none2, TO_REG | B , iMOV }, /* 8A */
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- { modrm, none2, TO_REG , iMOV }, /* 8B */
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- { segrm, none2, NSP , iMOV }, /* 8C */
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- { memOnly, modrm, TO_REG | NSP , iLEA }, /* 8D */
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- { segrm, none2, TO_REG | NSP , iMOV }, /* 8E */
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- { memReg0, none2, NO_SRC , iPOP }, /* 8F */
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- { none1, none2, NO_OPS , iNOP }, /* 90 */
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- { regop, axImp, 0 , iXCHG }, /* 91 */
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- { regop, axImp, 0 , iXCHG }, /* 92 */
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- { regop, axImp, 0 , iXCHG }, /* 93 */
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- { regop, axImp, NOT_HLL , iXCHG }, /* 94 */
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- { regop, axImp, 0 , iXCHG }, /* 95 */
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- { regop, axImp, 0 , iXCHG }, /* 96 */
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- { regop, axImp, 0 , iXCHG }, /* 97 */
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- { alImp, axImp, SRC_B | S_EXT , iSIGNEX}, /* 98 */
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- {axSrcIm, axImp, IM_DST | S_EXT , iSIGNEX}, /* 99 */
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- { dispF, none2, TO_REG , iCALLF }, /* 9A */ // TO_REG set to use SRC when processing setAddress
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- { none1, none2, FLOAT_OP| NO_OPS , iWAIT }, /* 9B */
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- { none1, none2, NOT_HLL | NO_OPS , iPUSHF}, /* 9C */
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- { none1, none2, NOT_HLL | NO_OPS , iPOPF }, /* 9D */
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- { none1, none2, NOT_HLL | NO_OPS , iSAHF }, /* 9E */
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- { none1, none2, NOT_HLL | NO_OPS , iLAHF }, /* 9F */
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- { dispM, axImp, B , iMOV }, /* A0 */
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- { dispM, axImp, 0 , iMOV }, /* A1 */
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- { dispM, axImp, TO_REG | B , iMOV }, /* A2 */
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- { dispM, axImp, TO_REG , iMOV }, /* A3 */
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- { strop, memImp, B | IM_OPS , iMOVS }, /* A4 */
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- { strop, memImp, IM_OPS , iMOVS }, /* A5 */
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- { strop, memImp, B | IM_OPS , iCMPS }, /* A6 */
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- { strop, memImp, IM_OPS , iCMPS }, /* A7 */
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- { data1, axImp, B , iTEST }, /* A8 */
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- { data2, axImp, 0 , iTEST }, /* A9 */
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- { strop, memImp, B | IM_OPS , iSTOS }, /* AA */
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- { strop, memImp, IM_OPS , iSTOS }, /* AB */
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- { strop, memImp, B | IM_OPS , iLODS }, /* AC */
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- { strop, memImp, IM_OPS , iLODS }, /* AD */
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- { strop, memImp, B | IM_OPS , iSCAS }, /* AE */
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- { strop, memImp, IM_OPS , iSCAS }, /* AF */
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- { regop, data1, B , iMOV }, /* B0 */
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- { regop, data1, B , iMOV }, /* B1 */
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- { regop, data1, B , iMOV }, /* B2 */
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- { regop, data1, B , iMOV }, /* B3 */
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- { regop, data1, B , iMOV }, /* B4 */
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- { regop, data1, B , iMOV }, /* B5 */
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- { regop, data1, B , iMOV }, /* B6 */
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- { regop, data1, B , iMOV }, /* B7 */
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- { regop, data2, 0 , iMOV }, /* B8 */
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- { regop, data2, 0 , iMOV }, /* B9 */
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- { regop, data2, 0 , iMOV }, /* BA */
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- { regop, data2, 0 , iMOV }, /* BB */
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- { regop, data2, NOT_HLL , iMOV }, /* BC */
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- { regop, data2, 0 , iMOV }, /* BD */
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- { regop, data2, 0 , iMOV }, /* BE */
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- { regop, data2, 0 , iMOV }, /* BF */
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- { shift, data1, B , iZERO }, /* C0 */
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- { shift, data1, NSP | SRC_B , iZERO }, /* C1 */
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- { data2, none2, 0 , iRET }, /* C2 */
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- { none1, none2, NO_OPS , iRET }, /* C3 */
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- { memOnly, modrm, TO_REG | NSP , iLES }, /* C4 */
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- { memOnly, modrm, TO_REG | NSP , iLDS }, /* C5 */
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- { memReg0, data1, B , iMOV }, /* C6 */
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- { memReg0, data2, 0 , iMOV }, /* C7 */
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- { data2, data1, 0 , iENTER}, /* C8 */
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- { none1, none2, NO_OPS , iLEAVE}, /* C9 */
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- { data2, none2, 0 , iRETF }, /* CA */
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- { none1, none2, NO_OPS , iRETF }, /* CB */
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- { const3, none2, NOT_HLL , iINT }, /* CC */
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- { data1,checkInt, NOT_HLL , iINT }, /* CD */
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- { none1, none2, NOT_HLL | NO_OPS , iINTO }, /* CE */
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- { none1, none2, NOT_HLL | NO_OPS , iIRET }, /* Cf */
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- { shift, const1, B , iZERO }, /* D0 */
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- { shift, const1, SRC_B , iZERO }, /* D1 */
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- { shift, none1, B , iZERO }, /* D2 */
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- { shift, none1, SRC_B , iZERO }, /* D3 */
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- { data1, axImp, NOT_HLL , iAAM }, /* D4 */
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- { data1, axImp, NOT_HLL , iAAD }, /* D5 */
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- { none1, none2, 0 , iZERO }, /* D6 */
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- { memImp, axImp, NOT_HLL | B| IM_OPS , iXLAT }, /* D7 */
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- { escop, none2, FLOAT_OP , iESC }, /* D8 */
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- { escop, none2, FLOAT_OP , iESC }, /* D9 */
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- { escop, none2, FLOAT_OP , iESC }, /* DA */
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- { escop, none2, FLOAT_OP , iESC }, /* DB */
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- { escop, none2, FLOAT_OP , iESC }, /* DC */
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- { escop, none2, FLOAT_OP , iESC }, /* DD */
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- { escop, none2, FLOAT_OP , iESC }, /* DE */
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- { escop, none2, FLOAT_OP , iESC }, /* Df */
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- { dispS, none2, 0 , iLOOPNE}, /* E0 */
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- { dispS, none2, 0 , iLOOPE}, /* E1 */
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- { dispS, none2, 0 , iLOOP }, /* E2 */
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- { dispS, none2, 0 , iJCXZ }, /* E3 */
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- { data1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* E4 */
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- { data1, axImp, NOT_HLL | NO_SRC , iIN }, /* E5 */
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- { data1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* E6 */
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- { data1, axImp, NOT_HLL | NO_SRC , iOUT }, /* E7 */
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- { dispN, none2, 0 , iCALL }, /* E8 */
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- { dispN, none2, 0 , iJMP }, /* E9 */
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- { dispF, none2, 0 , iJMPF }, /* EA */
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- { dispS, none2, 0 , iJMP }, /* EB */
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- { none1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* EC */
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- { none1, axImp, NOT_HLL | NO_SRC , iIN }, /* ED */
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- { none1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* EE */
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- { none1, axImp, NOT_HLL | NO_SRC , iOUT }, /* EF */
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- { none1, none2, NOT_HLL | NO_OPS , iLOCK }, /* F0 */
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- { none1, none2, 0 , iZERO }, /* F1 */
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- { prefix, none2, 0 , iREPNE}, /* F2 */
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- { prefix, none2, 0 , iREPE }, /* F3 */
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- { none1, none2, NOT_HLL | NO_OPS , iHLT }, /* F4 */
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- { none1, none2, NO_OPS , iCMC }, /* F5 */
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- { arith, none1, B , iZERO }, /* F6 */
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- { arith, none1, NSP , iZERO }, /* F7 */
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- { none1, none2, NO_OPS , iCLC }, /* F8 */
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|
|
- { none1, none2, NO_OPS , iSTC }, /* F9 */
|
|
|
- { none1, none2, NOT_HLL | NO_OPS , iCLI }, /* FA */
|
|
|
- { none1, none2, NOT_HLL | NO_OPS , iSTI }, /* FB */
|
|
|
- { none1, none2, NO_OPS , iCLD }, /* FC */
|
|
|
- { none1, none2, NO_OPS , iSTD }, /* FD */
|
|
|
- { trans, none1, B , iZERO }, /* FE */
|
|
|
- { trans, none1, NSP , iZERO } /* FF */
|
|
|
+};
|
|
|
+static const StateTabelEntry stateTable[] = {
|
|
|
+ { modrm, none2, B , iADD }, /* 00 */
|
|
|
+ { modrm, none2, 0 , iADD }, /* 01 */
|
|
|
+ { modrm, none2, TO_REG | B , iADD }, /* 02 */
|
|
|
+ { modrm, none2, TO_REG , iADD }, /* 03 */
|
|
|
+ { data1, axImp, B , iADD }, /* 04 */
|
|
|
+ { data2, axImp, 0 , iADD }, /* 05 */
|
|
|
+ { segop, none2, NO_SRC , iPUSH }, /* 06 */
|
|
|
+ { segop, none2, NO_SRC , iPOP }, /* 07 */
|
|
|
+ { modrm, none2, B , iOR }, /* 08 */
|
|
|
+ { modrm, none2, NSP , iOR }, /* 09 */
|
|
|
+ { modrm, none2, TO_REG | B , iOR }, /* 0A */
|
|
|
+ { modrm, none2, TO_REG | NSP , iOR }, /* 0B */
|
|
|
+ { data1, axImp, B , iOR }, /* 0C */
|
|
|
+ { data2, axImp, 0 , iOR }, /* 0D */
|
|
|
+ { segop, none2, NO_SRC , iPUSH }, /* 0E */
|
|
|
+ { none1, none2, OP386 , iINVALID }, /* 0F */
|
|
|
+ { modrm, none2, B , iADC }, /* 10 */
|
|
|
+ { modrm, none2, NSP , iADC }, /* 11 */
|
|
|
+ { modrm, none2, TO_REG | B , iADC }, /* 12 */
|
|
|
+ { modrm, none2, TO_REG | NSP , iADC }, /* 13 */
|
|
|
+ { data1, axImp, B , iADC }, /* 14 */
|
|
|
+ { data2, axImp, 0 , iADC }, /* 15 */
|
|
|
+ { segop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 16 */
|
|
|
+ { segop, none2, NOT_HLL | NO_SRC , iPOP }, /* 17 */
|
|
|
+ { modrm, none2, B , iSBB }, /* 18 */
|
|
|
+ { modrm, none2, NSP , iSBB }, /* 19 */
|
|
|
+ { modrm, none2, TO_REG | B , iSBB }, /* 1A */
|
|
|
+ { modrm, none2, TO_REG | NSP , iSBB }, /* 1B */
|
|
|
+ { data1, axImp, B , iSBB }, /* 1C */
|
|
|
+ { data2, axImp, 0 , iSBB }, /* 1D */
|
|
|
+ { segop, none2, NO_SRC , iPUSH }, /* 1E */
|
|
|
+ { segop, none2, NO_SRC , iPOP }, /* 1F */
|
|
|
+ { modrm, none2, B , iAND }, /* 20 */
|
|
|
+ { modrm, none2, NSP , iAND }, /* 21 */
|
|
|
+ { modrm, none2, TO_REG | B , iAND }, /* 22 */
|
|
|
+ { modrm, none2, TO_REG | NSP , iAND }, /* 23 */
|
|
|
+ { data1, axImp, B , iAND }, /* 24 */
|
|
|
+ { data2, axImp, 0 , iAND }, /* 25 */
|
|
|
+ { prefix, none2, 0 , (IC)rES}, /* 26 */
|
|
|
+ { none1, axImp, NOT_HLL | B|NO_SRC , iDAA }, /* 27 */
|
|
|
+ { modrm, none2, B , iSUB }, /* 28 */
|
|
|
+ { modrm, none2, 0 , iSUB }, /* 29 */
|
|
|
+ { modrm, none2, TO_REG | B , iSUB }, /* 2A */
|
|
|
+ { modrm, none2, TO_REG , iSUB }, /* 2B */
|
|
|
+ { data1, axImp, B , iSUB }, /* 2C */
|
|
|
+ { data2, axImp, 0 , iSUB }, /* 2D */
|
|
|
+ { prefix, none2, 0 , (IC)rCS}, /* 2E */
|
|
|
+ { none1, axImp, NOT_HLL | B|NO_SRC , iDAS }, /* 2F */
|
|
|
+ { modrm, none2, B , iXOR }, /* 30 */
|
|
|
+ { modrm, none2, NSP , iXOR }, /* 31 */
|
|
|
+ { modrm, none2, TO_REG | B , iXOR }, /* 32 */
|
|
|
+ { modrm, none2, TO_REG | NSP , iXOR }, /* 33 */
|
|
|
+ { data1, axImp, B , iXOR }, /* 34 */
|
|
|
+ { data2, axImp, 0 , iXOR }, /* 35 */
|
|
|
+ { prefix, none2, 0 , (IC)rSS}, /* 36 */
|
|
|
+ { none1, axImp, NOT_HLL | NO_SRC , iAAA }, /* 37 */
|
|
|
+ { modrm, none2, B , iCMP }, /* 38 */
|
|
|
+ { modrm, none2, NSP , iCMP }, /* 39 */
|
|
|
+ { modrm, none2, TO_REG | B , iCMP }, /* 3A */
|
|
|
+ { modrm, none2, TO_REG | NSP , iCMP }, /* 3B */
|
|
|
+ { data1, axImp, B , iCMP }, /* 3C */
|
|
|
+ { data2, axImp, 0 , iCMP }, /* 3D */
|
|
|
+ { prefix, none2, 0 , (IC)rDS}, /* 3E */
|
|
|
+ { none1, axImp, NOT_HLL | NO_SRC , iAAS }, /* 3F */
|
|
|
+ { regop, none2, 0 , iINC }, /* 40 */
|
|
|
+ { regop, none2, 0 , iINC }, /* 41 */
|
|
|
+ { regop, none2, 0 , iINC }, /* 42 */
|
|
|
+ { regop, none2, 0 , iINC }, /* 43 */
|
|
|
+ { regop, none2, NOT_HLL , iINC }, /* 44 */
|
|
|
+ { regop, none2, 0 , iINC }, /* 45 */
|
|
|
+ { regop, none2, 0 , iINC }, /* 46 */
|
|
|
+ { regop, none2, 0 , iINC }, /* 47 */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 48 */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 49 */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 4A */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 4B */
|
|
|
+ { regop, none2, NOT_HLL , iDEC }, /* 4C */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 4D */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 4E */
|
|
|
+ { regop, none2, 0 , iDEC }, /* 4F */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 50 */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 51 */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 52 */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 53 */
|
|
|
+ { regop, none2, NOT_HLL | NO_SRC , iPUSH }, /* 54 */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 55 */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 56 */
|
|
|
+ { regop, none2, NO_SRC , iPUSH }, /* 57 */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 58 */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 59 */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 5A */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 5B */
|
|
|
+ { regop, none2, NOT_HLL | NO_SRC , iPOP }, /* 5C */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 5D */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 5E */
|
|
|
+ { regop, none2, NO_SRC , iPOP }, /* 5F */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iPUSHA}, /* 60 */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iPOPA }, /* 61 */
|
|
|
+ { memOnly, modrm, TO_REG | NSP , iBOUND}, /* 62 */
|
|
|
+ { none1, none2, OP386 , iINVALID }, /* 63 */
|
|
|
+ { none1, none2, OP386 , iINVALID }, /* 64 */
|
|
|
+ { none1, none2, OP386 , iINVALID }, /* 65 */
|
|
|
+ { none1, none2, OP386 , iINVALID }, /* 66 */
|
|
|
+ { none1, none2, OP386 , iINVALID }, /* 67 */
|
|
|
+ { data2, none2, NO_SRC , iPUSH }, /* 68 */
|
|
|
+ { modrm, data2, TO_REG | NSP , iIMUL }, /* 69 */
|
|
|
+ { data1, none2, S_EXT | NO_SRC , iPUSH }, /* 6A */
|
|
|
+ { modrm, data1, TO_REG | NSP | S_EXT , iIMUL }, /* 6B */
|
|
|
+ { strop, memImp, NOT_HLL | B|IM_OPS , iINS }, /* 6C */
|
|
|
+ { strop, memImp, NOT_HLL | IM_OPS , iINS }, /* 6D */
|
|
|
+ { strop, memImp, NOT_HLL | B|IM_OPS , iOUTS }, /* 6E */
|
|
|
+ { strop, memImp, NOT_HLL | IM_OPS , iOUTS }, /* 6F */
|
|
|
+ { dispS, none2, NOT_HLL , iJO }, /* 70 */
|
|
|
+ { dispS, none2, NOT_HLL , iJNO }, /* 71 */
|
|
|
+ { dispS, none2, 0 , iJB }, /* 72 */
|
|
|
+ { dispS, none2, 0 , iJAE }, /* 73 */
|
|
|
+ { dispS, none2, 0 , iJE }, /* 74 */
|
|
|
+ { dispS, none2, 0 , iJNE }, /* 75 */
|
|
|
+ { dispS, none2, 0 , iJBE }, /* 76 */
|
|
|
+ { dispS, none2, 0 , iJA }, /* 77 */
|
|
|
+ { dispS, none2, 0 , iJS }, /* 78 */
|
|
|
+ { dispS, none2, 0 , iJNS }, /* 79 */
|
|
|
+ { dispS, none2, NOT_HLL , iJP }, /* 7A */
|
|
|
+ { dispS, none2, NOT_HLL , iJNP }, /* 7B */
|
|
|
+ { dispS, none2, 0 , iJL }, /* 7C */
|
|
|
+ { dispS, none2, 0 , iJGE }, /* 7D */
|
|
|
+ { dispS, none2, 0 , iJLE }, /* 7E */
|
|
|
+ { dispS, none2, 0 , iJG }, /* 7F */
|
|
|
+ { immed, data1, B , iINVALID }, /* 80 */
|
|
|
+ { immed, data2, NSP , iINVALID }, /* 81 */
|
|
|
+ { immed, data1, B , iINVALID }, /* 82 */ /* ?? */
|
|
|
+ { immed, data1, NSP | S_EXT , iINVALID }, /* 83 */
|
|
|
+ { modrm, none2, TO_REG | B , iTEST }, /* 84 */
|
|
|
+ { modrm, none2, TO_REG | NSP , iTEST }, /* 85 */
|
|
|
+ { modrm, none2, TO_REG | B , iXCHG }, /* 86 */
|
|
|
+ { modrm, none2, TO_REG | NSP , iXCHG }, /* 87 */
|
|
|
+ { modrm, none2, B , iMOV }, /* 88 */
|
|
|
+ { modrm, none2, 0 , iMOV }, /* 89 */
|
|
|
+ { modrm, none2, TO_REG | B , iMOV }, /* 8A */
|
|
|
+ { modrm, none2, TO_REG , iMOV }, /* 8B */
|
|
|
+ { segrm, none2, NSP , iMOV }, /* 8C */
|
|
|
+ { memOnly, modrm, TO_REG | NSP , iLEA }, /* 8D */
|
|
|
+ { segrm, none2, TO_REG | NSP , iMOV }, /* 8E */
|
|
|
+ { memReg0, none2, NO_SRC , iPOP }, /* 8F */
|
|
|
+ { none1, none2, NO_OPS , iNOP }, /* 90 */
|
|
|
+ { regop, axImp, 0 , iXCHG }, /* 91 */
|
|
|
+ { regop, axImp, 0 , iXCHG }, /* 92 */
|
|
|
+ { regop, axImp, 0 , iXCHG }, /* 93 */
|
|
|
+ { regop, axImp, NOT_HLL , iXCHG }, /* 94 */
|
|
|
+ { regop, axImp, 0 , iXCHG }, /* 95 */
|
|
|
+ { regop, axImp, 0 , iXCHG }, /* 96 */
|
|
|
+ { regop, axImp, 0 , iXCHG }, /* 97 */
|
|
|
+ { alImp, axImp, SRC_B | S_EXT , iSIGNEX}, /* 98 */
|
|
|
+ {axSrcIm, axImp, IM_DST | S_EXT , iSIGNEX}, /* 99 */
|
|
|
+ { dispF, none2, TO_REG , iCALLF }, /* 9A */ // TO_REG set to use SRC when processing setAddress
|
|
|
+ { none1, none2, FLOAT_OP| NO_OPS , iWAIT }, /* 9B */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iPUSHF}, /* 9C */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iPOPF }, /* 9D */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iSAHF }, /* 9E */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iLAHF }, /* 9F */
|
|
|
+ { dispM, axImp, B , iMOV }, /* A0 */
|
|
|
+ { dispM, axImp, 0 , iMOV }, /* A1 */
|
|
|
+ { dispM, axImp, TO_REG | B , iMOV }, /* A2 */
|
|
|
+ { dispM, axImp, TO_REG , iMOV }, /* A3 */
|
|
|
+ { strop, memImp, B | IM_OPS , iMOVS }, /* A4 */
|
|
|
+ { strop, memImp, IM_OPS , iMOVS }, /* A5 */
|
|
|
+ { strop, memImp, B | IM_OPS , iCMPS }, /* A6 */
|
|
|
+ { strop, memImp, IM_OPS , iCMPS }, /* A7 */
|
|
|
+ { data1, axImp, B , iTEST }, /* A8 */
|
|
|
+ { data2, axImp, 0 , iTEST }, /* A9 */
|
|
|
+ { strop, memImp, B | IM_OPS , iSTOS }, /* AA */
|
|
|
+ { strop, memImp, IM_OPS , iSTOS }, /* AB */
|
|
|
+ { strop, memImp, B | IM_OPS , iLODS }, /* AC */
|
|
|
+ { strop, memImp, IM_OPS , iLODS }, /* AD */
|
|
|
+ { strop, memImp, B | IM_OPS , iSCAS }, /* AE */
|
|
|
+ { strop, memImp, IM_OPS , iSCAS }, /* AF */
|
|
|
+ { regop, data1, B , iMOV }, /* B0 */
|
|
|
+ { regop, data1, B , iMOV }, /* B1 */
|
|
|
+ { regop, data1, B , iMOV }, /* B2 */
|
|
|
+ { regop, data1, B , iMOV }, /* B3 */
|
|
|
+ { regop, data1, B , iMOV }, /* B4 */
|
|
|
+ { regop, data1, B , iMOV }, /* B5 */
|
|
|
+ { regop, data1, B , iMOV }, /* B6 */
|
|
|
+ { regop, data1, B , iMOV }, /* B7 */
|
|
|
+ { regop, data2, 0 , iMOV }, /* B8 */
|
|
|
+ { regop, data2, 0 , iMOV }, /* B9 */
|
|
|
+ { regop, data2, 0 , iMOV }, /* BA */
|
|
|
+ { regop, data2, 0 , iMOV }, /* BB */
|
|
|
+ { regop, data2, NOT_HLL , iMOV }, /* BC */
|
|
|
+ { regop, data2, 0 , iMOV }, /* BD */
|
|
|
+ { regop, data2, 0 , iMOV }, /* BE */
|
|
|
+ { regop, data2, 0 , iMOV }, /* BF */
|
|
|
+ { shift, data1, B , iINVALID }, /* C0 */
|
|
|
+ { shift, data1, NSP | SRC_B , iINVALID }, /* C1 */
|
|
|
+ { data2, none2, 0 , iRET }, /* C2 */
|
|
|
+ { none1, none2, NO_OPS , iRET }, /* C3 */
|
|
|
+ { memOnly, modrm, TO_REG | NSP , iLES }, /* C4 */
|
|
|
+ { memOnly, modrm, TO_REG | NSP , iLDS }, /* C5 */
|
|
|
+ { memReg0, data1, B , iMOV }, /* C6 */
|
|
|
+ { memReg0, data2, 0 , iMOV }, /* C7 */
|
|
|
+ { data2, data1, 0 , iENTER}, /* C8 */
|
|
|
+ { none1, none2, NO_OPS , iLEAVE}, /* C9 */
|
|
|
+ { data2, none2, 0 , iRETF }, /* CA */
|
|
|
+ { none1, none2, NO_OPS , iRETF }, /* CB */
|
|
|
+ { const3, none2, NOT_HLL , iINT }, /* CC */
|
|
|
+ { data1,checkInt, NOT_HLL , iINT }, /* CD */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iINTO }, /* CE */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iIRET }, /* Cf */
|
|
|
+ { shift, const1, B , iINVALID }, /* D0 */
|
|
|
+ { shift, const1, SRC_B , iINVALID }, /* D1 */
|
|
|
+ { shift, none1, B , iINVALID }, /* D2 */
|
|
|
+ { shift, none1, SRC_B , iINVALID }, /* D3 */
|
|
|
+ { data1, axImp, NOT_HLL , iAAM }, /* D4 */
|
|
|
+ { data1, axImp, NOT_HLL , iAAD }, /* D5 */
|
|
|
+ { none1, none2, 0 , iINVALID }, /* D6 */
|
|
|
+ { memImp, axImp, NOT_HLL | B| IM_OPS , iXLAT }, /* D7 */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* D8 */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* D9 */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* DA */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* DB */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* DC */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* DD */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* DE */
|
|
|
+ { escop, none2, FLOAT_OP , iESC }, /* Df */
|
|
|
+ { dispS, none2, 0 , iLOOPNE}, /* E0 */
|
|
|
+ { dispS, none2, 0 , iLOOPE}, /* E1 */
|
|
|
+ { dispS, none2, 0 , iLOOP }, /* E2 */
|
|
|
+ { dispS, none2, 0 , iJCXZ }, /* E3 */
|
|
|
+ { data1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* E4 */
|
|
|
+ { data1, axImp, NOT_HLL | NO_SRC , iIN }, /* E5 */
|
|
|
+ { data1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* E6 */
|
|
|
+ { data1, axImp, NOT_HLL | NO_SRC , iOUT }, /* E7 */
|
|
|
+ { dispN, none2, 0 , iCALL }, /* E8 */
|
|
|
+ { dispN, none2, 0 , iJMP }, /* E9 */
|
|
|
+ { dispF, none2, 0 , iJMPF }, /* EA */
|
|
|
+ { dispS, none2, 0 , iJMP }, /* EB */
|
|
|
+ { none1, axImp, NOT_HLL | B|NO_SRC , iIN }, /* EC */
|
|
|
+ { none1, axImp, NOT_HLL | NO_SRC , iIN }, /* ED */
|
|
|
+ { none1, axImp, NOT_HLL | B|NO_SRC , iOUT }, /* EE */
|
|
|
+ { none1, axImp, NOT_HLL | NO_SRC , iOUT }, /* EF */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iLOCK }, /* F0 */
|
|
|
+ { none1, none2, 0 , iINVALID }, /* F1 */
|
|
|
+ { prefix, none2, 0 , iREPNE}, /* F2 */
|
|
|
+ { prefix, none2, 0 , iREPE }, /* F3 */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iHLT }, /* F4 */
|
|
|
+ { none1, none2, NO_OPS , iCMC }, /* F5 */
|
|
|
+ { arith, none1, B , iINVALID }, /* F6 */
|
|
|
+ { arith, none1, NSP , iINVALID }, /* F7 */
|
|
|
+ { none1, none2, NO_OPS , iCLC }, /* F8 */
|
|
|
+ { none1, none2, NO_OPS , iSTC }, /* F9 */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iCLI }, /* FA */
|
|
|
+ { none1, none2, NOT_HLL | NO_OPS , iSTI }, /* FB */
|
|
|
+ { none1, none2, NO_OPS , iCLD }, /* FC */
|
|
|
+ { none1, none2, NO_OPS , iSTD }, /* FD */
|
|
|
+ { trans, none1, B , iINVALID }, /* FE */
|
|
|
+ { trans, none1, NSP , iINVALID } /* FF */
|
|
|
} ;
|
|
|
|
|
|
static uint16_t SegPrefix, RepPrefix;
|
|
|
-static const uint8_t *pInst; /* Ptr. to current uint8_t of instruction */
|
|
|
-static ICODE * pIcode; /* Ptr to Icode record filled in by scan() */
|
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+static const uint8_t *pInst; /* Ptr. to current uint8_t of instruction */
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+static ICODE * pIcode; /* Ptr to Icode record filled in by scan() */
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static void decodeBranchTgt(x86_insn_t &insn)
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@@ -338,7 +337,7 @@ static void decodeBranchTgt(x86_insn_t &insn)
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pIcode->ll()->replaceSrc((uint32_t)addr);
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pIcode->ll()->setFlags(I);
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// PROG &prog(Project::get()->prog);
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- // long off = (short)getWord(); /* Signed displacement */
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+ // long off = (short)getWord(); /* Signed displacement */
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// assert(addr==(uint32_t)(off + (unsigned)(pInst - prog.image())));
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}
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@@ -538,7 +537,7 @@ eErrorId scan(uint32_t ip, ICODE &p)
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int op;
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p = ICODE();
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p.type = LOW_LEVEL_ICODE;
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- p.ll()->label = ip; /* ip is absolute offset into image*/
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+ p.ll()->label = ip; /* ip is absolute offset into image*/
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if (ip >= (uint32_t)prog.cbImage)
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{
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return (IP_OUT_OF_RANGE);
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@@ -557,13 +556,13 @@ eErrorId scan(uint32_t ip, ICODE &p)
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do
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{
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- op = *pInst++; /* First state - trivial */
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+ op = *pInst++; /* First state - trivial */
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/* Convert to Icode.opcode */
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p.ll()->set(stateTable[op].opcode,stateTable[op].flg & ICODEMASK);
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- (*stateTable[op].state1)(op); /* Second state */
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- (*stateTable[op].state2)(op); /* Third state */
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+ (*stateTable[op].state1)(op); /* Second state */
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+ (*stateTable[op].state2)(op); /* Third state */
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- } while (stateTable[op].state1 == prefix); /* Loop if prefix */
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+ } while (stateTable[op].state1 == prefix); /* Loop if prefix */
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if(p.insn.group == x86_insn_t::insn_controlflow)
|
|
|
{
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if(p.insn.x86_get_branch_target())
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@@ -571,7 +570,7 @@ eErrorId scan(uint32_t ip, ICODE &p)
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}
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// LLOperand conv = convertOperand(*p.insn.get_dest());
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// assert(conv==p.ll()->dst);
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|
- if (p.ll()->getOpcode())
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+ if (p.ll()->getOpcode()!=iINVALID)
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|
{
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|
/* Save bytes of image used */
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|
p.ll()->numBytes = (uint8_t)((pInst - prog.image()) - ip);
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@@ -591,8 +590,8 @@ eErrorId scan(uint32_t ip, ICODE &p)
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static bool relocItem(const uint8_t *p)
|
|
|
{
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PROG &prog(Project::get()->prog);
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|
- int i;
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- uint32_t off = p - prog.image();
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+ int i;
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|
+ uint32_t off = p - prog.image();
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for (i = 0; i < prog.cReloc; i++)
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if (prog.relocTable[i] == off)
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@@ -623,9 +622,9 @@ static int signex(uint8_t b)
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|
/****************************************************************************
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|
* setAddress - Updates the source or destination field for the current
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- * icode, based on fdst and the TO_REG flag.
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- * Note: fdst == true is for the r/m part of the field (dest, unless TO_REG)
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- * fdst == false is for reg part of the field
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+ * icode, based on fdst and the TO_REG flag.
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|
+ * Note: fdst == true is for the r/m part of the field (dest, unless TO_REG)
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|
+ * fdst == false is for reg part of the field
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|
|
***************************************************************************/
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|
static void setAddress(int i, bool fdst, uint16_t seg, int16_t reg, uint16_t off)
|
|
|
{
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|
@@ -635,19 +634,19 @@ static void setAddress(int i, bool fdst, uint16_t seg, int16_t reg, uint16_t off
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|
/* Set segment. A later procedure (lookupAddr in proclist.c) will
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|
* provide the value of this segment in the field segValue.
|
|
|
*/
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|
- if (seg) /* segment override */
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|
+ if (seg) /* segment override */
|
|
|
{
|
|
|
pm->seg = pm->segOver = (eReg)seg;
|
|
|
}
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|
else
|
|
|
- { /* no override, check indexed register */
|
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|
+ { /* no override, check indexed register */
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|
|
if ((reg >= INDEX_BX_SI) and (reg == INDEX_BP_SI or reg == INDEX_BP_DI or reg == INDEX_BP))
|
|
|
{
|
|
|
- pm->seg = rSS; /* indexed on bp */
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|
+ pm->seg = rSS; /* indexed on bp */
|
|
|
}
|
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|
else
|
|
|
{
|
|
|
- pm->seg = rDS; /* any other indexed reg */
|
|
|
+ pm->seg = rDS; /* any other indexed reg */
|
|
|
}
|
|
|
}
|
|
|
|
|
@@ -658,7 +657,7 @@ static void setAddress(int i, bool fdst, uint16_t seg, int16_t reg, uint16_t off
|
|
|
pm->regi = Machine_X86::subRegL(pm->regi);
|
|
|
}
|
|
|
|
|
|
- if (seg) /* So we can catch invalid use of segment overrides */
|
|
|
+ if (seg) /* So we can catch invalid use of segment overrides */
|
|
|
{
|
|
|
SegPrefix = 0;
|
|
|
}
|
|
@@ -674,7 +673,7 @@ static void rm(int i)
|
|
|
uint8_t rm = *pInst++ & 7;
|
|
|
|
|
|
switch (mod) {
|
|
|
- case 0: /* No disp unless rm == 6 */
|
|
|
+ case 0: /* No disp unless rm == 6 */
|
|
|
if (rm == 6) {
|
|
|
setAddress(i, true, SegPrefix, 0, getWord());
|
|
|
pIcode->ll()->setFlags(WORD_OFF);
|
|
@@ -683,16 +682,16 @@ static void rm(int i)
|
|
|
setAddress(i, true, SegPrefix, rm + INDEX_BX_SI, 0);
|
|
|
break;
|
|
|
|
|
|
- case 1: /* 1 uint8_t disp */
|
|
|
+ case 1: /* 1 uint8_t disp */
|
|
|
setAddress(i, true, SegPrefix, rm+INDEX_BX_SI, (uint16_t)signex(*pInst++));
|
|
|
break;
|
|
|
|
|
|
- case 2: /* 2 uint8_t disp */
|
|
|
+ case 2: /* 2 uint8_t disp */
|
|
|
setAddress(i, true, SegPrefix, rm + INDEX_BX_SI, getWord());
|
|
|
pIcode->ll()->setFlags(WORD_OFF);
|
|
|
break;
|
|
|
|
|
|
- case 3: /* reg */
|
|
|
+ case 3: /* reg */
|
|
|
setAddress(i, true, 0, rm + rAX, 0);
|
|
|
break;
|
|
|
}
|
|
@@ -718,7 +717,7 @@ static void modrm(int i)
|
|
|
****************************************************************************/
|
|
|
static void segrm(int i)
|
|
|
{
|
|
|
- int reg = REG(*pInst) + rES;
|
|
|
+ int reg = REG(*pInst) + rES;
|
|
|
|
|
|
if (reg > rDS or (reg == rCS and (stateTable[i].flg & TO_REG)))
|
|
|
pIcode->ll()->setOpcode((llIcode)0); // setCBW because it has that index
|
|
@@ -787,7 +786,7 @@ static void memImp(int i)
|
|
|
static void memOnly(int )
|
|
|
{
|
|
|
if ((*pInst & 0xC0) == 0xC0)
|
|
|
- pIcode->ll()->setOpcode((llIcode)0);
|
|
|
+ pIcode->ll()->setOpcode(iINVALID);
|
|
|
}
|
|
|
|
|
|
|
|
@@ -797,7 +796,7 @@ static void memOnly(int )
|
|
|
static void memReg0(int i)
|
|
|
{
|
|
|
if (REG(*pInst) or (*pInst & 0xC0) == 0xC0)
|
|
|
- pIcode->ll()->setOpcode((llIcode)0);
|
|
|
+ pIcode->ll()->setOpcode(iINVALID);
|
|
|
else
|
|
|
rm(i);
|
|
|
}
|
|
@@ -814,7 +813,7 @@ static void immed(int i)
|
|
|
rm(i);
|
|
|
|
|
|
if (pIcode->ll()->getOpcode() == iADD or pIcode->ll()->getOpcode() == iSUB)
|
|
|
- pIcode->ll()->clrFlags(NOT_HLL); /* Allow ADD/SUB SP, immed */
|
|
|
+ pIcode->ll()->clrFlags(NOT_HLL); /* Allow ADD/SUB SP, immed */
|
|
|
}
|
|
|
|
|
|
|
|
@@ -826,7 +825,7 @@ static void shift(int i)
|
|
|
static llIcode shiftTable[8] =
|
|
|
{
|
|
|
(llIcode)iROL, (llIcode)iROR, (llIcode)iRCL, (llIcode)iRCR,
|
|
|
- (llIcode)iSHL, (llIcode)iSHR, (llIcode)0, (llIcode)iSAR};
|
|
|
+ (llIcode)iSHL, (llIcode)iSHR, (llIcode)0, (llIcode)iSAR};
|
|
|
|
|
|
pIcode->ll()->setOpcode(shiftTable[REG(*pInst)]);
|
|
|
rm(i);
|
|
@@ -841,8 +840,8 @@ static void trans(int i)
|
|
|
{
|
|
|
static llIcode transTable[8] =
|
|
|
{
|
|
|
- (llIcode)iINC, iDEC, (llIcode)iCALL, (llIcode)iCALLF,
|
|
|
- (llIcode)iJMP, (llIcode)iJMPF,(llIcode)iPUSH, (llIcode)0
|
|
|
+ iINC, iDEC, iCALL, iCALLF,
|
|
|
+ iJMP, iJMPF,iPUSH, (llIcode)0
|
|
|
};
|
|
|
LLInst *ll = pIcode->ll();
|
|
|
// if(transTable[REG(*pInst)]==iPUSH) {
|
|
@@ -868,8 +867,8 @@ static void arith(int i)
|
|
|
uint8_t opcode;
|
|
|
static llIcode arithTable[8] =
|
|
|
{
|
|
|
- iTEST, (llIcode)0, iNOT, iNEG,
|
|
|
- iMUL , iIMUL, iDIV, iIDIV
|
|
|
+ iTEST, iINVALID, iNOT, iNEG,
|
|
|
+ iMUL , iIMUL, iDIV, iIDIV
|
|
|
};
|
|
|
opcode = arithTable[REG(*pInst)];
|
|
|
pIcode->ll()->setOpcode((llIcode)opcode);
|
|
@@ -884,7 +883,7 @@ static void arith(int i)
|
|
|
else if (not (opcode == iNOT or opcode == iNEG))
|
|
|
{
|
|
|
pIcode->ll()->replaceSrc( pIcode->ll()->m_dst );
|
|
|
- setAddress(i, true, 0, rAX, 0); /* dst = AX */
|
|
|
+ setAddress(i, true, 0, rAX, 0); /* dst = AX */
|
|
|
}
|
|
|
else if (opcode == iNEG or opcode == iNOT)
|
|
|
pIcode->ll()->setFlags(NO_SRC);
|
|
@@ -919,7 +918,7 @@ static void data2(int )
|
|
|
* but this field is being used as the number of bytes to allocate
|
|
|
* on the stack. The procedure level is stored in the immediate
|
|
|
* field. There is no source operand; therefore, the flag flg is
|
|
|
- * set to NO_OPS. */
|
|
|
+ * set to NO_OPS. */
|
|
|
if (pIcode->ll()->getOpcode() == iENTER)
|
|
|
{
|
|
|
pIcode->ll()->m_dst.off = getWord();
|
|
@@ -946,7 +945,7 @@ static void dispN(int )
|
|
|
{
|
|
|
|
|
|
//PROG &prog(Project::get()->prog);
|
|
|
- /*long off = (short)*/getWord(); /* Signed displacement */
|
|
|
+ /*long off = (short)*/getWord(); /* Signed displacement */
|
|
|
|
|
|
/* Note: the result of the subtraction could be between 32k and 64k, and
|
|
|
still be positive; it is an offset from prog.Image. So this must be
|
|
@@ -960,7 +959,7 @@ static void dispN(int )
|
|
|
***************************************************************************/
|
|
|
static void dispS(int )
|
|
|
{
|
|
|
- /*long off =*/ signex(*pInst++); /* Signed displacement */
|
|
|
+ /*long off =*/ signex(*pInst++); /* Signed displacement */
|
|
|
|
|
|
// decodeBranchTgt();
|
|
|
}
|
|
@@ -985,7 +984,7 @@ static void dispF(int i)
|
|
|
****************************************************************************/
|
|
|
static void prefix(int )
|
|
|
{
|
|
|
- if (pIcode->ll()->getOpcode() == iREPE or pIcode->ll()->getOpcode() == iREPNE)
|
|
|
+ if ((pIcode->ll()->getOpcode() == iREPE) or (pIcode->ll()->getOpcode() == iREPNE))
|
|
|
RepPrefix = pIcode->ll()->getOpcode();
|
|
|
else
|
|
|
SegPrefix = pIcode->ll()->getOpcode();
|
|
@@ -993,8 +992,8 @@ static void prefix(int )
|
|
|
|
|
|
inline void BumpOpcode(LLInst &ll)
|
|
|
{
|
|
|
- llIcode ic((llIcode)ll.getOpcode());
|
|
|
- ic = (llIcode)(((int)ic)+1); // Bump this icode via the int type
|
|
|
+ llIcode ic(ll.getOpcode());
|
|
|
+ ic = (llIcode)(((int)ic)+1); // Bump this icode via the int type
|
|
|
ll.setOpcode(ic);
|
|
|
}
|
|
|
|