ns_as.6 3.3 KB

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  1. .\" $Id$
  2. .TH NS_AS 6 "$Revision$"
  3. .ad
  4. .SH NAME
  5. ns_as \- National Semiconductor 16032 assembler
  6. .SH SYNOPSIS
  7. ~em/lib.bin/ns/as [options] argument ...
  8. .SH DESCRIPTION
  9. The assembler for the National Semiconductor 16032 is based
  10. on the universal assembler \fIuni_ass\fP(6). It is an assembler generating
  11. relocatable object code in \fIack.out\fP(5) format.
  12. The mnemonics for the instructions are taken from the NS-16000
  13. Programmers Reference Manual.
  14. The syntax of the instruction operands is similar to the syntax used
  15. in that manual,
  16. although the meaning is sometimes quite different.
  17. The cross assembler issued by National Semiconductor
  18. associates a type (sb,..) with each symbol
  19. and automatically generates sb offset mode for symbols of type sb.
  20. This assembler does not record the types,
  21. each symbol simply produces an untyped value.
  22. .sp 1
  23. The possible operands are:
  24. .IP "general registers
  25. These are called r0, r1, r2, r3, r4, r5, r6 and r7.
  26. The symbol REG is used to indicate use of any of these 8 registers
  27. in other operands.
  28. .IP "floating point registers
  29. These are called f0, f1, f2, f3, f4, f5, f6 and f7.
  30. .IP "dedicated registers
  31. All types of dedicated registers can be used with the appropriate instructions.
  32. Examples: sb, fp, intbase, ptb1.
  33. .IP expr(REG)
  34. register relative
  35. .IP expr(fp)
  36. frame pointer relative
  37. .IP expr(sb)
  38. static base relative
  39. .IP expr(sp)
  40. stack pointer relative
  41. .IP expr(pc)
  42. program counter relative,
  43. the expression indicates a location in memory from which the current value
  44. of '.' is subtracted by the assembler.
  45. E.g. "movw label(pc),r0; label: .word ..." moves the contents of the word
  46. at \fIlabel\fP to r0.
  47. .IP expr(expr(fb))
  48. .IP expr(expr(sb))
  49. .IP expr(expr(sp))
  50. memory relative
  51. .IP @expr
  52. absolute
  53. .IP external(expr)+expr
  54. external
  55. .IP tos
  56. top of stack.
  57. .PD 0
  58. .sp 1
  59. .PP
  60. Usage of the scaled index operands is allowed.
  61. .br
  62. The convention used to indicate offset length by appending :B, :W or :D
  63. to offsets is not implemented.
  64. The assembler tries to find out the minimal size needed for any constant
  65. in an operand of the instruction placed in the text segment.
  66. Offsets in instructions outside \fI.text\fP are always four bytes.
  67. .PP
  68. All special operands, e.g. register list, configuration list, have
  69. the same format as in the Programmers Reference Manual.
  70. .PP
  71. Whenever possible the assembler automatically uses the short(quick) opcodes for
  72. jsr(jsb), jump(br), add(addq), cmp(cmpq) and mov(movq).
  73. .SH BUGS
  74. The data types floating and packed-decimal are not supported.
  75. .br
  76. Initialization of floating-point numbers is not possible.
  77. .br
  78. The mnemonics of the slave processor instructions are poorly documented,
  79. the format of the NS-16032S-6 data sheet is used.
  80. .br
  81. The documentation gave contradictory information on the format
  82. of a few instructions.
  83. .IP -
  84. Three different schemes are presented for the encoding
  85. of the last operand of the block instructions.
  86. .IP -
  87. Two different values are specified for
  88. the encoding of the msr register in smr and lmr instructions.
  89. .IP -
  90. Two different possibilities are given for the encoding of
  91. the instructions movsu and movus.
  92. .SH "SEE ALSO"
  93. uni_ass(6)
  94. ack(1),
  95. ack.out(5),
  96. .br
  97. NS 16000 Programmers Reference Manual. Publ. no. 420306565-001PB
  98. .br
  99. NS16032S-6, NS16032S-4 High Performance Microprocessors, november 1982
  100. .br
  101. publ. no. 420306619-002A.
  102. .PD 0
  103. .SH AUTHOR
  104. Ed Keizer, Vrije Universiteit