6805_as.6 2.3 KB

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  1. .\" $Id$
  2. .TH 6805_AS 6 "$Revision$"
  3. .ad
  4. .SH NAME
  5. 6805_as \- assembler for Motorola 6805
  6. .SH SYNOPSIS
  7. ~em/lib.bin/6805/as [options] argument ...
  8. .SH DESCRIPTION
  9. This assembler is made with the general framework
  10. described in \fIuni_ass\fP(6). It is an assembler generating relocatable
  11. object code in \fIack.out\fP(5) format.
  12. .SH SYNTAX
  13. .IP registers
  14. The 6805 has an accumulator register A and an index register X. An
  15. instruction (from the read-modify-write group) that references the
  16. A-register has an "a" suffixed to the mnemonic. In a similar way
  17. the X-register, apart from indexing operations, is addressed with
  18. an "x" suffix, i.e. "lsra" and "negx".
  19. .IP "addressing modes"
  20. The assembler automatically selects the shortest opcode if
  21. appropriate and possible. Thus "sub 10" will use the direct
  22. addressing mode whereas "neg 0,x" will use indexed (no offset) mode.
  23. There are sick constructions where the assembler can't find out
  24. the shortest form in time. In those cases the longest form is used.
  25. .br
  26. Branches are handled in much the same way. If a branch is out of
  27. range it is replaced by a reversed condition branch, followed by
  28. a jump, automatically.
  29. .sp
  30. .nf
  31. .ta 8n 16n 24n 32n 40n 48n
  32. syntax meaning (name)
  33. #expr a one byte value (immediate)
  34. <expr 1-byte zero page address. Allowed in
  35. the register/memory and read-modify-
  36. write instruction groups. (direct)
  37. >expr 2-byte address. Allowed in the register
  38. memory group. (extended)
  39. expr 1-byte address if appropriate, 2-byte
  40. in other cases. (auto-direct/extended)
  41. ,x indexed with zero offset. (indexed)
  42. <expr,x indexed with 8 bit offset. (indexed-1)
  43. >expr,x indexed with 16 bit offset. (indexed-2)
  44. expr,x indexed with the shortest possible off-
  45. set. (auto indexed)
  46. bit,expr bit number and direct address.
  47. (bit set/clear)
  48. bit,expr,tag bit number, direct address and branch
  49. tag. Automatically changed to reversed
  50. condition branch and jump if appropri-
  51. ate. (bit test and branch)
  52. tag branch tag. Converted to reversed con-
  53. dition branch and jump if appropriate.
  54. (branch)
  55. .fi
  56. .IP "PSEUDO INSTRUCTIONS"
  57. .cmos assemble cmos version instructions.
  58. .SH "SEE ALSO"
  59. uni_ass(6),
  60. ack(1),
  61. ack.out(5)
  62. .br
  63. M6805 HMOS, M146805 CMOS family, Motorola,
  64. Prentice-Hall, Inc., 1983, (ISBN 0-13-541375-3).
  65. .SH AUTHOR
  66. Written by Gijs Mos.
  67. Not a member of the ACK group.
  68. .SH BUGS
  69. The assembler has not been well tested.