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  1. rcsid = "$Id$"
  2. /*****************************************************************
  3. * *
  4. * N S 1 6 0 3 2 B A C K - E N D T A B L E *
  5. * *
  6. * *
  7. * Author: Annita Wilschut. *
  8. * *
  9. * Corrections: Nigel Hall *
  10. * *
  11. *****************************************************************/
  12. /* The handling of arrays was not complete. Tables extended
  13. * in order to handle access to other lexical levels between
  14. * local and global. Corrections to ordering of tokens made.
  15. *
  16. * The token length was added to cope with the length field
  17. * of MOVMi instructions. The lengths adjusted by division by 4.
  18. *
  19. * The compare procedures did not return a result. Caused
  20. * an extra word to be popped off the stack. The "cmi txx ior" &
  21. * "txx and" sequences needed their branch criterion inverting.
  22. *
  23. */
  24. /*
  25. * Deze tabel implementeert, naast gewone, ook floating point
  26. * instructies. Bij gebrek aan een floating point processor
  27. * is het betreffende onderdeel van de tabel echter niet
  28. * getest. Wanneer NOFLOAT "aan" is worden er zeker geen
  29. * floating point instructies gegenereerd. Na verwijdering van
  30. * alle ifdef's worden er bij de vertaling van een programma dat
  31. * geen floating point gebruikt, hoogst waarschijnlijk ook
  32. * geen floating point instructies gegenereerd. Dit is echter niet
  33. * uitgebreid getest.
  34. */
  35. EM_WSIZE=4
  36. EM_PSIZE=4
  37. EM_BSIZE=8
  38. #define NOFLOAT
  39. PROPERTIES
  40. REG /* Normal registers */
  41. FREG /* Floating point registers */
  42. DFREG(8) /* double floating reg for double precision */
  43. MEMREG /* sp, fp en sb */
  44. REGPAIR(8) /* register pair for extended integer instr */
  45. PROGRAMCOUNTER
  46. STACKPOINTER
  47. STATICBASE
  48. LOCALBASE
  49. PROCREG /* processor register - used by LPRi & SPRi */
  50. REGISTERS
  51. r0,r1,r2,r3 : REG.
  52. r7,r4,r5,r6 : REG regvar .
  53. f0,f1,f2,f3,f4,f5,f6,f7 : FREG.
  54. f01("f0")=f0+f1,
  55. f23("f2")=f2+f3,
  56. f45("f4")=f4+f5,
  57. f67("f6")=f6+f7 : DFREG.
  58. r01("r0")=r0+r1,r23("r2")=r2+r3 : REGPAIR.
  59. sp : STACKPOINTER, MEMREG, PROCREG.
  60. pc : PROGRAMCOUNTER.
  61. fp : LOCALBASE, MEMREG, PROCREG.
  62. sb : STATICBASE, MEMREG, PROCREG.
  63. TOKENS
  64. const4 = { INT num; } 4 num .
  65. LOCAL = { INT ind;} 4 ind "(fp)" .
  66. DLOCAL = { INT ind;} 8 ind "(fp)".
  67. addr_local = { INT ind; } 4 .
  68. addr_external = { ADDR disp; } 4 disp .
  69. regrel1 = { REG reg; ADDR disp; } 4 disp "(" reg ")" .
  70. regrel2 = { REG reg; ADDR disp; } 4 disp "(" reg ")" .
  71. regrel4 = { REG reg; ADDR disp; } 4 disp "(" reg ")" .
  72. regrel8 = { REG reg; ADDR disp; } 8 disp "(" reg ")" .
  73. memregrel1 = { MEMREG reg; ADDR disp; } 4 disp "(" reg ")" .
  74. memregrel2 = { MEMREG reg; ADDR disp; } 4 disp "(" reg ")" .
  75. memregrel4 = { MEMREG reg; ADDR disp; } 4 disp "(" reg ")" .
  76. memregrel8 = { MEMREG reg; ADDR disp; } 8 disp "(" reg ")" .
  77. memrel1 = { MEMREG reg; ADDR disp1; ADDR disp2; } 4 disp2 "("
  78. disp1 "(" reg "))" .
  79. memrel2 = { MEMREG reg; ADDR disp1; ADDR disp2; } 4 disp2 "("
  80. disp1 "(" reg "))" .
  81. memrel4 = { MEMREG reg; ADDR disp1; ADDR disp2; } 4 disp2 "("
  82. disp1 "(" reg "))" .
  83. memrel8 = { MEMREG reg; ADDR disp1; ADDR disp2; } 8 disp2 "("
  84. disp1 "(" reg "))" .
  85. absolute1 = { ADDR disp; } 4 "@" disp .
  86. absolute2 = { ADDR disp; } 4 "@" disp .
  87. absolute4 = { ADDR disp; } 4 "@" disp .
  88. absolute8 = { ADDR disp; } 8 "@" disp .
  89. TOS = {} 4 "tos" .
  90. regcon4 = { REG reg; ADDR disp; } 4 .
  91. memregcon4 = { MEMREG reg; ADDR disp; } 4 .
  92. memregrelcon4 = { MEMREG reg; ADDR disp1; ADDR disp2;} 4 .
  93. label = {ADDR disp; } 4 disp .
  94. regrelsid = {INT ind; REG reg1; REG reg2; } 4 ind "(" reg1
  95. ")[" reg2 ":d]" .
  96. memregrelsid = {INT ind; MEMREG reg1; REG reg2; } 4 ind "(" reg1
  97. ")[" reg2 ":d]" .
  98. abssid = {ADDR disp; REG reg; } 4 "@" disp "[" reg ":d]" .
  99. fprelsid = {ADDR disp1; ADDR disp2; REG reg; } 4
  100. disp2 "(" disp1 "(fp))[" reg ":d]" .
  101. sprelsid = {ADDR disp1; ADDR disp2; REG reg; } 4
  102. disp2 "(" disp1 "(sp))[" reg ":d]" .
  103. SETS
  104. src1 = regrel1 + memregrel1 + memrel1 + absolute1 .
  105. src2 = regrel2 + memregrel2 + memrel2 + absolute2 .
  106. src4 = REG + const4 + LOCAL + regrel4 + memrel4 +
  107. memregrel4 + regrelsid + memregrelsid + abssid + absolute4 +
  108. addr_external.
  109. con4 = regcon4 + memregcon4 + memregrelcon4 .
  110. tossrc4 = TOS + src4 .
  111. consrc4 = con4 + src4 .
  112. fsrc4 = FREG + LOCAL + regrel4 + memrel4 +
  113. memregrel4 + memregrelsid + abssid + absolute4 .
  114. tosfsrc4 = TOS + fsrc4 .
  115. fsrc8 = DFREG + DLOCAL + regrel8 + memrel8 +
  116. memregrel8 + absolute8 .
  117. tosfsrc8 = TOS + fsrc8 .
  118. dst1 = src1 .
  119. tosdst1 = TOS + dst1 .
  120. dst2 = src2 .
  121. tosdst2 = TOS + dst2 .
  122. dst4 = REG + LOCAL + regrel4 + memregrel4 + memrel4 +
  123. absolute4 + regrelsid + memregrelsid + abssid .
  124. tosdst4 = TOS + dst4 .
  125. fdst4 = FREG + LOCAL + regrel4 + memregrel4 + memrel4 +
  126. absolute4 + regrelsid + memregrelsid + abssid .
  127. tosfdst4 = TOS + fdst4 .
  128. fdst8 = fsrc8 .
  129. tosfdst8 = tosfsrc8 .
  130. regrel = regrel1 + regrel2 + regrel4 +regrel8 .
  131. memregrel = memregrel1 + memregrel2 + memregrel4 +memregrel8 .
  132. memrel = memrel1 + memrel2 + memrel4 +memrel8 .
  133. rel = regrel + memregrel + memrel + regrelsid + memregrelsid
  134. + fprelsid + sprelsid .
  135. absolute = absolute1 + absolute2 + absolute4 + absolute8 + abssid .
  136. regs = REG + FREG + DFREG + MEMREG + REGPAIR .
  137. allmincon = ALL - (regs + const4 + addr_local + addr_external
  138. + regcon4 + memregcon4) .
  139. src24 = src2 + src4 .
  140. src124 = src1 + src2 + src4 .
  141. tossrc24 = TOS + src24 .
  142. tossrc124 = TOS + src124 .
  143. INSTRUCTIONS
  144. movb tossrc124:ro, tosdst1:wo .
  145. movw tossrc24:ro, tosdst2:wo .
  146. movd tossrc4:ro, tosdst4:wo .
  147. movf tosfsrc4:ro, tosfdst4:wo .
  148. movl tosfsrc8:ro, tosfdst8:wo .
  149. movdf tossrc4:ro, tosfdst4:wo .
  150. movdl tossrc4:ro, tosfdst8:wo .
  151. movfl tosfsrc4:ro, tosfdst8:wo .
  152. movlf tosfsrc8:ro, tosfdst4:wo .
  153. truncfd tosfsrc4:ro, tosdst4:wo .
  154. truncld tosfsrc8:ro, tosdst4:wo .
  155. cmpb tossrc124:ro, src1:ro .
  156. cmpw tossrc24:ro, src2:ro .
  157. cmpd tossrc4:ro, tossrc4:ro .
  158. cmpf tosfsrc4:ro, tosfsrc4:ro .
  159. cmpl tosfsrc8:ro, tosfsrc8:ro .
  160. addd tossrc4:ro, tosdst4:rw .
  161. addcd tossrc4:ro, tosdst4:rw .
  162. addf tosfsrc4:ro, tosfdst4:rw .
  163. addl tosfsrc8:ro, tosfdst8:rw .
  164. subd tossrc4:ro, tosdst4:rw .
  165. subcd tossrc4:ro, tosdst4:rw .
  166. subf tosfsrc4:ro, tosfdst4:rw .
  167. subl tosfsrc8:ro, tosfdst8:rw .
  168. muld tossrc4:ro, tosdst4:rw .
  169. mulf tosfsrc4:ro, tosfdst4:rw .
  170. mull tosfsrc8:ro, tosfdst8:rw .
  171. quod tossrc4:ro, tosdst4:rw .
  172. divd tossrc4:ro, tosdst4:rw .
  173. divf tosfsrc4:ro, tosfdst4:rw .
  174. divl tosfsrc8:ro, tosfdst8:rw .
  175. remd tossrc4:ro, tosdst4:rw .
  176. modd tossrc4:ro, tosdst4:rw .
  177. negd tossrc4:ro, tosdst4:wo .
  178. negf tosfsrc4:ro, tosfdst4:wo .
  179. negl tosfsrc8:ro, tosfdst8:wo .
  180. roundfd tosfsrc4:ro, tosdst4:wo .
  181. roundld tosfsrc8:ro, tosdst4:wo .
  182. andd tossrc4:ro, tosdst4:wo .
  183. ord tossrc4:ro, tosdst4:wo .
  184. xord tossrc4:ro, tosdst4:rw .
  185. comd tossrc4:ro, tosdst4:rw .
  186. ashd tossrc124:ro, tosdst4:rw .
  187. lshd tossrc124:ro, tosdst4:rw .
  188. rotd tossrc124:ro, tosdst4:rw .
  189. movzbd tossrc124:ro, tosdst4:wo .
  190. movzwd tossrc24:ro, tosdst4:wo .
  191. movxbd tossrc124:ro, tosdst4:wo .
  192. movxwd tossrc124:ro, tosdst4:wo .
  193. addr tosdst4:ro, tosdst4:wo .
  194. movqd const4:ro, tosdst4:wo .
  195. cmpqd const4:ro, tossrc4:ro .
  196. meid tossrc4:ro, REGPAIR:rw .
  197. sxx tosdst4:wo .
  198. seqd tosdst4:wo .
  199. sned tosdst4:wo .
  200. sltd tosdst4:wo .
  201. sled tosdst4:wo .
  202. sgtd tosdst4:wo .
  203. sged tosdst4:wo .
  204. shid tosdst4:wo .
  205. sfsd tosdst4:wo .
  206. tbitd tossrc4:ro, tosdst4:ro .
  207. cbitd tossrc4:ro, tosdst4:rw .
  208. sbitd tossrc4:ro, tosdst4:rw .
  209. movmd tossrc4:ro, tosdst4:rw, const4 .
  210. indexd REG, tossrc4:ro, tossrc4:ro .
  211. brxx label .
  212. beq label .
  213. bne label .
  214. ble label .
  215. blt label .
  216. bge label .
  217. bgt label .
  218. bfc label .
  219. bfs label .
  220. blo label .
  221. bls label .
  222. bhs label .
  223. bhi label .
  224. br label .
  225. acbd const4:ro, tosdst4:rw, label .
  226. jsr tosdst4+label .
  227. ret const4:ro .
  228. adjspd tossrc4:ro .
  229. exit label .
  230. lprd PROCREG:rw, tossrc4:ro .
  231. sprd PROCREG:ro, tossrc4:rw .
  232. MOVES
  233. from memregrelcon4 to tosdst4
  234. gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, %2
  235. from regcon4 to tosdst4
  236. gen addr {regrel4, %1.reg, %1.disp}, %2
  237. from memregcon4 to tosdst4
  238. gen addr {memregrel4, %1.reg, %1.disp}, %2
  239. from tossrc4 to tosdst4
  240. gen movd %1, %2
  241. from tossrc124 to tosdst1
  242. gen movb %1, %2
  243. from tossrc24 to tosdst2
  244. gen movw %1, %2
  245. #ifndef NOFLOAT
  246. from tosfsrc4 to FREG
  247. gen movf %1, %2
  248. from FREG to tosfdst4
  249. gen movf %1, %2
  250. from tosfsrc8 to DFREG
  251. gen movl %1, %2
  252. from DFREG to tosfdst8
  253. gen movl %1, %2
  254. #endif
  255. STACKINGRULES
  256. from src1 to STACK
  257. gen movzbd %1, {TOS}
  258. from src2 to STACK
  259. gen movzwd %1, {TOS}
  260. from src4 to STACK
  261. gen movd %1, {TOS}
  262. #ifndef NOFLOAT
  263. from FREG to STACK
  264. gen movf %1, {TOS}
  265. from DFREG to STACK
  266. gen movl %1, {TOS}
  267. #endif
  268. from MEMREG to STACK
  269. gen addr {memregrel4, %1, 0}, {TOS}
  270. from addr_local to STACK
  271. gen addr {memregrel4, fp, %1.ind}, {TOS}
  272. from regcon4 to STACK
  273. gen addr {regrel4, %1.reg, %1.disp}, {TOS}
  274. from memregcon4 to STACK
  275. gen addr {memregrel4, %1.reg, %1.disp}, {TOS}
  276. from memregrelcon4 to STACK
  277. gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, {TOS}
  278. from DLOCAL to STACK
  279. gen movd {LOCAL, %1.ind+4}, {TOS}
  280. movd {LOCAL, %1.ind}, {TOS}
  281. from absolute8 to STACK
  282. gen movd {absolute4, %1.disp+4}, {TOS}
  283. movd {absolute4, %1.disp}, {TOS}
  284. from memrel8 to STACK
  285. gen movd {memrel4, %1.reg, %1.disp1, %1.disp2+4}, {TOS}
  286. movd {memrel4, %1.reg, %1.disp1, %1.disp2}, {TOS}
  287. from regrel8 to STACK
  288. gen movd {regrel4, %1.reg, %1.disp+4}, {TOS}
  289. movd {regrel4, %1.reg, %1.disp}, {TOS}
  290. from memregrel8 to STACK
  291. gen movd {memregrel4, %1.reg, %1.disp+4}, {TOS}
  292. movd {memregrel4, %1.reg, %1.disp}, {TOS}
  293. COERCIONS
  294. from STACK
  295. uses REG
  296. gen move {TOS}, %a yields %a
  297. #ifndef NOFLOAT
  298. from STACK
  299. uses FREG
  300. gen move {TOS}, %a yields %a
  301. from STACK
  302. uses DFREG
  303. gen move {TOS}, %a yields %a
  304. #endif
  305. from STACK
  306. uses REG
  307. gen move {TOS}, %a yields {regcon4, %a, 0}
  308. from MEMREG yields {memregcon4, %1, 0}
  309. from MEMREG
  310. uses REG
  311. gen addr {memregrel4, %1, 0}, %a yields %a
  312. from REG yields {regcon4, %1, 0}
  313. from regcon4
  314. gen addr {regrel4, %1.reg, %1.disp}, %1.reg
  315. yields %1.reg
  316. from memregcon4
  317. uses REG
  318. gen addr {memregrel4, %1.reg, %1.disp}, %a
  319. yields %a
  320. from LOCAL yields {memregrel4, fp, %1.ind}
  321. from addr_local
  322. uses REG
  323. gen addr {LOCAL, %1.ind}, %a yields %a
  324. from src4
  325. uses reusing %1, REG=%1 yields %a
  326. from src4
  327. uses reusing %1, REG=%1 yields {regcon4, %a, 0}
  328. from memregrelcon4
  329. uses REG
  330. gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, %a
  331. yields %a
  332. from memregrel4 yields {memregrelcon4, %1.reg,
  333. %1.disp, 0}
  334. from src1
  335. uses REG
  336. gen movzbd %1, %a yields %a
  337. from src2
  338. uses REG
  339. gen movzwd %1, %a yields %a
  340. from DLOCAL yields {LOCAL, %1.ind+4}
  341. {LOCAL, %1.ind}
  342. from absolute8 yields {absolute4, %1.disp+4}
  343. {absolute4, %1.disp}
  344. from memrel8 yields {memrel4, %1.reg,
  345. %1.disp1, %1.disp1+4}
  346. {memrel4, %1.reg,
  347. %1.disp1, %1.disp1}
  348. from regrel8 yields {regrel4, %1.reg, %1.disp+4}
  349. {regrel4, %1.reg, %1.disp}
  350. from memregrel8 yields {memregrel4, %1.reg, %1.disp+4}
  351. {memregrel4, %1.reg, %1.disp}
  352. PATTERNS
  353. /**********************************************************************
  354. * Group1 : load instructions *
  355. **********************************************************************/
  356. pat loc yields {const4, $1}
  357. pat ldc leaving loc 18
  358. trp
  359. pat lol yields {LOCAL, $1}
  360. pat loe yields {absolute4, $1}
  361. pat lil yields {memrel4, fp, $1, 0}
  362. pat lol lof yields {memrel4, fp, $1, $2}
  363. pat lal lof yields {LOCAL, $1+$2}
  364. pat lae lof yields {absolute4, $1+$2}
  365. pat lof
  366. with exact MEMREG yields {memregrel4, %1, $1}
  367. with REG yields {regrel4, %1, $1}
  368. with exact addr_external yields {absolute4, %1.disp+$1}
  369. with exact addr_local yields {LOCAL, %1.ind+$1}
  370. with exact memregrel4 yields {memrel4, %1.reg,
  371. %1.disp, $1}
  372. with exact memregrelcon4 yields {memrel4, %1.reg,
  373. %1.disp1, $1+%1.disp2}
  374. with exact memregcon4 yields {memregrel4, %1.reg, %1.disp+$1}
  375. with exact regcon4 yields {regrel4, %1.reg, %1.disp+$1}
  376. with exact LOCAL yields {memrel4, fp, %1.ind, $1}
  377. pat lxl $1==0 yields fp
  378. pat lxl $1==1 yields {LOCAL, 8}
  379. pat lxl $1==2 yields {memrel4, fp, 8, 8}
  380. pat lxl $1>2
  381. uses REG={memrel4, fp, 8, 8},
  382. REG={const4, $1-2}
  383. gen 1:
  384. move {regrel4, %a, 8}, %a
  385. acbd {const4, 0-1}, %b, {label, "1b"}
  386. yields %a
  387. pat lxa $1==0 yields {addr_local, 8}
  388. pat lxa $1==1 yields {memregrelcon4, fp, 8, 8}
  389. pat lxa $1==2
  390. uses REG={memrel4, fp, 8, 8} yields {regcon4, %a, 8}
  391. pat lxa $1>2
  392. uses REG={memrel4, fp, 8, 8},
  393. REG={const4, $1-2}
  394. gen 1:
  395. move {regrel4, %a, 8}, %a
  396. acbd {const4, 0-1}, %b, {label, "1b"}
  397. yields {regcon4, %a, 8}
  398. pat lol loi $2==1 yields {memrel1, fp, $1, 0}
  399. pat lal loi $2==1 yields {memregrel1, fp, $1}
  400. pat lae loi $2==1 yields {absolute1, $1}
  401. pat lol loi $2==4 yields {memrel4, fp, $1, 0}
  402. pat lal loi $2==4 yields {LOCAL, $1}
  403. pat lae loi $2==4 yields {absolute4, $1}
  404. pat lal yields {addr_local, $1}
  405. pat lae yields {addr_external, $1}
  406. pat loi $1==1
  407. with exact MEMREG yields {memregrel1, %1, 0}
  408. with REG yields {regrel1, %1, 0}
  409. with exact memregcon4 yields {memregrel1, %1.reg, %1.disp}
  410. with exact regcon4 yields {regrel1, %1.reg, %1.disp}
  411. with exact memregrel4 yields {memrel1, %1.reg, %1.disp, 0}
  412. with exact memregrelcon4 yields {memrel1, %1.reg,
  413. %1.disp1, %1.disp2}
  414. with exact addr_local yields {memregrel1, fp, %1.ind}
  415. with exact addr_external yields {absolute1, %1.disp}
  416. with exact LOCAL yields {memrel1, fp, %1.ind, 0}
  417. pat loi $1==2
  418. with exact MEMREG yields {memregrel2, %1, 0}
  419. with REG yields {regrel2, %1, 0}
  420. with exact memregcon4 yields {memregrel2, %1.reg, %1.disp}
  421. with exact regcon4 yields {regrel2, %1.reg, %1.disp}
  422. with exact memregrel4 yields {memrel2, %1.reg, %1.disp, 0}
  423. with exact memregrelcon4 yields {memrel2, %1.reg,
  424. %1.disp1, %1.disp2}
  425. with exact addr_local yields {memregrel2, fp, %1.ind}
  426. with exact addr_external yields {absolute2, %1.disp}
  427. with exact LOCAL yields {memrel2, fp, %1.ind, 0}
  428. pat loi $1==4
  429. with exact MEMREG yields {memregrel4, %1, 0}
  430. with REG yields {regrel4, %1, 0}
  431. with exact memregcon4 yields {memregrel4, %1.reg, %1.disp}
  432. with exact regcon4 yields {regrel4, %1.reg, %1.disp}
  433. with exact memregrel4 yields {memrel4,%1.reg,%1.disp,0}
  434. with exact memregrelcon4 yields {memrel4, %1.reg,
  435. %1.disp1,%1.disp2}
  436. with exact addr_local yields {LOCAL, %1.ind}
  437. with exact addr_external yields {absolute4, %1.disp}
  438. with exact LOCAL yields {memrel4, fp, %1.ind, 0}
  439. pat loi $1==8
  440. with REG yields {regrel8, %1, 0}
  441. with exact addr_local yields {DLOCAL, %1.ind}
  442. with exact addr_external yields {absolute8, %1.disp}
  443. with exact LOCAL yields {memrel8, fp, %1.ind, 0}
  444. pat loi defined($1)
  445. with REG STACK
  446. uses REG = {const4, $1}
  447. gen addd %a, %1
  448. 1:
  449. subd {const4, 4}, %1
  450. movd {regrel4, %1, 0}, {TOS}
  451. acbd {const4, 0-4}, %a, {label, "1b"}
  452. pat los $1==4
  453. kills ALL
  454. gen jsr {absolute4, ".los"}
  455. pat ldl yields {DLOCAL, $1}
  456. pat lde yields {absolute8, $1}
  457. pat ldf
  458. with exact addr_local yields {DLOCAL, %1.ind+$1}
  459. with exact addr_external yields {absolute8, %1.disp+$1}
  460. with regcon4 yields {regrel8, %1.reg,
  461. %1.disp+$1}
  462. pat lpi yields {addr_external, $1}
  463. /*****************************************************************
  464. * Group2 : store instructions *
  465. *****************************************************************/
  466. pat stl
  467. with src4 + con4
  468. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  469. gen move %1, {LOCAL, $1}
  470. with exact STACK
  471. gen move {TOS}, {LOCAL, $1}
  472. with exact src1
  473. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  474. gen movzbd %1, {LOCAL, $1}
  475. #ifndef NOFLOAT
  476. with FREG
  477. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  478. gen move %1, {LOCAL, $1}
  479. #endif
  480. pat ste
  481. with src4 + con4
  482. kills absolute + rel + memregrelcon4
  483. gen move %1, {absolute4, $1}
  484. with exact src1
  485. kills absolute + rel + memregrelcon4
  486. gen movzbd %1, {absolute4, $1}
  487. #ifndef NOFLOAT
  488. with FREG
  489. kills absolute + rel + memregrelcon4
  490. gen move %1, {absolute4, $1}
  491. #endif
  492. pat sil
  493. with src4 + con4
  494. kills allmincon
  495. gen move %1, {memrel4, fp, $1, 0}
  496. with exact src1
  497. kills allmincon
  498. gen movzbd %1, {memrel4, fp, $1, 0}
  499. #ifndef NOFLOAT
  500. with FREG
  501. kills allmincon
  502. gen move %1, {memrel4, fp, $1, 0}
  503. #endif
  504. pat stf
  505. with exact MEMREG src4 + con4
  506. kills allmincon
  507. gen move %2, {memregrel4, %1, $1}
  508. with REG src4 + con4
  509. kills allmincon
  510. gen move %2, {regrel4, %1, $1}
  511. with exact memregcon4 src4 + con4
  512. kills allmincon
  513. gen move %2, {memregrel4, %1.reg, $1 + %1.disp}
  514. with exact regcon4 consrc4
  515. kills allmincon
  516. gen move %2, {regrel4, %1.reg, $1 + %1.disp}
  517. with exact memregrel4 consrc4
  518. kills allmincon
  519. gen move %2, {memrel4, %1.reg, %1.disp, $1}
  520. with exact memregrelcon4 consrc4
  521. kills allmincon
  522. gen move %2, {memrel4, %1.reg, %1.disp1, %1.disp2 + $1}
  523. with exact addr_external consrc4
  524. kills allmincon
  525. gen move %2, {absolute4, %1.disp + $1}
  526. with exact addr_local consrc4
  527. kills allmincon
  528. gen move %2, {LOCAL,%1.ind + $1}
  529. #ifndef NOFLOAT
  530. with REG FREG
  531. kills allmincon
  532. gen move %2, {regrel4, %1, $1}
  533. #endif
  534. pat lal sti $2==4
  535. with consrc4
  536. kills allmincon
  537. gen move %1, {LOCAL, $1}
  538. pat lae sti $2==4
  539. with consrc4
  540. kills allmincon
  541. gen move %1, {absolute4, $1}
  542. pat lol sti $2==4
  543. with consrc4
  544. kills allmincon
  545. gen move %1, {memrel4, fp, $1, 0}
  546. pat lol sti $2==1
  547. with src124
  548. kills allmincon
  549. gen move %1, {memrel1, fp, $1, 0}
  550. pat sti $1 == 4
  551. with exact MEMREG consrc4
  552. kills allmincon
  553. gen move %2, {memregrel4, %1, 0}
  554. with REG consrc4
  555. kills allmincon
  556. gen move %2, {regrel4, %1, 0}
  557. #ifndef NOFLOAT
  558. with REG FREG
  559. kills allmincon
  560. gen movf %2, {regrel4, %1, 0}
  561. #endif
  562. with exact memregcon4 consrc4
  563. kills allmincon
  564. gen move %2, {memregrel4, %1.reg, %1.disp}
  565. with exact regcon4 consrc4
  566. kills allmincon
  567. gen move %2, {regrel4, %1.reg, %1.disp}
  568. with exact memregrel4 consrc4
  569. kills allmincon
  570. gen move %2, {memrel4, %1.reg, %1.disp, 0}
  571. with exact memregrelcon4 consrc4
  572. kills allmincon
  573. gen move %2, {memrel4, %1.reg, %1.disp1, %1.disp2}
  574. with exact addr_external consrc4
  575. kills allmincon
  576. gen move %2, {absolute4, %1.disp}
  577. with exact addr_local consrc4
  578. kills allmincon
  579. gen move %2, {LOCAL, %1.ind}
  580. with exact LOCAL consrc4
  581. kills allmincon
  582. gen move %2, {memrel4, fp, %1.ind, 0}
  583. pat sti $1 == 2
  584. with regcon4 src24
  585. kills allmincon
  586. gen move %2, {regrel2, %1.reg, %1.disp}
  587. with exact addr_external src24
  588. kills allmincon
  589. gen move %2, {absolute2, %1.disp}
  590. with exact addr_local src24
  591. kills allmincon
  592. gen move %2, {memregrel2, fp, %1.ind}
  593. pat sti $1 == 1
  594. with exact MEMREG src124
  595. kills allmincon
  596. gen move %2, {memregrel1, %1, 0}
  597. with REG src124
  598. kills allmincon
  599. gen move %2, {regrel1, %1, 0}
  600. with exact memregcon4 src124
  601. kills allmincon
  602. gen move %2, {memregrel1, %1.reg, %1.disp}
  603. with exact regcon4 src124
  604. kills allmincon
  605. gen move %2, {regrel1, %1.reg, %1.disp}
  606. with exact memregrel4 src124
  607. kills allmincon
  608. gen move %2, {memrel1, %1.reg, %1.disp, 0}
  609. with exact memregrelcon4 src124
  610. kills allmincon
  611. gen move %2, {memrel1, %1.reg, %1.disp1, %1.disp2}
  612. with exact addr_external src124
  613. kills allmincon
  614. gen move %2, {absolute1, %1.disp}
  615. with exact addr_local src124
  616. kills allmincon
  617. gen move %2, {memregrel1, fp, %1.ind}
  618. with exact LOCAL src124
  619. kills allmincon
  620. gen move %2, {memrel1, fp, %1.ind, 0}
  621. pat sti $1==8
  622. #ifndef NOFLOAT
  623. with regcon4 DFREG
  624. kills allmincon
  625. gen move %2, {regrel8, %1.reg, %1.disp}
  626. with exact addr_external DFREG
  627. kills allmincon
  628. gen move %2, {absolute8, %1.disp}
  629. with exact addr_local DFREG
  630. kills allmincon
  631. gen move %2, {memregrel8, fp, %1.ind}
  632. #endif
  633. with regcon4 consrc4 consrc4
  634. kills allmincon
  635. gen move %1, {regrel4, %1.reg, %1.disp}
  636. move %2, {regrel4, %1.reg, %1.disp+4}
  637. pat sti defined($1)
  638. with REG
  639. kills ALL
  640. uses REG={const4, $1}
  641. gen 1:
  642. movd {TOS}, {regrel4, %1, 0}
  643. addr {regrel4, %1, 4}, %1
  644. acbd {const4, 0-4}, %a, {label, "1b"}
  645. pat sts
  646. kills ALL
  647. gen jsr {absolute4, ".sts"}
  648. pat sdl
  649. with consrc4 consrc4
  650. kills rel, LOCAL %ind-8 < $1 && %ind+8 > $1
  651. gen move %1, {LOCAL, $1}
  652. move %2, {LOCAL, $1+4}
  653. #ifndef NOFLOAT
  654. with DFREG
  655. kills rel, LOCAL %ind-8 < $1 && %ind+8 > $1
  656. gen move %1, {DLOCAL, $1}
  657. #endif
  658. pat sde
  659. with consrc4 consrc4
  660. kills absolute + rel + memregrelcon4
  661. gen move %1, {absolute4, $1}
  662. move %2, {absolute4, $1+4}
  663. #ifndef NOFLOAT
  664. with DFREG
  665. kills absolute + rel + memregrelcon4
  666. gen move %1, {absolute8, $1}
  667. #endif
  668. pat sdf
  669. with exact addr_local consrc4 consrc4
  670. kills allmincon
  671. gen move %2, {LOCAL, %1.ind+$1}
  672. move %3, {LOCAL, %1.ind+4+$1}
  673. with exact addr_external consrc4 consrc4
  674. kills allmincon
  675. gen move %2, {absolute4, %1.disp+$1}
  676. move %3, {absolute4, %1.disp+4+$1}
  677. with regcon4 consrc4 consrc4
  678. kills allmincon
  679. gen move %2, {regrel4, %1.reg, %1.disp+$1}
  680. move %3, {regrel4, %1.reg, %1.disp+$1+4}
  681. #ifndef NOFLOAT
  682. with exact addr_local DFREG
  683. kills allmincon
  684. gen move %2, {DLOCAL, %1.ind+$1}
  685. with exact addr_external DFREG
  686. kills allmincon
  687. gen move %2, {absolute8, %1.disp+$1}
  688. with exact regcon4 DFREG
  689. kills allmincon
  690. gen move %2, {regrel8, %1.reg, %1.disp+$1}
  691. #endif
  692. /*****************************************************************
  693. * Group3 : integer arithmetic *
  694. *****************************************************************/
  695. pat loe loc adi ste $3==4 && $1==$4
  696. kills absolute + rel + memregrelcon4
  697. gen addd {const4, $2}, {absolute4, $1}
  698. pat lol loc adi stl $3==4 && $1==$4
  699. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  700. gen addd {const4, $2}, {LOCAL, $1}
  701. pat lil loc adi sil $3==4 && $1==$4
  702. kills allmincon
  703. gen addd {const4, $2}, {memrel4, fp, $1, 0}
  704. pat lol adi stl $1==$3 && $2==4
  705. with src4
  706. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  707. gen addd %1, {LOCAL, $1}
  708. pat lil adi sil $1==$3 && $2==4
  709. with src4
  710. kills allmincon
  711. gen addd %1, {memrel4, fp, $1, 0}
  712. pat loe adi ste $1==$3 && $2==4
  713. with src4
  714. kills absolute + rel + memregrelcon4
  715. gen addd %1, {absolute4, $1}
  716. pat adi $1 == 4
  717. with exact MEMREG const4 yields {memregcon4, %1, %2.num}
  718. with exact REG const4 yields {regcon4, %1, %2.num}
  719. with exact const4 REG yields {regcon4, %2, %1.num}
  720. with exact memregrel4 const4 yields {memregrelcon4, %1.reg,
  721. %1.disp, %2.num}
  722. with exact memregcon4 const4 yields {memregcon4, %1.reg,
  723. %1.disp + %2.num}
  724. with exact regcon4 const4 yields {regcon4, %1.reg,
  725. %1.disp + %2.num}
  726. with exact memregrelcon4 const4 yields {memregrelcon4, %1.reg,
  727. %1.disp1, %1.disp2+%2.num}
  728. with exact addr_local const4 yields {addr_local, %1.ind+%2.num}
  729. with exact LOCAL const4 yields {memregrelcon4, fp,
  730. %1.ind, %2.num}
  731. with exact const4 LOCAL yields {memregrelcon4, fp,
  732. %2.ind, %1.num}
  733. with exact const4 addr_local yields {addr_local, %2.ind+%1.num}
  734. with exact MEMREG addr_external yields {memregcon4, %1, %2.disp}
  735. with exact REG addr_external yields {regcon4, %1, %2.disp}
  736. with exact memregrel4 addr_external yields {memregrelcon4, %1.reg,
  737. %1.disp, %2.disp}
  738. with exact memregcon4 addr_external yields {memregcon4, %1.reg,
  739. %1.disp + %2.disp}
  740. with exact regcon4 addr_external yields {regcon4, %1.reg,
  741. %1.disp + %2.disp}
  742. with exact memregrelcon4 addr_external yields {memregrelcon4, %1.reg,
  743. %1.disp1, %1.disp2+%2.disp}
  744. with src4 REG
  745. gen addd %1, %2 yields %2
  746. with REG src4
  747. gen addd %2, %1 yields %1
  748. pat loe loc sbi ste $3==4 && $1==$4
  749. kills absolute + rel + memregrelcon4
  750. gen addd {const4, 0-$2}, {absolute4, $1}
  751. pat lol loc sbi stl $3==4 && $1==$4
  752. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  753. gen addd {const4, 0-$2}, {LOCAL, $1}
  754. pat lil loc sbi sil $3==4 && $1==$4
  755. kills allmincon
  756. gen addd {const4, 0-$2}, {memrel4, fp, $1, 0}
  757. pat sbi $1 == 4
  758. with src4 REG
  759. gen subd %1, %2 yields %2
  760. with const4 REG
  761. gen addd {const4, 0-%1.num}, %2 yields %2
  762. with exact addr_local addr_local
  763. uses REG={const4, %2.ind}
  764. gen subd {const4, %1.ind}, %a yields %a
  765. pat mli $1 == 4
  766. with src4 REG
  767. gen muld %1, %2 yields %2
  768. with REG src4
  769. gen muld %2, %1 yields %1
  770. pat dvi $1 == 4
  771. with src4 REG
  772. gen quod %1,%2 yields %2
  773. pat rmi $1 == 4
  774. with src4 REG
  775. gen remd %1, %2 yields %2
  776. pat ngi $1 == 4
  777. with src4
  778. uses reusing %1, REG
  779. gen negd %1, %a yields %a
  780. pat lol ngi stl $1==$3 && $2==4
  781. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  782. gen negd {LOCAL, $1}, {LOCAL, $1}
  783. pat loe ngi ste $1==$3 && $2==4
  784. kills absolute + rel + memregrelcon4
  785. gen negd {absolute4, $1}, {absolute4, $1}
  786. pat lil ngi sil $1==$3 && $2==4
  787. kills allmincon
  788. gen negd {memrel4, fp, $1, 0}, {memrel4, fp, $1, 0}
  789. pat sli $1 == 4
  790. with src124 REG
  791. gen ashd %1, %2 yields %2
  792. pat lol loc sli stl $1==$4 && $3==4
  793. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  794. gen ashd {const4, $2}, {LOCAL, $1}
  795. pat loe loc sli ste $1==$4 && $3==4
  796. kills absolute + rel + memregrelcon4
  797. gen ashd {const4, $2}, {absolute4, $1}
  798. pat loc sri $2 == 4
  799. with REG
  800. gen ashd {const4,0-$1}, %1 yields %1
  801. pat sri $1 == 4
  802. with REG REG
  803. gen negd %1, %1
  804. ashd %1, %2 yields %2
  805. pat lol loc sri stl $1==$4 && $3==4
  806. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  807. gen ashd {const4, 0-$2}, {LOCAL, $1}
  808. pat loe loc sri ste $1==$4 && $3==4
  809. kills absolute + rel + memregrelcon4
  810. gen ashd {const4, 0-$2}, {absolute4, $1}
  811. /*****************************************************************
  812. * Group4 : unsigned arithmetic *
  813. *****************************************************************/
  814. pat loe loc adu ste $3==4 && $1==$4
  815. kills absolute + rel + memregrelcon4
  816. gen addd {const4, $2}, {absolute4, $1}
  817. pat lol loc adu stl $3==4 && $1==$4
  818. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  819. gen addd {const4, $2}, {LOCAL, $1}
  820. pat lil loc adu sil $3==4 && $1==$4
  821. kills allmincon
  822. gen addd {const4, $2}, {memrel4, fp, $1, 0}
  823. pat lol adu stl $1==$3 && $2==4
  824. with src4
  825. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  826. gen addd %1, {LOCAL, $1}
  827. pat lil adu sil $1==$3 && $2==4
  828. with src4
  829. kills allmincon
  830. gen addd %1, {memrel4, fp, $1, 0}
  831. pat loe adu ste $1==$3 && $2==4
  832. with src4
  833. kills absolute + rel + memregrelcon4
  834. gen addd %1, {absolute4, $1}
  835. pat adu leaving adi $1
  836. pat loe loc sbu ste $3==4 && $1==$4
  837. kills absolute + rel + memregrelcon4
  838. gen addd {const4, 0-$2}, {absolute4, $1}
  839. pat lol loc sbu stl $3==4 && $1==$4
  840. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  841. gen addd {const4, 0-$2}, {LOCAL, $1}
  842. pat lil loc sbu sil $3==4 && $1==$4
  843. kills allmincon
  844. gen addd {const4, 0-$2}, {memrel4, fp, $1, 0}
  845. pat sbu leaving sbi $1
  846. pat mlu $1 == 4
  847. with src4 src4
  848. uses reusing %1, REGPAIR
  849. gen move %1, %a.1
  850. meid %2, %a yields %a.1
  851. pat dvu $1 == 4
  852. kills ALL
  853. gen jsr {absolute4, ".dvu"} yields r0
  854. pat rmu $1 == 4
  855. kills ALL
  856. gen jsr {absolute4, ".rmu"} yields r0
  857. pat slu leaving sli $1
  858. pat loc sru $2 == 4
  859. with REG
  860. gen lshd {const4, 0-$1}, %1 yields %1
  861. pat sru $1 == 4
  862. with REG REG
  863. gen negd %1, %1
  864. lshd %1, %2 yields %2
  865. /*****************************************************************
  866. * Group5 : floating point arithmetic *
  867. *****************************************************************/
  868. #ifndef NOFLOAT
  869. pat adf $1==4
  870. with fsrc4 FREG
  871. gen addf %1, %2 yields %2
  872. pat adf $1==8
  873. with fsrc8 DFREG
  874. gen addl %1, %2 yields %2
  875. pat sbf $1==4
  876. with fsrc4 FREG
  877. gen subf %1, %2 yields %2
  878. pat sbf $1==8
  879. with fsrc8 DFREG
  880. gen subl %1, %2 yields %2
  881. pat mlf $1==4
  882. with fsrc4 FREG
  883. gen mulf %1, %2 yields %2
  884. pat mlf $1==8
  885. with fsrc8 DFREG
  886. gen mull %1, %2 yields %2
  887. pat dvf $1==4
  888. with fsrc4 FREG
  889. gen divf %1, %2 yields %2
  890. pat dvf $1==8
  891. with fsrc8 DFREG
  892. gen divl %1, %2 yields %2
  893. pat ngf $1==4
  894. with FREG
  895. gen negf %1, %1 yields %1
  896. pat ngf $1==8
  897. with DFREG
  898. gen negl %1, %1 yields %1
  899. pat fif $1==4
  900. with fsrc4 FREG
  901. uses FREG, REG
  902. gen mulf %1, %2
  903. truncfd %2, %b
  904. movdf %b, %a
  905. subf %a, %2 yields %a %2
  906. pat fif $1==8
  907. with fsrc8 DFREG
  908. uses DFREG, REG
  909. gen mull %1, %2
  910. truncld %2, %b
  911. movdl %b, %a
  912. subl %a, %2 yields %a %2
  913. pat fef $1==4
  914. with FREG
  915. uses REG
  916. gen movf %1, {TOS}
  917. movf %1, {TOS}
  918. lshd {const4, 1}, {TOS}
  919. lshd {const4, 0-24}, {TOS}
  920. movd {TOS}, %a
  921. subd {const4, 127}, %a
  922. ord {const4, 0x3F000000}, {TOS}
  923. lshd {const4,2},{TOS}
  924. lshd {const4,0-2},{TOS}
  925. cbitd {const4, 23},{TOS}
  926. movf {TOS}, %1 yields %1 %a
  927. pat fef $1==8
  928. with DFREG
  929. uses REG
  930. gen movl %1, {TOS}
  931. movl %1, {TOS}
  932. adjspd {const4, 0-4}
  933. lshd {const4, 1}, {TOS}
  934. lshd {const4, 0-21}, {TOS}
  935. movd {TOS}, %a
  936. subd {const4, 1023}, %a
  937. ord {const4, 0x3FE00000}, {memregrel4, sp, 4}
  938. lshd {const4,2},{memregrel4, sp, 4}
  939. lshd {const4,0-2},{memregrel4, sp, 4}
  940. cbitd {const4, 52},{TOS}
  941. movl {TOS}, %1 yields %1 %a
  942. #else
  943. pat adf leaving loc 18 trp
  944. pat sbf leaving loc 18 trp
  945. pat mlf leaving loc 18 trp
  946. pat dvf leaving loc 18 trp
  947. pat ngf leaving loc 18 trp
  948. pat fif leaving loc 18 trp
  949. pat fef leaving loc 18 trp
  950. #endif
  951. /*****************************************************************
  952. * Group6 : pointer arithmetic *
  953. *****************************************************************/
  954. pat lol dup adp stl $1==$4 && $2==4
  955. kills allmincon
  956. uses REG={LOCAL, $1}
  957. gen addr {memrel4, fp, $1, $3}, {LOCAL, $1} yields %a
  958. pat loe dup adp ste $1==$4 && $2==4
  959. kills allmincon
  960. uses REG={absolute4, $1}
  961. gen addd {const4, $3}, {absolute4, $1}
  962. pat lol adp stl $1==$3
  963. kills allmincon
  964. gen addr {memrel4, fp, $1, $2}, {LOCAL, $1}
  965. pat loe adp ste $1==$3
  966. kills allmincon
  967. gen addd {const4, $2}, {absolute4, $1}
  968. pat adp
  969. with exact MEMREG yields {memregcon4, %1, $1}
  970. with REG yields {regcon4, %1, $1}
  971. with exact memregcon4 yields {memregcon4, %1.reg,
  972. %1.disp + $1}
  973. with exact regcon4 yields {regcon4, %1.reg,
  974. %1.disp + $1}
  975. with exact memregrel4 yields {memregrelcon4, %1.reg,
  976. %1.disp, $1}
  977. with exact memregrelcon4 yields {memregrelcon4, %1.reg,
  978. %1.disp1, %1.disp2 + $1}
  979. with exact addr_external yields {addr_external, $1+%1.disp}
  980. with exact addr_local yields {addr_local, %1.ind + $1}
  981. with exact LOCAL yields {memregrelcon4, fp,
  982. %1.ind, $1}
  983. pat loe loc ads ste $3==4 && $1==$4
  984. kills absolute + rel + memregrelcon4
  985. gen addd {const4, $2}, {absolute4, $1}
  986. pat lol loc ads stl $3==4 && $1==$4
  987. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  988. gen addd {const4, $2}, {LOCAL, $1}
  989. pat lol ads stl $1==$3 && $2==4
  990. with src4
  991. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  992. gen addd %1, {LOCAL, $1}
  993. pat loe ads ste $1==$3 && $2==4
  994. with src4
  995. kills absolute + rel + memregrelcon4
  996. gen addd %1, {absolute4, $1}
  997. pat ads $1==4 leaving adi 4
  998. pat sbs $1==4 leaving sbi 4
  999. /*****************************************************************
  1000. * Group7 : increment/decrement/zero *
  1001. *****************************************************************/
  1002. pat inc
  1003. with REG
  1004. gen addd {const4,1}, %1 yields %1
  1005. with exact STACK
  1006. gen addd {const4, 1},{TOS}
  1007. pat loc inc yields {const4, $1+1}
  1008. pat lol inc stl $1==$3
  1009. kills allmincon
  1010. gen addd {const4, 1}, {LOCAL, $1}
  1011. pat lol dec stl $1==$3
  1012. kills allmincon
  1013. gen addd {const4, 0-1}, {LOCAL, $1}
  1014. pat lil inc sil $1==$3
  1015. kills allmincon
  1016. gen addd {const4, 1}, {memrel4, fp, $1, 0}
  1017. pat lil dec sil $1==$3
  1018. kills allmincon
  1019. gen addd {const4, 0-1}, {memrel4, fp, $1, 0}
  1020. pat inl
  1021. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1022. gen addd {const4,1},{LOCAL, $1}
  1023. pat ine
  1024. kills absolute, rel, memregrelcon4
  1025. gen addd {const4,1},{absolute4, $1}
  1026. pat dec
  1027. with REG
  1028. gen addd {const4,0-1}, %1 yields %1
  1029. with exact STACK
  1030. gen addd {const4,0-1}, {TOS}
  1031. pat loc dec yields {const4, $1-1}
  1032. pat del
  1033. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1034. gen addd {const4,0-1},{LOCAL, $1}
  1035. pat dee
  1036. kills absolute, rel, memregrelcon4
  1037. gen addd {const4,0-1},{absolute4, $1}
  1038. pat zrl
  1039. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1040. gen move {const4, 0}, {LOCAL, $1}
  1041. pat zre
  1042. kills absolute, rel, memregrelcon4
  1043. gen move {const4, 0}, {absolute4, $1}
  1044. #ifndef NOFLOAT
  1045. pat zrf $1==4
  1046. with STACK
  1047. gen movd {const4, 0}, {TOS}
  1048. pat zrf $1==8
  1049. with STACK
  1050. gen movd {const4, 0}, {TOS}
  1051. movd {const4, 0}, {TOS}
  1052. #else
  1053. pat zrf leaving loc 18 trp
  1054. #endif
  1055. pat zer $1==4 yields {const4, 0}
  1056. pat zer $1==8 yields {const4, 0}
  1057. {const4, 0}
  1058. pat zer $1==12 yields {const4, 0}
  1059. {const4, 0}
  1060. {const4, 0}
  1061. pat zer $1>12
  1062. with STACK
  1063. uses REG={const4, $1/4}
  1064. gen 1:
  1065. movqd {const4, 0}, {TOS}
  1066. acbd {const4, 0-1}, %a, {label, "1b"}
  1067. /*****************************************************************
  1068. * Group8 : convert *
  1069. *****************************************************************/
  1070. pat loc loc cii $1==4 && $2==4
  1071. pat loc loc cii $1==1 && $2==4
  1072. with src124
  1073. uses reusing %1, REG
  1074. gen movxbd %1, %a yields %a
  1075. pat loc loc cii $1==2 && $2==4
  1076. with src24
  1077. uses reusing %1, REG
  1078. gen movxwd %1, %a yields %a
  1079. pat cii
  1080. kills ALL
  1081. gen jsr {absolute4, ".cii"}
  1082. pat cui
  1083. with src4 src4
  1084. #ifndef NOFLOAT
  1085. pat loc loc cfi $1==8 && $2==4
  1086. with fsrc8
  1087. uses REG
  1088. gen roundld %1, %a yields %a
  1089. pat loc loc cfi $1==4 && $2==4
  1090. with fsrc4
  1091. uses REG
  1092. gen roundfd %1, %a yields %a
  1093. pat cfi
  1094. kills ALL
  1095. gen jsr {absolute4, ".cfi"}
  1096. pat loc loc cif $1==4 && $2==8
  1097. with src4
  1098. uses DFREG
  1099. gen movdl %1, %a yields %a
  1100. pat loc loc cif $1==4 && $2==4
  1101. with src4
  1102. uses FREG
  1103. gen movdf %1, %a yields %a
  1104. pat cif
  1105. kills ALL
  1106. gen jsr {absolute4, ".cif"}
  1107. pat cuf
  1108. leaving loc 18 trp
  1109. pat loc loc cff $1==4 && $2==4
  1110. pat loc loc cff $1==8 && $2==8
  1111. pat loc loc cff $1==4 && $2==8
  1112. with fsrc4
  1113. uses DFREG
  1114. gen movfl %1, %a yields %a
  1115. pat loc loc cff $1==8 && $2==4
  1116. with fsrc8
  1117. uses FREG
  1118. gen movlf %1, %a yields %a
  1119. pat cff
  1120. kills ALL
  1121. gen jsr {absolute4, ".cff"}
  1122. #else
  1123. pat cif leaving loc 18 trp
  1124. pat cfi leaving loc 18 trp
  1125. pat cuf leaving loc 18 trp
  1126. pat cfu leaving loc 18 trp
  1127. pat cff leaving loc 18 trp
  1128. #endif
  1129. pat ciu
  1130. with src4 src4
  1131. pat cuu
  1132. with src4 src4
  1133. pat cfu
  1134. leaving loc 18 trp
  1135. /*****************************************************************
  1136. * Group9 : logical *
  1137. *****************************************************************/
  1138. pat loe loc and ste $3==4 && $1==$4
  1139. kills absolute + rel + memregrelcon4
  1140. gen andd {const4, $2}, {absolute4, $1}
  1141. pat lol loc and stl $3==4 && $1==$4
  1142. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1143. gen andd {const4, $2}, {LOCAL, $1}
  1144. pat lil loc and sil $3==4 && $1==$4
  1145. kills allmincon
  1146. gen andd {const4, $2}, {memrel4, fp, $1, 0}
  1147. pat lol and stl $1==$3 && $2==4
  1148. with src4
  1149. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1150. gen andd %1, {LOCAL, $1}
  1151. pat lil and sil $1==$3 && $2==4
  1152. with src4
  1153. kills allmincon
  1154. gen andd %1, {memrel4, fp, $1, 0}
  1155. pat loe and ste $1==$3 && $2==4
  1156. with src4
  1157. kills absolute + rel + memregrelcon4
  1158. gen andd %1, {absolute4, $1}
  1159. pat and $1==4
  1160. with src4 REG
  1161. gen andd %1, %2 yields %2
  1162. with REG src4
  1163. gen andd %2, %1 yields %1
  1164. pat and $1>4
  1165. with STACK
  1166. gen move {const4, $1}, r0
  1167. addr {memregrel4, sp, $1}, r1
  1168. 1:
  1169. andd {TOS}, {regrel4, r1, 0}
  1170. addr {regrel4, r1, 4}, r1
  1171. acbd {const4, 0-4}, r0, {label, "1b"}
  1172. pat and !defined($1)
  1173. with REG STACK
  1174. uses REG
  1175. gen addr {memregrel4, sp, 0}, %a
  1176. addd %1, %a
  1177. 1:
  1178. andd {TOS}, {regrel4, %a, 0}
  1179. addr {regrel4, %a, 4}, %a
  1180. acbd {const4, 0-4}, %1, {label, "1b"}
  1181. pat lol ior stl $1==$3 && $2==4
  1182. with src4
  1183. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1184. gen ord %1, {LOCAL, $1}
  1185. pat lol loc ior stl $3==4 && $1==$4
  1186. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1187. gen ord {const4, $2}, {LOCAL, $1}
  1188. pat lil loc ior sil $3==4 && $1==$4
  1189. kills allmincon
  1190. gen ord {const4, $2}, {memrel4, fp, $1, 0}
  1191. pat lil ior sil $1==$3 && $2==4
  1192. with src4
  1193. kills allmincon
  1194. gen ord %1, {memrel4, fp, $1, 0}
  1195. pat loe ior ste $1==$3 && $2==4
  1196. with src4
  1197. kills absolute + rel + memregrelcon4
  1198. gen ord %1, {absolute4, $1}
  1199. pat lol loc xor stl $3==4 && $1==$4
  1200. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1201. gen xord {const4, $2}, {LOCAL, $1}
  1202. pat lil loc xor sil $3==4 && $1==$4
  1203. kills allmincon
  1204. gen xord {const4, $2}, {memrel4, fp, $1, 0}
  1205. pat lol xor stl $1==$3 && $2==4
  1206. with src4
  1207. kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
  1208. gen xord %1, {LOCAL, $1}
  1209. pat lil xor sil $1==$3 && $2==4
  1210. with src4
  1211. kills allmincon
  1212. gen xord %1, {memrel4, fp, $1, 0}
  1213. pat loe xor ste $1==$3 && $2==4
  1214. with src4
  1215. kills absolute + rel + memregrelcon4
  1216. gen xord %1, {absolute4, $1}
  1217. pat ior $1==4
  1218. with src4 REG
  1219. gen ord %1, %2 yields %2
  1220. with REG src4
  1221. gen ord %2, %1 yields %1
  1222. pat ior $1>4
  1223. with STACK
  1224. gen move {const4, $1}, r0
  1225. addr {memregrel4, sp, $1}, r1
  1226. 1:
  1227. ord {TOS}, {regrel4, r1, 0}
  1228. addr {regrel4, r1, 4}, r1
  1229. acbd {const4, 0-4}, r0, {label, "1b"}
  1230. pat ior !defined($1)
  1231. with REG STACK
  1232. uses REG
  1233. gen addr {memregrel4, sp, 0}, %a
  1234. addd %1, %a
  1235. 1:
  1236. ord {TOS}, {regrel4, %a, 0}
  1237. addr {regrel4, %a, 4}, %a
  1238. acbd {const4, 0-4}, %1, {label, "1b"}
  1239. pat xor $1==4
  1240. with src4 REG
  1241. gen xord %1, %2 yields %2
  1242. with REG src4
  1243. gen xord %2, %1 yields %1
  1244. pat xor $1>4
  1245. with STACK
  1246. gen move {const4, $1}, r0
  1247. addr {memregrel4, sp, $1}, r1
  1248. 1:
  1249. xord {TOS}, {regrel4, r1, 0}
  1250. addr {regrel4, r1, 4}, r1
  1251. acbd {const4, 0-4}, r0, {label, "1b"}
  1252. pat xor !defined($1)
  1253. with REG STACK
  1254. uses REG
  1255. gen addr {memregrel4, sp, 0}, %a
  1256. addd %1, %a
  1257. 1:
  1258. xord {TOS}, {regrel4, %a, 0}
  1259. addr {regrel4, %a, 4}, %a
  1260. acbd {const4, 0-4}, %1, {label, "1b"}
  1261. pat com $1==4
  1262. with REG
  1263. gen comd %1, %1 yields %1
  1264. pat com $1>4
  1265. with STACK
  1266. gen move {const4, $1}, r0
  1267. addr {memregrel4, sp, 0}, r1
  1268. 1:
  1269. comd {regrel4, r1, 0}, {regrel4, r1, 0}
  1270. addr {regrel4, r1, 4}, r1
  1271. acbd {const4, 0-4}, r0, {label, "1b"}
  1272. pat com !defined($1)
  1273. with REG STACK
  1274. uses REG
  1275. gen addr {memregrel4, sp, 0}, %a
  1276. 1:
  1277. comd {regrel4, %a, 0}, {regrel4, %a, 0}
  1278. addr {regrel4, %a, 4}, %a
  1279. acbd {const4, 0-4}, %1, {label, "1b"}
  1280. pat rol $1 == 4
  1281. with src124 REG
  1282. gen rotd %1, %2 yields %2
  1283. pat loc ror $2 == 4
  1284. with REG
  1285. gen rotd {const4, 0-$1}, %1 yields %1
  1286. pat ror $1 == 4
  1287. with REG REG
  1288. gen negd %1, %1
  1289. rotd %1, %2 yields %2
  1290. /*****************************************************************
  1291. * Group10 : sets *
  1292. *****************************************************************/
  1293. pat inn zeq $1==4
  1294. with src4 REG
  1295. gen cmpd {const4, 0}, %1
  1296. bgt {label, $2}
  1297. tbitd %1, %2
  1298. bfc {label, $2}
  1299. pat inn zne $1==4
  1300. with src4 REG
  1301. gen cmpd {const4, 0}, %1
  1302. bgt {label, "1f"}
  1303. tbitd %1, %2
  1304. bfs {label, $2}
  1305. 1:
  1306. pat inn $1==4
  1307. with src4 REG
  1308. uses REG
  1309. gen tbitd %1, %2
  1310. sfsd %a
  1311. cmpd {const4,0}, %1
  1312. ble {label, "1f"}
  1313. xord %a, %a
  1314. 1: yields %a
  1315. pat inn $1>4
  1316. with src4 STACK
  1317. uses REG
  1318. gen tbitd %1, {TOS}
  1319. adjspd {const4, 0-4}
  1320. sfsd %a
  1321. cmpd {const4,0}, %1
  1322. ble {label, "1f"}
  1323. xord %a, %a
  1324. 1: yields %a
  1325. pat inn !defined($1)
  1326. with src4 src4 STACK
  1327. uses REG
  1328. gen tbitd %2, {TOS}
  1329. adjspd {const4, 0-4}
  1330. sfsd %a
  1331. cmpd {const4,0}, %2
  1332. ble {label, "1f"}
  1333. xord %a, %a
  1334. 1: yields %a
  1335. pat set $1==4
  1336. with src4
  1337. uses REG={const4, 0}
  1338. gen sbitd %1, %a yields %a
  1339. pat set $1>4
  1340. with src4 STACK
  1341. uses REG={const4, $1/4}
  1342. gen 1:
  1343. movqd {const4, 0}, {TOS}
  1344. acbd {const4, 0-1}, %a, {label, "1b"}
  1345. sbitd %1, {TOS}
  1346. pat set !defined($1)
  1347. with src4 src4 STACK
  1348. uses reusing %1, REG=%1
  1349. gen quod {const4, 4}, %a
  1350. 1:
  1351. movqd {const4, 0}, {TOS}
  1352. acbd {const4, 0-1}, %a, {label, "1b"}
  1353. sbitd %2, {TOS}
  1354. /*****************************************************************
  1355. * Group11 : array *
  1356. *****************************************************************/
  1357. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)==0
  1358. leaving adi 4
  1359. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)!=0
  1360. leaving adi 4
  1361. adp 0-rom($1,1)
  1362. pat lae aar $2==4 && rom($1,3)==2 && rom($1,1)==0
  1363. with REG
  1364. gen ashd {const4, 1}, %1 yields %1
  1365. leaving adi 4
  1366. pat lae aar $2==4 && rom($1,3)==2 && rom($1,1)!=0
  1367. with REG
  1368. gen ashd {const4, 1}, %1 yields {regcon4, %1,(0-2)*rom($1,1)}
  1369. leaving adi 4
  1370. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)==0
  1371. with REG REG
  1372. uses REG
  1373. gen addr {regrelsid, 0, %2, %1}, %a
  1374. yields %a
  1375. with REG addr_local
  1376. uses REG
  1377. gen addr {memregrelsid, %2.ind, fp, %1}, %a
  1378. yields %a
  1379. with REG addr_external
  1380. uses REG
  1381. gen addr {abssid, %2.disp, %1}, %a
  1382. yields %a
  1383. with leaving lae $1 aar $2
  1384. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)!=0
  1385. with REG REG
  1386. uses REG
  1387. gen subd {const4, rom($1,1)}, %1
  1388. addr {regrelsid, 0, %2, %1}, %a
  1389. yields %a
  1390. with REG addr_local
  1391. uses REG
  1392. gen subd {const4, rom($1,1)}, %1
  1393. addr {memregrelsid, %2.ind, fp, %1}, %a
  1394. yields %a
  1395. with REG addr_external
  1396. uses REG
  1397. gen subd {const4, rom($1,1)}, %1
  1398. addr {abssid, %2.disp, %1}, %a
  1399. yields %a
  1400. with leaving lae $1 aar $2
  1401. pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)==0
  1402. with REG REG yields {regrelsid, 0, %2, %1}
  1403. with REG addr_local yields {memregrelsid, %2.ind, fp, %1}
  1404. with REG addr_external yields {abssid, %2.disp, %1}
  1405. with leaving lae $1 lar $2
  1406. pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)!=0
  1407. with REG REG
  1408. gen subd {const4, rom($1,1)}, %1 yields {regrelsid, 0, %2, %1}
  1409. with REG addr_local
  1410. gen subd {const4, rom($1,1)}, %1 yields {memregrelsid, %2.ind, fp, %1}
  1411. with REG addr_external
  1412. gen subd {const4, rom($1,1)}, %1 yields {abssid, %2.disp, %1}
  1413. with leaving lae $1 lar $2
  1414. pat lae sar $2==4 && rom($1,3)==4 && rom($1,1)==0
  1415. with REG REG src4
  1416. kills allmincon
  1417. gen movd %3, {regrelsid, 0, %2, %1}
  1418. with REG addr_local src4
  1419. kills allmincon
  1420. gen move %3, {memregrelsid, %2.ind, fp, %1}
  1421. with REG addr_external src4
  1422. kills allmincon
  1423. gen move %3, {abssid, %2.disp, %1}
  1424. with leaving lae $1 sar $2
  1425. pat lae sar $2==4 && rom($1,3)==4 && rom($1,1)!=0
  1426. with REG REG src4
  1427. kills allmincon
  1428. gen subd {const4, rom($1,1)}, %1
  1429. movd %3, {regrelsid, 0, %2, %1}
  1430. with REG addr_local src4
  1431. kills allmincon
  1432. gen subd {const4, rom($1,1)}, %1
  1433. move %3, {memregrelsid, %2.ind, fp, %1}
  1434. with REG addr_external src4
  1435. kills allmincon
  1436. gen subd {const4, rom($1,1)}, %1
  1437. move %3, {abssid, %2.disp, %1}
  1438. with leaving lae $1 sar $2
  1439. pat lae aar $2==4 && rom($1,1)==0
  1440. with REG src4
  1441. gen indexd %1, {const4, rom($1,3)-1}, %2
  1442. yields %1
  1443. pat lae aar $2==4 && rom($1,1)!=0
  1444. with REG src4
  1445. gen subd {const4, rom($1,1)}, %1
  1446. indexd %1, {const4, rom($1,3)-1}, %2
  1447. yields %1
  1448. pat lae sar defined(rom($1,3))
  1449. leaving lae $1
  1450. aar $2
  1451. sti rom($1,3)
  1452. pat lae lar defined(rom($1,3))
  1453. leaving lae $1
  1454. aar $2
  1455. loi rom($1,3)
  1456. pat aar defined($1)
  1457. kills ALL
  1458. gen jsr {absolute4, ".aar"}
  1459. pat lar defined($1)
  1460. kills ALL
  1461. gen jsr {absolute4, ".lar"}
  1462. pat sar defined($1)
  1463. kills ALL
  1464. gen jsr {absolute4, ".sar"}
  1465. pat aar !defined($1)
  1466. with src4
  1467. kills ALL
  1468. gen jsr {absolute4, ".aar"}
  1469. pat lar !defined($1)
  1470. with src4
  1471. kills ALL
  1472. gen jsr {absolute4, ".lar"}
  1473. pat sar !defined($1)
  1474. with src4
  1475. kills ALL
  1476. gen jsr {absolute4, ".sar"}
  1477. /*****************************************************************
  1478. * Group12 : compare *
  1479. *****************************************************************/
  1480. proc cmitxxand
  1481. with src4 src4 REG
  1482. gen cmpd %1, %2
  1483. brxx* {label, "1f"}
  1484. movqd {const4, 0}, %3
  1485. 1: yields %3
  1486. proc cmitxxior
  1487. with src4 src4 REG
  1488. gen cmpd %1, %2
  1489. brxx* {label, "1f"}
  1490. sbitd {const4, 0}, %3
  1491. 1: yields %3
  1492. proc txxand
  1493. with src4 REG
  1494. gen cmpqd {const4, 0}, %1
  1495. brxx* {label, "1f"}
  1496. movqd {const4, 0}, %2
  1497. 1: yields %2
  1498. proc txxior
  1499. with src4 REG
  1500. gen cmpqd {const4, 0}, %1
  1501. brxx* {label, "1f"}
  1502. sbitd {const4, 0}, %2
  1503. 1: yields %2
  1504. pat cmi tlt and $1==4 && $3==4 call cmitxxand("bgt")
  1505. pat cmi tle and $1==4 && $3==4 call cmitxxand("bge")
  1506. pat cmi teq and $1==4 && $3==4 call cmitxxand("beq")
  1507. pat cmi tne and $1==4 && $3==4 call cmitxxand("bne")
  1508. pat cmi tge and $1==4 && $3==4 call cmitxxand("ble")
  1509. pat cmi tgt and $1==4 && $3==4 call cmitxxand("blt")
  1510. pat cmi tlt ior $1==4 && $3==4 call cmitxxior("ble")
  1511. pat cmi tle ior $1==4 && $3==4 call cmitxxior("blt")
  1512. pat cmi teq ior $1==4 && $3==4 call cmitxxior("bne")
  1513. pat cmi tne ior $1==4 && $3==4 call cmitxxior("beq")
  1514. pat cmi tge ior $1==4 && $3==4 call cmitxxior("bgt")
  1515. pat cmi tgt ior $1==4 && $3==4 call cmitxxior("bge")
  1516. pat tlt and $2==4 call txxand("bgt")
  1517. pat tle and $2==4 call txxand("bge")
  1518. pat teq and $2==4 call txxand("beq")
  1519. pat tne and $2==4 call txxand("bne")
  1520. pat tge and $2==4 call txxand("ble")
  1521. pat tgt and $2==4 call txxand("blt")
  1522. pat tlt ior $2==4 call txxior("ble")
  1523. pat tle ior $2==4 call txxior("blt")
  1524. pat teq ior $2==4 call txxior("bne")
  1525. pat tne ior $2==4 call txxior("beq")
  1526. pat tge ior $2==4 call txxior("bgt")
  1527. pat tgt ior $2==4 call txxior("bge")
  1528. pat cmi $1==4
  1529. with src4 src4
  1530. uses REG={const4, 0}
  1531. gen cmpd %2, %1
  1532. blt {label, "1f"}
  1533. shid %a
  1534. br {label, "2f"}
  1535. 1:
  1536. addd {const4, 0-1}, %a
  1537. 2: yields %a
  1538. #ifndef NOFLOAT
  1539. pat cmf $1==4
  1540. with fsrc4 fsrc4
  1541. uses REG = {const4, 0}
  1542. gen cmpf %1, %2
  1543. beq {label, "1f"}
  1544. bgt {label, "2f"}
  1545. movqd {const4, 1}, %a
  1546. br {label, "1f"}
  1547. 2:
  1548. movqd {const4, 0-1}, %a
  1549. 1: yields %a
  1550. pat cmf $1==8
  1551. with fsrc8 fsrc8
  1552. uses REG = {const4, 0}
  1553. gen cmpl %1, %2
  1554. beq {label, "1f"}
  1555. bgt {label, "2f"}
  1556. movqd {const4, 1}, %a
  1557. br {label, "1f"}
  1558. 2:
  1559. movqd {const4, 0-1}, %a
  1560. 1: yields %a
  1561. #else
  1562. pat cmf leaving loc 18 trp
  1563. #endif
  1564. pat cmu $1==4
  1565. with src4 src4
  1566. uses REG={const4, 0}
  1567. gen cmpd %2, %1
  1568. blo {label, "1f"}
  1569. shid %a
  1570. br {label, "2f"}
  1571. 1:
  1572. addd {const4, 0-1}, %a
  1573. 2: yields %a
  1574. pat cmu defined($1)
  1575. kills ALL
  1576. gen move {const4, $1}, {TOS}
  1577. jsr {absolute4, ".cmu"} yields r1
  1578. pat cms $1==4 leaving cmi $1
  1579. pat cms $1!=4
  1580. kills ALL
  1581. gen move {const4, $1}, {TOS}
  1582. jsr {absolute4, ".cms"} yields r1
  1583. pat cms !defined($1)
  1584. kills ALL
  1585. gen jsr {absolute4, ".cms"} yields r1
  1586. pat cmp
  1587. with exact addr_local addr_local yields {const4, %2.ind}
  1588. {const4, %1.ind}
  1589. leaving sbi 4
  1590. with leaving cmu 4
  1591. proc txx
  1592. with src4
  1593. uses REG
  1594. gen cmpqd {const4, 0}, %1
  1595. sxx* %a yields %a
  1596. pat tlt call txx("sgtd")
  1597. pat tle call txx("sged")
  1598. pat teq call txx("seqd")
  1599. pat tne call txx("sned")
  1600. pat tge call txx("sled")
  1601. pat tgt call txx("sltd")
  1602. /*****************************************************************
  1603. * Group13 : branch *
  1604. *****************************************************************/
  1605. proc bxx example beq
  1606. with src4 src4 STACK
  1607. gen cmpd %2, %1
  1608. brxx* {label, $1}
  1609. with exact src4 STACK
  1610. gen cmpd {TOS}, %1
  1611. brxx* {label, $1}
  1612. pat blt call bxx("blt")
  1613. pat ble call bxx("ble")
  1614. pat beq call bxx("beq")
  1615. pat bne call bxx("bne")
  1616. pat bge call bxx("bge")
  1617. pat bgt call bxx("bgt")
  1618. pat bra
  1619. with STACK
  1620. gen br {label, $1}
  1621. pat loc beq $1>=0 && $1<=127
  1622. with exact src1
  1623. kills ALL
  1624. gen cmpb {const4, $1}, %1
  1625. beq {label, $2}
  1626. with yields {const4, $1}
  1627. leaving beq $2
  1628. pat loc bne $1>=0 && $1<=127
  1629. with exact src1
  1630. kills ALL
  1631. gen cmpb {const4, $1}, %1
  1632. bne {label, $2}
  1633. with yields {const4, $1}
  1634. leaving bne $2
  1635. proc cmpzxx example cmp zeq
  1636. with src4 src4 STACK
  1637. gen cmpd %2,%1
  1638. brxx* {label, $2}
  1639. with exact src4 STACK
  1640. gen cmpd {TOS}, %1
  1641. brxx* {label, $2}
  1642. with exact addr_local addr_local
  1643. kills ALL
  1644. gen cmpd {const4, %2.ind}, {const4, %1.ind}
  1645. brxx* {label, $2}
  1646. pat cmp zlt call cmpzxx("blo")
  1647. pat cmp zle call cmpzxx("bls")
  1648. pat cmp zeq call cmpzxx("beq")
  1649. pat cmp zne call cmpzxx("bne")
  1650. pat cmp zge call cmpzxx("bhs")
  1651. pat cmp zgt call cmpzxx("bhi")
  1652. #ifndef NOFLOAT
  1653. proc cmf4zxx example cmf zeq
  1654. with fsrc4 fsrc4 STACK
  1655. gen cmpf %2,%1
  1656. brxx* {label, $2}
  1657. with exact fsrc4 STACK
  1658. gen cmpf {TOS}, %1
  1659. brxx* {label, $2}
  1660. pat cmf zlt $1==4 call cmf4zxx("blo")
  1661. pat cmf zle $1==4 call cmf4zxx("bls")
  1662. pat cmf zeq $1==4 call cmf4zxx("beq")
  1663. pat cmf zne $1==4 call cmf4zxx("bne")
  1664. pat cmf zge $1==4 call cmf4zxx("bhs")
  1665. pat cmf zgt $1==4 call cmf4zxx("bhi")
  1666. proc cmf8zxx example cmf zeq
  1667. with fsrc8 fsrc8 STACK
  1668. gen cmpl %2,%1
  1669. brxx* {label, $2}
  1670. with exact fsrc8 STACK
  1671. gen cmpl {TOS}, %1
  1672. brxx* {label, $2}
  1673. pat cmf zlt $1==8 call cmf8zxx("blo")
  1674. pat cmf zle $1==8 call cmf8zxx("bls")
  1675. pat cmf zeq $1==8 call cmf8zxx("beq")
  1676. pat cmf zne $1==8 call cmf8zxx("bne")
  1677. pat cmf zge $1==8 call cmf8zxx("bhs")
  1678. pat cmf zgt $1==8 call cmf8zxx("bhi")
  1679. #endif
  1680. proc zxx example zeq
  1681. with src4 STACK
  1682. gen cmpqd {const4,0}, %1
  1683. brxx* {label, $1}
  1684. with exact STACK
  1685. gen cmpqd {const4,0}, {TOS}
  1686. brxx* {label, $1}
  1687. pat zlt call zxx("bgt")
  1688. pat zle call zxx("bge")
  1689. pat zeq call zxx("beq")
  1690. pat zne call zxx("bne")
  1691. pat zge call zxx("ble")
  1692. pat zgt call zxx("blt")
  1693. /*****************************************************************
  1694. * Group14 : procedure call *
  1695. *****************************************************************/
  1696. pat cal
  1697. kills ALL
  1698. gen jsr {absolute4, $1}
  1699. pat cai
  1700. with REG
  1701. kills ALL
  1702. gen jsr %1
  1703. pat ret $1==0
  1704. with STACK
  1705. gen exit {label, "[]"}
  1706. ret {const4, 0}
  1707. pat ret $1==4
  1708. with src4 STACK
  1709. gen move %1, r0
  1710. exit {label, "[]"}
  1711. ret {const4, 0}
  1712. pat ret $1==8
  1713. with STACK
  1714. gen move {TOS}, r0
  1715. move {TOS}, r1
  1716. exit {label, "[]"}
  1717. ret {const4, 0}
  1718. pat lfr $1==4 yields r0
  1719. pat lfr $1==8 yields r1 r0
  1720. /*****************************************************************
  1721. * Group15 : miscellaneous *
  1722. *****************************************************************/
  1723. pat asp
  1724. with STACK
  1725. gen adjspd {const4,0-$1}
  1726. pat ass $1==4
  1727. with REG STACK
  1728. gen negd %1, %1
  1729. adjspd %1
  1730. with const4 STACK
  1731. gen adjspd {const4,0-%1.num}
  1732. pat blm $1==0
  1733. pat blm $1==4
  1734. with tosdst4 tossrc4
  1735. kills allmincon
  1736. gen movd %2, %1
  1737. pat blm $1>4 && $1<=16
  1738. with REG REG
  1739. kills allmincon
  1740. gen movmd {regrel4, %2, 0}, {regrel4, %1, 0}, {const4, $1/4}
  1741. with exact addr_external addr_external
  1742. kills allmincon
  1743. gen movmd {absolute4, %2.disp}, {absolute4, %1.disp}, {const4, $1/4}
  1744. with exact addr_external addr_local
  1745. kills allmincon
  1746. gen movmd {LOCAL, %2.ind}, {absolute4, %1.disp}, {const4, $1/4}
  1747. with exact addr_local addr_external
  1748. kills allmincon
  1749. gen movmd {absolute4, %2.disp}, {LOCAL, %1.ind}, {const4, $1/4}
  1750. with exact addr_local addr_local
  1751. kills allmincon
  1752. gen movmd {LOCAL, %2.ind}, {LOCAL, %1.ind}, {const4, $1/4}
  1753. pat blm $1>16
  1754. with REG REG
  1755. kills allmincon
  1756. uses REG={const4,$1}
  1757. gen 1:
  1758. movd {regrel4, %2, 0}, {regrel4, %1, 0}
  1759. addr {regrel4, %1, 4}, %1
  1760. addr {regrel4, %2, 4}, %2
  1761. acbd {const4, 0-4}, %a, {label, "1b"}
  1762. pat bls $1==4
  1763. with REG REG REG
  1764. kills ALL
  1765. gen 1:
  1766. movd {regrel4, %3, 0}, {regrel4, %2, 0}
  1767. addr {regrel4, %2, 4}, %2
  1768. addr {regrel4, %3, 4}, %3
  1769. acbd {const4, 0-4}, %1, {label, "1b"}
  1770. pat lae csa $2==4
  1771. with src4
  1772. kills ALL
  1773. gen move %1, r0
  1774. move {addr_external, $1}, r1
  1775. jsr {absolute4, ".csa"}
  1776. pat csa
  1777. kills ALL
  1778. gen movd {TOS}, r1
  1779. movd {TOS}, r0
  1780. jsr {absolute4, ".csa"}
  1781. pat lae csb $2==4
  1782. with src4
  1783. kills ALL
  1784. gen move %1, r0
  1785. move {addr_external, $1}, r1
  1786. jsr {absolute4, ".csb"}
  1787. pat csb
  1788. kills ALL
  1789. gen movd {TOS}, r1
  1790. movd {TOS}, r0
  1791. jsr {absolute4, ".csb"}
  1792. pat dch leaving loi 4
  1793. pat dup $1==4
  1794. with src4 yields %1 %1
  1795. pat dup $1==8
  1796. with src4 src4 yields %2 %1 %2 %1
  1797. with exact DLOCAL yields %1 %1
  1798. with exact absolute8 yields %1 %1
  1799. pat dup $1>8
  1800. kills ALL
  1801. gen move {const4, $1}, r0
  1802. jsr {absolute4, ".dup"}
  1803. pat dus $1==4
  1804. with src4
  1805. kills ALL
  1806. gen move %1, r0
  1807. jsr {absolute4, ".dup"}
  1808. pat exg $1==4
  1809. with src4 src4 yields %1 %2
  1810. pat exg $1==8
  1811. with src4 src4 src4 src4 yields %2 %1 %4 %3
  1812. pat exg
  1813. kills ALL
  1814. gen move {const4, $1}, r0
  1815. jsr {absolute4, ".exg"}
  1816. pat fil
  1817. gen move {addr_external, $1}, {absolute4, "hol0"+4}
  1818. pat gto
  1819. with STACK
  1820. gen move {addr_external, $1}, r0
  1821. br {label, ".gto"}
  1822. pat lim yields {absolute2, ".ignmask"}
  1823. pat lin
  1824. gen move {const4, $1}, {absolute4, "hol0"}
  1825. pat lni
  1826. gen addd {const4, 1}, {absolute4, "hol0"}
  1827. pat lor $1==0 yields fp
  1828. pat lor $1==1
  1829. with STACK yields sp
  1830. pat lor $1==2 yields {absolute4, ".reghp"}
  1831. pat lpb leaving adp 8
  1832. pat mon
  1833. kills ALL
  1834. gen jsr {absolute4, ".mon"}
  1835. pat nop
  1836. kills ALL
  1837. #ifdef DEBUG
  1838. gen move {absolute4, "hol0"}, {TOS}
  1839. jsr {absolute4, ".print"}
  1840. jsr {absolute4, ".prnl"}
  1841. #endif
  1842. pat rck $1==4
  1843. kills ALL
  1844. gen jsr {absolute4, ".rck"}
  1845. pat rtt leaving ret 0
  1846. pat sig
  1847. with src4
  1848. uses REG
  1849. gen move {absolute4, ".trpreg"}, %a
  1850. move %1, {absolute4, ".trpreg"} yields %a
  1851. pat sim
  1852. with src24
  1853. kills ALL
  1854. gen movw %1, {absolute2, ".ignmask"}
  1855. pat str $1==0
  1856. with src4 STACK
  1857. gen lprd fp, %1
  1858. pat str $1==1
  1859. with src4 STACK
  1860. gen lprd sp, %1
  1861. pat str $1==2
  1862. with src4
  1863. kills ALL
  1864. gen movd %1, {TOS}
  1865. jsr {absolute4, ".strhp"}
  1866. adjspd {const4, 0-4}
  1867. pat trp
  1868. kills ALL
  1869. gen jsr {absolute4, ".trp"}