mach1.c 3.2 KB

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  1. /*
  2. * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
  3. * See the copyright notice in the ACK home directory, in the file "Copyright".
  4. */
  5. #define RCSID1 "$Id$"
  6. /*
  7. * NS 16032 C declarations
  8. */
  9. #define low4(val) ((int)(val&0xF))
  10. /* signed value fits in ? bits */
  11. #define fit32(val) ( (val)>= -2147483647L-1 && (val)<=2147483647L )
  12. #define fit16(val) ( (val)>= -32767-1 && (val)<=32767 )
  13. #define fit8(val) ( (val)>= -128 && (val)<=127 )
  14. #define fit4(val) ( (val)>= -8 && (val)<=7 )
  15. /* Fits in byte, word displacement */
  16. #define fitd_b(val) ( (val)>= -64 && (val)<=63 )
  17. #define fitd_w(val) ( (val)>= -8192 && (val)<=8191 )
  18. /* Assemble and disassemble operator id's */
  19. /* the i_value's in the instruction keyword table
  20. contain five bit fields:
  21. 0-3 Opcode used in format indicated by the i_type field
  22. 4-7 Condition Code field. B_?? Also used for reg in FFS type.
  23. 8-11 The type of the first addressing mode gen1
  24. 12-15 The type of the second addressing mode gen2
  25. The integer type T_????
  26. The custom Slave type S_????
  27. The Floating point type F_????
  28. */
  29. #define MK_op(op) (op)
  30. #define MK_cc(cc) ( (cc)<<4 )
  31. #define MK_g1(g1) ( (g1)<<8 )
  32. #define MK_g2(g2) ( (g2)<<12 )
  33. #define mk_op(o) (MK_op(o)|MK_g1(X_ILLGL)|MK_g2(X_ILLGL))
  34. #define mk_op1(o,g1) (MK_op(o)|MK_g1(g1)|MK_g2(X_ILLGL))
  35. #define mk_op2(o,g1,g2) (MK_op(o)|MK_g1(g1)|MK_g2(g2))
  36. #define mk_c(c) MK_cc(c)
  37. #define mk_op1c(o,g1,c) (MK_op(o)|MK_g1(g1)|MK_g2(X_ILLGL)|MK_cc(c))
  38. #define mk_op2c(o,g1,g2,c) (MK_op(o)|MK_g1(g1)|MK_g2(g2)|MK_cc(c))
  39. #define id_op(id) ((id) &0xF)
  40. #define id_cc(id) (((id)>>4) &0xF)
  41. #define id_g1(id) (((id)>>8) &3)
  42. #define id_g2(id) (((id)>>12)&3)
  43. #define id_t1(id) (((id)>>10)&3)
  44. #define id_t2(id) (((id)>>14)&3)
  45. /* Type definitions */
  46. #define T_INT 0
  47. #define T_FL 1
  48. #define T_SLAVE 2
  49. #define T_ILLGL 3
  50. #define I_BYTE (T_INT<<2) | 0
  51. #define I_WORD (T_INT<<2) | 1
  52. #define I_DOUBLE (T_INT<<2) | 3
  53. #define F_FLOAT (T_FL<<2) | 1
  54. #define F_LONG (T_FL<<2) | 0
  55. #define S_DOUBLE (T_SLAVE<<2) | 1
  56. #define S_QUAD (T_SLAVE<<2) | 0
  57. #define X_ILLGL (T_ILLGL<<2) | 2
  58. #define B_EQ 0x0
  59. #define B_NE 0x1
  60. #define B_CS 0x2
  61. #define B_CC 0x3
  62. #define B_HI 0x4
  63. #define B_LS 0x5
  64. #define B_GT 0x6
  65. #define B_LE 0x7
  66. #define B_FS 0x8
  67. #define B_FC 0x9
  68. #define B_LO 0xA
  69. #define B_HS 0xB
  70. #define B_LT 0xC
  71. #define B_GE 0xD
  72. #define B_TRUE 0xE
  73. #define B_FALSE 0xF
  74. /* String option bits */
  75. #define SO_UNTIL 0xC
  76. #define SO_WHILE 0x4
  77. #define SO_BACKW 0x2
  78. #define SO_TRANS 0x1
  79. /* output definitions */
  80. #define form0(id) emit1(0xA + (id_cc(id)<<4) )
  81. #define form1(id) emit1(0x2 + (id_op(id)<<4) )
  82. #define form6(id) emit1(0x4E) ; form4(id)
  83. #define form7(id) emit1(0xCE) ; form4(id)
  84. /* Structure contains information for generation of an addressing mode */
  85. /* The size of immediates is not stored in here and must be fetched from
  86. a id-field
  87. */
  88. extern struct {
  89. int m_mode; /* The main mode bits */
  90. int m_index ; /* m_mode= index mode, m_index has index byte */
  91. int m_ndisp ; /* The number of displacements */
  92. expr_t m_expr1 ; /* The first expression */
  93. #ifdef RELOCATION
  94. int m_rel1, m_rel2; /* relocation */
  95. #endif
  96. expr_t m_expr2 ; /* The second expression */
  97. } mode1, mode2, *mode_ptr ;
  98. #define not_imm(mode_ptr) if ( (mode_ptr)->m_mode==0x14 ) ill_imm() ;